CN215835188U - Circuit for solving problem of easy power failure of battery - Google Patents
Circuit for solving problem of easy power failure of battery Download PDFInfo
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- CN215835188U CN215835188U CN202121806844.7U CN202121806844U CN215835188U CN 215835188 U CN215835188 U CN 215835188U CN 202121806844 U CN202121806844 U CN 202121806844U CN 215835188 U CN215835188 U CN 215835188U
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Abstract
The utility model discloses a circuit for solving the problem of easy power-off of a battery, which is used for normally supplying power to a singlechip in a remote controller when the battery of the remote controller shakes instantly, and comprises: the power supply comprises a first power supply management chip, a second power supply management chip, a farad capacitance control circuit, a power supply chip control circuit and a single chip microcomputer control circuit. The utility model can discharge farad capacitor at the moment of battery shake and poor contact with the battery, and can output 3.3V voltage to ensure normal work of the single chip microcomputer, thereby solving the problem of failure of a circuit board caused by poor power supply voltage due to the condition of battery power supply shake.
Description
Technical Field
The utility model relates to the technical field of a shoulder-back battery-powered remote controller, in particular to a circuit for solving the problem of easy power failure of a battery.
Background
In the use of shoulder back of the body formula battery powered remote controller, there is the battery shake easily taking place when the power supply to make supply voltage bad, lead to the circuit board inefficacy, the unable normal work of singlechip, the unable normal operating of equipment circuit makes the unable problem of normal work of transmitter, to this design one kind solve the easy outage circuit of battery.
Disclosure of Invention
According to the embodiment of the utility model, the circuit for solving the problem of easy power failure of the battery is provided, is used for normally supplying power to a singlechip in a remote controller when the battery of the remote controller shakes, and comprises:
the input end of the first power supply management chip is connected with a power supply;
the input end of the second power supply management chip is connected with the output end of the first power supply management chip, and the output end of the second power supply management chip is connected with the single chip microcomputer;
the farad capacitor control circuit is connected with the output end of the first power management chip and the grounding end of the first power management chip;
the power supply chip control circuit is connected with the output end of the first power supply management chip, the second power supply management chip and the single chip microcomputer;
and the singlechip control circuit is connected with the output end of the first power management chip and the second power management chip.
Further, farad capacitor control circuit contains first electric capacity, the second electric capacity, third electric capacity and fourth electric capacity, first electric capacity and second electric capacity are parallelly connected, the one end of first electric capacity, the one end of second electric capacity links to each other with the input of first power management chip, third electric capacity and fourth electric capacity are parallelly connected, the one end of third electric capacity, the one end of fourth electric capacity and the output of first power management chip link to each other, the other end of first electric capacity, the other end of second electric capacity, the earthing terminal of first power management chip, the other end of third electric capacity and the other end of fourth electric capacity link to each other and ground connection setting.
Further, the farad capacitance control circuit further comprises:
and the farad capacitor is connected with the output end of the first power management chip and the grounding end of the first power management chip.
Further, the power chip control circuit includes:
the input circuit is connected with the single chip microcomputer;
and the output circuit is connected with the singlechip.
Furthermore, the input circuit comprises a fifth capacitor, a first resistor and a first diode, one end of the fifth capacitor is connected with the input end of the second power management chip, the other end of the fifth capacitor is connected with the pin end of the second power management chip, the pin end of the second power management chip is grounded through the first resistor, the cathode of the first diode is connected with the pin end of the second power management chip, and the anode of the first diode is connected with the single chip microcomputer.
Furthermore, the output circuit comprises an inductor, a sixth capacitor, a second resistor and a seventh capacitor, two ends of the inductor are respectively connected with the output end of the second power management chip and the single chip microcomputer, the sixth capacitor, the second resistor and the seventh capacitor are sequentially connected in series and are connected in parallel with the inductor, and the sixth capacitor and the seventh capacitor are both grounded.
Furthermore, the singlechip control circuit comprises three second diodes, a triode and a third resistor, the three second diodes are connected in series, the negative electrodes of the three second diodes are connected with the pin end of the second power management chip, the positive electrodes of the three second diodes are connected with the base electrode of the triode, the emitting electrode of the triode is connected with the output end of the first power management chip, and the collecting electrode of the triode is grounded through the third resistor.
Further, the triode is a PNP triode.
According to the circuit for solving the problem of easy power failure of the battery, disclosed by the embodiment of the utility model, at the moment of battery jitter and the moment of poor contact with the battery, the farad capacitor starts to discharge, so that 3.3V voltage can be output, and the normal work of a single chip microcomputer is ensured, thereby solving the problem of failure of a circuit board caused by poor power supply voltage due to the condition of battery power supply jitter.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and are intended to provide further explanation of the claimed technology.
Drawings
Figure 1 is a circuit diagram of a farad capacitance control circuit that addresses battery outage liability circuits according to an embodiment of the present invention.
Fig. 2 is a circuit diagram of a power chip control circuit for solving a battery outage prone circuit according to an embodiment of the utility model.
Fig. 3 is a circuit diagram of a single chip microcomputer control circuit for solving the problem of the easy power-off circuit of the battery according to the embodiment of the utility model.
Detailed Description
The present invention will be further explained by describing preferred embodiments of the present invention in detail with reference to the accompanying drawings.
First, a circuit for solving the problem of easy battery power failure according to an embodiment of the present invention will be described with reference to fig. 1 to 3, which is used for supplying power to a single chip microcomputer in a remote controller normally when a battery of the remote controller shakes, and has a wide application range.
As shown in fig. 1 to 3, the circuit for solving the problem of easy power failure of the battery according to the embodiment of the present invention includes: the power supply comprises a first power supply management chip U2, a second power supply management chip U3, a farad capacitor control circuit, a power supply chip control circuit and a single chip microcomputer control circuit.
Specifically, as shown in fig. 1 to 3, in the present embodiment, an input terminal of the first power management chip U2 is connected to a power supply; the input end of the second power supply management chip U3 is connected with the output end of the first power supply management chip U2, and the output end of the second power supply chip is connected with the single chip microcomputer; the farad capacitor control circuit is connected with the output end of the first power management chip U2 and the grounding end of the first power management chip; the power supply chip control circuit is connected with the output end of the first power supply management chip U2, the second power supply management chip U3 and the single chip microcomputer; the singlechip control circuit is connected with the output end of the first power management chip U2 and the second power management chip U3. The first power management chip U2 adopts an LM1117-5.0V chip, the second power management chip U3 adopts an SPX3819-3.3V chip for generating stable 5V and 3.3V voltages, the single chip microcomputer adopts a GD32F103VCT6 chip, and the power supply adopts two lithium batteries for supplying power by 8.4V voltage.
Further, as shown in fig. 1, in this embodiment, the farad capacitance control circuit includes a first capacitor 1C1, a second capacitor 1C2, a third capacitor 1C3 and a fourth capacitor 1C4, the first capacitor 1C1 is connected in parallel with the second capacitor 1C2, one end of the first capacitor 1C1 and one end of the second capacitor 1C2 are connected to the input end of the first power management chip U2, the third capacitor 1C3 is connected in parallel with the fourth capacitor 1C4, one end of the third capacitor 1C3 and one end of the fourth capacitor 1C4 are connected to the output end of the first power management chip U2, and the other end of the first capacitor 1C1 and the other end of the second capacitor 1C2 are connected to the ground end of the first power management chip U2, the other end of the third capacitor 1C3 and the other end of the fourth capacitor 1C4 are connected to be grounded.
Further, as shown in fig. 1, in this embodiment, the farad capacitance control circuit further includes: the farad capacitor CAP1, farad capacitor CAP1 link to each other with the output of first power management chip U2, the earthing terminal of first power management, and farad capacitor CAP 1's electrical parameter is 0.1F/5.5V, and farad capacitor CAP1 is used for the storage electric energy.
Further, as shown in fig. 2, in the present embodiment, the power chip control circuit includes: an input circuit and an output circuit. The input circuit is connected with the singlechip; the output circuit is connected with the singlechip.
Further, as shown in fig. 2, in this embodiment, the input circuit includes a fifth capacitor C1, a first resistor R3, and a first diode D1, one end of the fifth capacitor C1 is connected to the input terminal of the second power management chip U3, the other end of the fifth capacitor C1 is connected to the pin terminal EN of the second power management chip U3, the pin terminal EN of the second power management chip U3 is grounded through the first resistor R3, the cathode of the first diode D1 is connected to the pin terminal EN of the second power management chip U3, the anode of the first diode D1 is connected to the IO port of the single chip microcomputer CTRL, and named by the network _ V33.
Further, as shown in fig. 3, in this embodiment, the output circuit includes an inductor L1, a sixth capacitor C2, a second resistor R5, and a seventh capacitor C3, two ends of the inductor L1 are respectively connected to the output end of the second power management chip U3 and the single chip, the sixth capacitor C2, the second resistor R5, and the seventh capacitor C3 are sequentially connected in series and in parallel with the inductor L1, and the sixth capacitor C2 and the seventh capacitor C3 are all grounded.
Further, as shown in fig. 3, in this embodiment, the mcu includes three second diodes (D2, D3, D4), a transistor Q1 and a third resistor R4, the three second diodes (D2, D3, D4) are connected in series, cathodes of the three second diodes (D2, D3, D4) are connected to a pin terminal of the second power management chip U3, anodes of the three second diodes (D2, D3, D4) are connected to a base of the transistor Q1, an emitter of the transistor Q1 is connected to an output terminal of the first power management chip U2, and a collector of the transistor Q1 is grounded through the third resistor R4.
Further, as shown in fig. 3, in the present embodiment, the transistor Q1 is a PNP transistor Q1.
The input voltage end of the battery generates a stable voltage value through voltage division of the resistor R1 and the resistor R2, the voltage value is connected to an IO port of the single chip microcomputer, and the voltage value change of the point is detected through the configuration of an AC port.
When the battery supplies power normally, the first power management chip U2 works normally to generate stable 5V voltage and charge the farad capacitor CAP1, the 5V voltage is used as the input voltage of the second power management chip U3, the enable pin EN of the second power management chip U3 is pulled to a high level through the fifth capacitor C1, and at the moment, the second power management chip U3 works normally to generate V33 voltage and AV33 voltage, so that the normal work of the single chip microcomputer is guaranteed;
when the battery shakes and cannot provide a stable power supply, the voltage value of the battery is detected by the AC port, the first power management chip U2 is invalid and cannot generate 5V voltage, the farad capacitor CAP1 starts to discharge at the moment to generate 5V voltage, the single chip microcomputer controls the IO port CTRL _ V33 to generate high level, the enable pin EN of the second power management chip U3 is pulled high, the second power management chip U3 is guaranteed to work normally, the single chip microcomputer can work normally, and therefore the transmitter circuit is guaranteed to work normally.
In the circuit for solving the problem of easy power failure of the battery according to the embodiment of the utility model, as described above with reference to fig. 1 to 3, at the moment of battery jitter and the moment of poor contact with the battery, the farad capacitor CAP1 starts to discharge, and can output 3.3V voltage, so as to ensure normal operation of the single chip microcomputer, thereby solving the problem of failure of a circuit board due to poor power supply voltage caused by battery power supply jitter.
It should be noted that, in the present specification, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the utility model. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the utility model should be determined from the following claims.
Claims (8)
1. The utility model provides a solve easy outage circuit of battery for in the twinkling of an eye when the battery of remote controller takes place to shake, singlechip normal power supply in the remote controller which characterized in that contains:
the input end of the first power supply management chip is connected with a power supply;
the input end of the second power management chip is connected with the output end of the first power management chip, and the output end of the second power management chip is connected with the single chip microcomputer;
the farad capacitor control circuit is connected with the output end of the first power management chip and the grounding end of the first power management chip;
the power supply chip control circuit is connected with the output end of the first power supply management chip, the second power supply management chip and the single chip microcomputer;
and the singlechip control circuit is connected with the output end of the first power management chip and the second power management chip.
2. The circuit for solving the problem of easy battery outage of claim 1, wherein the farad capacitance control circuit comprises a first capacitor, a second capacitor, a third capacitor and a fourth capacitor, the first capacitor and the second capacitor are connected in parallel, one end of the first capacitor and one end of the second capacitor are connected to the input end of the first power management chip, the third capacitor and the fourth capacitor are connected in parallel, one end of the third capacitor and one end of the fourth capacitor are connected to the output end of the first power management chip, and the other end of the first capacitor, the other end of the second capacitor, the ground end of the first power management chip, the other end of the third capacitor and the other end of the fourth capacitor are connected and grounded.
3. The battery disconnect resolution circuit of claim 2, wherein the farad capacitance control circuit further comprises:
and the farad capacitor is connected with the output end of the first power management chip and the grounding end of the first power management chip.
4. The circuit for solving the problem of easy power-off of the battery as claimed in claim 1, wherein the power chip control circuit comprises:
the input circuit is connected with the single chip microcomputer;
and the output circuit is connected with the single chip microcomputer.
5. The battery easy-to-power-off circuit as claimed in claim 4, wherein the input circuit comprises a fifth capacitor, a first resistor and a first diode, one end of the fifth capacitor is connected to the input terminal of the second power management chip, the other end of the fifth capacitor is connected to the pin terminal of the second power management chip, the pin terminal of the second power management chip is grounded through the first resistor, the cathode of the first diode is connected to the pin terminal of the second power management chip, and the anode of the first diode is connected to the single chip.
6. The circuit for solving the problem of easy battery outage of claim 5, wherein the output circuit comprises an inductor, a sixth capacitor, a second resistor and a seventh capacitor, two ends of the inductor are respectively connected with the output end of the second power management chip and the single chip microcomputer, the sixth capacitor, the second resistor and the seventh capacitor are sequentially connected in series and are connected in parallel with the inductor, and the sixth capacitor and the seventh capacitor are both grounded.
7. The circuit for solving the problem of easy power failure of the battery as claimed in claim 1, wherein the single-chip microcomputer control circuit comprises three second diodes, a triode and a third resistor, the three second diodes are connected in series, the negative poles of the three second diodes are connected with the pin terminal of the second power management chip, the positive poles of the three second diodes are connected with the base electrode of the triode, the emitter electrode of the triode is connected with the output terminal of the first power management chip, and the collector electrode of the triode is grounded through the third resistor.
8. The circuit for solving the problem of easy power failure of the battery as claimed in claim 7, wherein the transistor is a PNP transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121806844.7U CN215835188U (en) | 2021-08-04 | 2021-08-04 | Circuit for solving problem of easy power failure of battery |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121806844.7U CN215835188U (en) | 2021-08-04 | 2021-08-04 | Circuit for solving problem of easy power failure of battery |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215835188U true CN215835188U (en) | 2022-02-15 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202121806844.7U Active CN215835188U (en) | 2021-08-04 | 2021-08-04 | Circuit for solving problem of easy power failure of battery |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215835188U (en) |
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2021
- 2021-08-04 CN CN202121806844.7U patent/CN215835188U/en active Active
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