CN213122142U - Super capacitor state monitoring system - Google Patents
Super capacitor state monitoring system Download PDFInfo
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- CN213122142U CN213122142U CN202021675911.1U CN202021675911U CN213122142U CN 213122142 U CN213122142 U CN 213122142U CN 202021675911 U CN202021675911 U CN 202021675911U CN 213122142 U CN213122142 U CN 213122142U
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Abstract
The utility model relates to a super capacitor field especially relates to a super capacitor state monitoring system, the system includes: the power supply comprises an external power supply, a single-channel voltage comparator, a double-channel voltage comparator, a load, a CPLD and an indicator lamp assembly, wherein the external power supply is electrically connected with the super capacitor and is used for providing direct current and charging the super capacitor; and the single-channel voltage comparator is electrically connected with the external power supply and is used for collecting the voltage value of the external power supply and outputting the power-off state and the power-off state of the external power supply. The utility model provides a technical scheme, pilot lamp subassembly with the CPLD electricity is connected, CPLD basis a plurality of charge-discharge state drives that super capacitor is in correspond pilot lamp subassembly bright, go out or the scintillation can show super capacitor's the complete expression of charge-discharge state.
Description
Technical Field
The utility model relates to a super capacitor field especially relates to a super capacitor state monitoring system.
Background
In the existing charging control unit device of the alternating current charging pile, the representation of the charging state is generally represented only by two states of charging in and charging out, the number of the state representations is small, and the charging and discharging state of a super capacitor cannot be completely represented.
Therefore, a need exists for a supercapacitor state monitoring system that can indicate the charging and discharging states of a supercapacitor in an all-around manner.
SUMMERY OF THE UTILITY MODEL
A primary object of the present invention is to provide a super capacitor state monitoring system capable of performing all-dimensional representation of the state of a super capacitor.
In order to achieve the above object, the utility model provides a super capacitor state monitoring system for to the control of super capacitor state, the system includes:
the external power supply is electrically connected with the super capacitor and is used for providing direct current and charging the super capacitor;
the single-channel voltage comparator is electrically connected with the external power supply and is used for collecting the voltage value of the external power supply and outputting the power-off and power-on states of the external power supply;
the double-channel voltage comparator is electrically connected with the super capacitor and used for acquiring the current voltage value of the super capacitor and outputting the magnitude relation between the current voltage value and the upper limit value and the lower limit value of the preset voltage;
the load is electrically connected with the external power supply and the super capacitor so as to supply power to the load through the external power supply or the super capacitor;
the CPLD is electrically connected with the single-channel voltage comparator and the double-channel voltage comparator, is used for receiving the output and power-off states of the external power supply and the magnitude relation between the current voltage value and the preset voltage upper limit value and the preset voltage lower limit value, and judges the charge-discharge state of the super capacitor according to the output and power-off states of the external power supply and the magnitude relation between the current voltage value and the preset reference upper limit value and the reference lower limit value;
and the indicating lamp component is electrically connected with the CPLD, and the CPLD drives the corresponding indicating lamp component to be on, off or flash according to different charging and discharging states of the super capacitor.
Preferably, the external power source comprises an alternating current, a rectifier connected with the alternating current, an LC filter electrically connected with the rectifier, and a first switch electrically connected with the LC filter, wherein the first switch is electrically connected with the single-channel voltage comparator for controlling whether to provide direct current to the single-channel voltage comparator.
Preferably, the super capacitor state monitoring system further comprises a photovoltaic power generation assembly and a second switch electrically connected with the photovoltaic power generation assembly, the second switch is further electrically connected with the single-channel voltage comparator for controlling whether to provide direct current to the single-channel voltage comparator, and at the same time point, at most one of the first switch and the second switch is electrically connected with the single-channel voltage comparator.
Preferably, the photovoltaic power generation assembly comprises a solar cell, a first DC/DC module and a storage battery;
the solar cell, the first DC/DC module, the storage battery and the second switch are electrically connected in sequence.
Preferably, the photovoltaic power generation assembly further comprises a second DC/DC module and an inverter circuit;
the solar cell, the second DC/DC module, the inverter circuit and the alternating current are electrically connected in sequence.
Preferably, the photovoltaic power generation assembly further includes a filter element electrically connected to the second DC/DC module and the inverter circuit.
Preferably, the indicator light assembly comprises a green light emitting diode and a red light emitting diode, and both the green light emitting diode and the red light emitting diode are electrically connected with the CPLD.
The technical scheme provided by the utility model, following advantage has:
the indicating lamp component is electrically connected with the CPLD, and the CPLD drives the corresponding indicating lamp component to be turned on or turned off or to flash according to the plurality of charging and discharging states of the super capacitor, so that the charging and discharging states of the super capacitor can be completely represented.
Drawings
Fig. 1 is a schematic diagram of a module structure of a super capacitor state monitoring system provided by the present invention;
fig. 2 is a schematic structural diagram of a super capacitor state monitoring system provided by the present invention;
fig. 3 is a schematic diagram of a circuit structure of an external power supply and a super capacitor of a super capacitor state monitoring system provided by the present invention;
fig. 4 is a schematic circuit structure diagram of a single-channel comparator of a super capacitor state monitoring system according to the present invention;
fig. 5 is a schematic circuit structure diagram of a dual-channel comparator of a super capacitor state monitoring system according to the present invention;
fig. 6 is a schematic circuit structure diagram of a CPLD of the super capacitor state monitoring system provided by the present invention.
In the figure: 10. connecting an external power supply; 11. alternating current; 12. a rectifier; 13. an LC filter; 150. a photovoltaic power generation assembly; 15. a solar cell; 16. a first DC/DC module; 17. a storage battery; 18. a second switch; 151. a second DC/DC module; 152. a filter element; 153. an inverter circuit; 21. a first switch; 22. a single channel voltage comparator; 30. a CPLD; 40. a super capacitor; 50. a dual channel voltage comparator; 60. a load; 70. an indicator light assembly.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments.
Referring to fig. 1 and 2, an embodiment of the present invention provides a system for monitoring the state of a super capacitor 40, for monitoring the state of the super capacitor 40, wherein the system comprises: the external power supply 10 is electrically connected with the super capacitor 40, the external power supply 10 is used for providing direct current and charging the super capacitor 40, the first switch 14 is electrically connected with the external power supply 10, the single-channel voltage comparator 22 is electrically connected with the first switch 14, preferably, the single-channel voltage comparator 22 is electrically connected with the external power supply 10 and is used for collecting the voltage value of the external power supply 10 and outputting the power-off and power-on states of the external power supply 10 so as to judge whether the external power supply 10 supplies power to the outside; the first switch 14 is used for controlling connection or disconnection between the external power supply 10 and the single-channel voltage comparator 22, and the dual-channel voltage comparator 50 is electrically connected to the super capacitor 40, and is used for acquiring a current voltage value of the super capacitor 40 and outputting a magnitude relation between the current voltage value and a preset reference upper limit value and a reference lower limit value, where the magnitude relation is greater than, less than or equal to; the load 60 is electrically connected to the external power source 10 and the super capacitor 40, so as to supply power to the load 60 through the external power source 10 or the super capacitor 40, the CPLD30 is electrically connected to the single-channel voltage comparator 22 and the dual-channel voltage comparator 50, and is configured to receive whether the external power source 10 supplies power outwards and a magnitude relationship between a current voltage value of the super capacitor 40 and a preset reference upper limit value and a reference lower limit value of the dual-channel voltage comparator 50, and determine a charge-discharge state of the super capacitor 40 according to whether the external power source 10 supplies power outwards and a magnitude relationship between a current voltage value of the super capacitor 40 and a preset reference upper limit value and a preset reference lower limit value of the dual-channel voltage comparator 50, where the indication lamp assembly 70 is electrically connected to the CPLD30, and the CPLD30 drives corresponding bright portions of the indication lamp assembly 70 according to a plurality of charge-discharge states where the super capacitor 40 is located, And the super capacitor 40 is extinguished or flickered, so that different charging and discharging states of the super capacitor 40 can be monitored and completely represented by matching of the on, off or flickering of the indicator lamp.
Referring to fig. 2, the external power source 10 includes an alternating current 11, a rectifier 12 connected to the alternating current 11, an LC filter 13 electrically connected to the rectifier 12, and a first switch 14 electrically connected to the LC filter 13, wherein the first switch 14 is electrically connected to the single-channel voltage comparator 22 for controlling whether to provide a direct current to the single-channel voltage comparator 22.
Specifically, the super capacitor 40 state monitoring system further includes a photovoltaic power generation assembly 150 and a second switch 18 electrically connected to the photovoltaic power generation assembly 150, the second switch 18 is further electrically connected to the single-channel voltage comparator 22 for controlling whether to provide direct current to the single-channel voltage comparator 22, and at the same time point, at most one of the first switch 14 and the second switch 18 is electrically connected to the single-channel voltage comparator 22, so that when power is supplied, the single-channel voltage comparator 22 can be supplied with power in two ways, and the power supply manner is increased.
More specifically, the photovoltaic power generation module 150 includes a solar cell 15, a first DC/DC module, and a storage battery 17; the solar cell 15, the first DC/DC module, the storage battery 17, and the second switch 18 are electrically connected in sequence; preferably, the photovoltaic power generation assembly 150 further includes a second DC/DC module and an inverter circuit 153; the solar cell 15, the second DC/DC module, the inverter circuit 153, and the alternating current 11 are electrically connected in sequence; more preferably, the photovoltaic power generation assembly 150 further includes a filter element 152, and the filter element 152 is electrically connected to the second DC/DC module and the inverter circuit 153; in this application, the first DC/DC module is a step-down circuit, the second DC/DC module is a step-up circuit, the solar cell 15 converts solar energy into electrical energy, the electrical energy has two trends, the first trend: after being reduced by the voltage reduction circuit, the voltage is collected by the storage battery 17, so that a direct current output mode can be increased; the second trend is as follows: the voltage of the power plant is reduced, the consumption of fuel is reduced, and the environment is protected.
Specifically, the indicator light assembly 70 includes a green led and a red led, both of which are electrically connected to the CPLD 30.
How the lower supercapacitor 40 state monitoring system monitors the state of the supercapacitor 40 is described below with reference to fig. 3 to 6; please refer to fig. 3, which is a schematic diagram of a connection relationship circuit between the super capacitor 40 to be monitored and the external power source 10 in the super capacitor 40 state monitoring system. The positive electrode of the super capacitor 40BMS1 to be monitored is connected with the second end of the current-limiting resistor RT1, the first end of the current-limiting resistor RT1 is connected with the negative electrode of the first Schottky diode D1, the positive electrode of the first Schottky diode is connected with an external power supply, and the positive electrode of the second Schottky diode is connected with the positive electrode of the super capacitor 40BMS1 to be monitored. When the external power supply 10 is in a switch-on state, the current charges the super capacitor 40 to be monitored through the first Schottky diode D1 and the current-limiting resistor RT 1; when the external power supply 10 is in a power-off state, the super capacitor 40BMS1 to be monitored discharges to the load 60 through the second schottky diode D2, the negative electrode of the transient suppression diode TVS1 is connected to the external power supply 10, and the positive electrode is grounded. In order to monitor the current working state of the super capacitor 40BMS1 to be monitored, only the current voltage V1 of the anode of the super capacitor 40BMS1 to be monitored needs to be detected, wherein the transient suppression diode TVS1 is used for clamping the voltage between the anode and the cathode at a safe value, so as to realize the function of a protection circuit.
Referring to fig. 4, the first non-inverting input terminal 1IN + of the dual-channel voltage comparator 50 is connected to the second terminal of the voltage dividing resistor R1, the first inverting input terminal 1 IN-of the dual-channel voltage comparator 50 is connected to the second terminal of the voltage dividing resistor R3, and the remaining input terminals (2IN +, 2 IN-and GND) of the dual-channel voltage comparator 50 are grounded, during the specific detection process, the voltage value detected by the first non-inverting input terminal 1IN + is a voltage value obtained by dividing the current supply voltage by the voltage dividing resistor R1, the voltage value detected by the first inverting input terminal 1 IN-is a voltage value obtained by dividing the reference voltage by the voltage dividing resistor R3, the dual-channel voltage comparator 50 compares the voltage value detected by the first non-inverting input terminal 1IN + with the voltage value detected by the first inverting input terminal 1IN-, outputs a high or low level according to the comparison result, and when the voltage value detected by the first non-inverting input terminal 1IN + is greater than the voltage value detected by the first inverting input terminal, the dual-channel voltage comparator 50 outputs a high level through the first output terminal OUT1, which indicates that the external power source 10 supplies power normally; when the voltage value detected by the first non-inverting input terminal 1IN + is less than the voltage value detected by the first inverting input terminal 1IN-, the dual-channel voltage comparator 50 outputs a low level through the first output terminal OUT1, indicating that the external power source 10 is powered off.
In addition, in order to improve the stability of the state signal M1 output by the first output terminal OUT1, before the state signal M1 is output to the CPLD30, the state signal M1 may be pulled up by a pull-up resistor R11 and then output to the CPLD, and the resistance value of the pull-up resistor R11 may be set according to practical situations, which is not limited in this embodiment.
To facilitate understanding of the process of the dual-channel voltage comparator 50 detecting the current supply voltage of the external power supply 10 and obtaining the current operating state of the external power supply 10 according to the current supply voltage, taking the resistor R1 ═ 54.9K, R2 ═ 10K, R3 ═ 16.4K, R4 ═ 10K, and the reference voltage V + ═ 3.3V as an example, and as explained with reference to fig. 5, when the current supply voltage of the external power supply 10 is 12V, the voltage value detected at the first positive input terminal 1IN + of the dual-channel voltage comparator 50 is 12V [ [10/(10+54.9) ] ≈ 1.85, and the voltage value detected at the first negative input terminal 1IN — is 3.3V ≈ 10/(10+16.4) ], where the voltage value detected at the first negative input terminal 1IN + is greater than the voltage value detected at the first negative input terminal 1.85, at this time, the first output terminal OUT1 of the dual-channel voltage comparator 50 outputs a high level, which indicates that the external power source 10 is supplying power normally.
The first positive phase input end 1IN + of the second two-channel voltage comparator 50 is connected to the second end of the voltage dividing resistor R5, the first negative phase input end 1 IN-is connected to the second end of the voltage dividing resistor R9, the second positive phase input end 2IN + is connected to the second end of the voltage dividing resistor R7, the second negative phase input end 2 IN-is connected to the second end of the voltage dividing resistor R9, and the ground terminal GND is grounded.
IN the specific detection process, the second dual-channel voltage comparator 50 compares the voltage value detected by the first positive input terminal 1IN + with the voltage value detected by the first negative input terminal 1IN-, compares the voltage value detected by the second positive input terminal 2IN + with the voltage value detected by the second negative input terminal 2IN-, when the voltage value detected by the first positive input terminal 1IN + is greater than the voltage value detected by the first negative input terminal 1IN-, the first output terminal OUT1 of the second dual-channel voltage comparator 50 outputs a high level, and when the voltage value detected by the first positive input terminal 1IN + is less than the voltage value detected by the first negative input terminal 1IN-, the first output terminal OUT1 of the second dual-channel voltage comparator 50 outputs a low level; the second output terminal OUT2 of the second dual-channel voltage comparator 50 outputs a high level when the voltage value detected at the second non-inverting input terminal 2IN + is greater than the voltage value detected at the second inverting input terminal 2IN-, and the second output terminal OUT2 of the second dual-channel voltage comparator 50 outputs a low level when the voltage value detected at the second non-inverting input terminal 2IN + is less than the voltage value detected at the second inverting input terminal 2 IN-.
In addition, in order to improve the stability of the signal M2 output by the first output terminal OUT1 and the signal M3 output by the second output terminal OUT2 of the second dual-channel voltage comparator 50, before outputting the two signals to the CPLD30, the two signals M2 and M3 may be respectively pulled up by pull-up resistors R13 and R14 and then output to the CPLD30, and the resistance values of the pull-up resistors R13 and R14 may be set according to actual situations, which is not limited in this embodiment.
To facilitate understanding of the process IN which the second two-channel voltage comparator 50 detects the current voltage of the super capacitor 40 to be monitored, and obtains the current operating state of the super capacitor 40 to be monitored according to the current voltage, the process is described herein with reference to fig. 6, where R5 is 73.2K, R6 is 10K, R7 is 30.1K, R8 is 10K, R9 is 16.4K, R10 is 10K, the reference voltage V + is 3.3V, when the current voltage V1 of the external power supply is 8V, the voltage value detected at the first positive input terminal 1IN + of the second two-channel voltage comparator 50 is 8V [10/(10+73.2) ], the voltage value detected at the second positive input terminal 2IN + is 8V [10/(10+30.1) ], the first negative input terminal 1-2 IN + is 10V/(10 + 10.1) ], and the voltage value detected at the second negative input terminal 2IN + is 8V/(10.10 + 10.1 h) ], at this time, the voltage value 0.96 detected by the first non-inverting input terminal 1IN + of the second dual-channel voltage comparator 50 is smaller than the voltage value 1.25 detected by the first inverting input terminal 1IN-, and the first output terminal OUT1 of the second dual-channel voltage comparator 50 outputs a low level, which indicates that the super capacitor 40 to be monitored is IN charge or discharge; the voltage value 2.00 detected by the second non-inverting input terminal 2IN + is greater than the voltage value 1.25 detected by the second inverting input terminal 2IN-, and the second output terminal OUT2 of the second dual-channel voltage comparator 50 outputs a high level, indicating that the super capacitor 40 to be monitored is IN charge or discharge; it can be seen that only the current working state of the super capacitor 40 to be monitored at the current moment can be obtained by detecting the current voltage of the super capacitor 40 to be monitored, and therefore, in order to accurately obtain the state of the super capacitor 40 to be monitored at any moment, the current working state of the external power supply needs to be combined.
In order to accurately obtain the state of the super capacitor 40 to be monitored at any time, the CPLD30 is further configured to perform logic judgment on the current working state of the external power supply and the current working state of the super capacitor 40 to be monitored according to the state truth table of the super capacitor 40, so as to obtain a state result of the super capacitor 40 to be monitored.
It can be understood that, in the digital logic circuit, the low level represents 0, and the high level represents 1, so that, to logically determine the state of the super capacitor 40 to be monitored according to the current working state of the external power supply and the current working state of the super capacitor 40 to be monitored, a super capacitor 40 state truth table needs to be established in advance, where the super capacitor 40 state truth table is shown in the following table:
according to the definition of the truth table of the state of the super capacitor 40, a total of six states of the super capacitor 40 can be obtained: starting charging, charging in process, completing charging, starting discharging, and completing discharging in process; therefore, of the 8 states listed in the truth table, 2 states belong to undefined states. The discharge completion state represents a state in which the super capacitor 40 finishes discharging the pre-stored electric energy.
Referring to fig. 6, in the present application, a complex programmable logic device CPLD receives a signal M1 output by a first output end OUT1 of a dual-channel voltage comparator, a signal M2 output by a first output end OUT1 of a second dual-channel comparator, and a signal M3 output by a second output end OUT2 of the second dual-channel comparator, and also receives a square wave signal M4 sent by a clock signal unit, and after performing logic processing on the four signals, generates a signal M5 for driving a RED light emitting diode LED _ RED and a signal M6 for driving a GREEN light emitting diode LED _ GREEN, so that the RED light emitting diode LED _ RED and the GREEN light emitting diode LED _ GREEN display the state change of the super capacitor to be monitored according to the received driving signals. In this embodiment, the specific meaning represented by the respective light emitting states of the RED light emitting diode LED _ RED and the GREEN light emitting diode LED _ GREEN is visible in the super capacitor state indication table; the application adopts 2 way emitting diode to show the output state of pilot lamp. One green led represents the charging process and one red led represents the discharging state. The indicator light display is driven by the encoded output state value state _ out of the CPLD 30. The coded output of the indicator light display is shown in the table below.
The technical scheme provided by the utility model, following advantage has: the indicating lamp assembly 70 is electrically connected with the PLD30, and the PLD30 drives the corresponding indicating lamp assembly 70 to turn on or off or flash according to the plurality of charging and discharging states of the super capacitor 40, so that the charging and discharging states of the super capacitor 40 can be completely represented.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (7)
1. A supercapacitor condition monitoring system for monitoring the condition of a supercapacitor, the system comprising:
the external power supply is electrically connected with the super capacitor and is used for providing direct current and charging the super capacitor;
the single-channel voltage comparator is electrically connected with the external power supply and is used for collecting the voltage value of the external power supply and outputting the power-off and power-on states of the external power supply;
the double-channel voltage comparator is electrically connected with the super capacitor and used for acquiring the current voltage value of the super capacitor and outputting the magnitude relation between the current voltage value and a preset reference upper limit value and a reference lower limit value;
the load is electrically connected with the external power supply and the super capacitor so as to supply power to the load through the external power supply or the super capacitor;
the CPLD is electrically connected with the single-channel voltage comparator and the double-channel voltage comparator, is used for receiving the output and power-off states of the external power supply and the magnitude relation between the current voltage value and the preset voltage upper limit value and the preset voltage lower limit value, and judges the charge-discharge state of the super capacitor according to the output and power-off states of the external power supply and the magnitude relation between the current voltage value and the preset voltage upper limit value and the preset voltage lower limit value;
and the indicating lamp component is electrically connected with the CPLD, and the CPLD drives the corresponding indicating lamp component to be on, off or flash according to different charging and discharging states of the super capacitor.
2. The supercapacitor condition monitoring system according to claim 1, wherein the external power source comprises an alternating current, a rectifier connected to the alternating current, an LC filter electrically connected to the rectifier, and a first switch electrically connected to the LC filter, the first switch being electrically connected to the single channel voltage comparator for controlling whether to provide direct current to the single channel voltage comparator.
3. The supercapacitor condition monitoring system according to claim 2, further comprising a photovoltaic power generation assembly and a second switch electrically connected to the photovoltaic power generation assembly, the second switch being further electrically connected to the single-channel voltage comparator for controlling whether to provide direct current to the single-channel voltage comparator, and at a same point in time, at most one of the first switch and the second switch being electrically connected to the single-channel voltage comparator.
4. The supercapacitor state monitoring system according to claim 3, wherein the photovoltaic power generation assembly comprises a solar cell, a first DC/DC module and a storage battery;
the solar cell, the first DC/DC module, the storage battery and the second switch are electrically connected in sequence.
5. The supercapacitor state monitoring system according to claim 4, wherein the photovoltaic power generation assembly further comprises a second DC/DC module and an inverter circuit;
the solar cell, the second DC/DC module, the inverter circuit and the alternating current are electrically connected in sequence.
6. The supercapacitor condition monitoring system according to claim 5, wherein the photovoltaic power generation assembly further comprises a filter element electrically connected to the second DC/DC module and the inverter circuit.
7. The supercapacitor state monitoring system according to claim 1, wherein the indicator light assembly comprises a green light emitting diode and a red light emitting diode, both of which are electrically connected to the CPLD.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021675911.1U CN213122142U (en) | 2020-08-12 | 2020-08-12 | Super capacitor state monitoring system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021675911.1U CN213122142U (en) | 2020-08-12 | 2020-08-12 | Super capacitor state monitoring system |
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| CN213122142U true CN213122142U (en) | 2021-05-04 |
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| CN202021675911.1U Active CN213122142U (en) | 2020-08-12 | 2020-08-12 | Super capacitor state monitoring system |
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Denomination of utility model: A super capacitor condition monitoring system Effective date of registration: 20221214 Granted publication date: 20210504 Pledgee: Shenzhen small and medium sized small loan Co.,Ltd. Pledgor: SHENZHEN SANWAY ELECTRONICAL TECHNOLOGY Co.,Ltd. Registration number: Y2022980027468 |