CN215818450U - Signal acquisition circuit - Google Patents
Signal acquisition circuit Download PDFInfo
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- CN215818450U CN215818450U CN202121752806.8U CN202121752806U CN215818450U CN 215818450 U CN215818450 U CN 215818450U CN 202121752806 U CN202121752806 U CN 202121752806U CN 215818450 U CN215818450 U CN 215818450U
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Abstract
The utility model relates to the technical field of electronics, and discloses a signal acquisition circuit, which comprises a signal source, a signal processing circuit and a signal processing circuit, wherein the signal source is used for generating and outputting a square wave signal; the input end of the surge suppression circuit is connected with an alternating current power supply, and the output end of the surge suppression circuit is connected with the input end of the signal source and used for absorbing spike pulse signals generated when the signal source is electrified; the input end of the clamping protection circuit is connected with the output end of the signal source and is used for clamping the square wave signal to obtain a clamping signal; the input end of the acquisition circuit is connected with the output end of the clamping protection circuit and is used for acquiring the clamping signal to obtain an acquisition signal; and the input end of the negative feedback amplifying circuit is connected with the output end of the acquisition circuit and is used for amplifying the acquired signal to obtain an amplified signal and carrying out negative feedback adjustment on the amplified signal to obtain a final output signal. The utility model improves the accuracy and stability of the acquired final output signal.
Description
Technical Field
The utility model relates to the technical field of electronics, in particular to a signal acquisition circuit.
Background
The object that generates and emits the signal is called the signal source, i.e. the source of the signal. A signal source is also referred to as a signal generator, which is a device that provides electrical signals of various frequencies, waveforms and output levels. Signal generators have found wide application in production practice and in the field of science and technology. Various wave curves can be expressed by trigonometric functions. Circuit elements capable of generating various waveforms such as triangular waves, sawtooth waves, rectangular waves (including square waves), and sine waves are called function signal generators. The function signal generator has wide application in circuit experiment and equipment detection. For example, in communication, broadcasting, and television systems, radio frequency (high frequency) transmission is required, where radio frequency waves are carrier waves, which carry audio (low frequency), video signals, or pulse signals, and oscillators capable of generating high frequencies are required. Oscillators with larger or smaller power and higher or lower frequency are required in the fields of industry, agriculture, biomedicine and the like, such as high-frequency induction heating, smelting, quenching, ultrasonic diagnosis, nuclear magnetic resonance imaging and the like. However, when the output signal of the signal source is collected at present, the output signal is unstable due to the fact that the output signal of the signal source is easily interfered, and further the accuracy of the collected output signal is not high enough.
SUMMERY OF THE UTILITY MODEL
In view of the defects in the prior art, an object of the present invention is to provide a signal acquisition circuit for improving the accuracy and stability of an output signal of a signal source during the acquisition of the output signal.
In order to achieve the purpose, the utility model provides the following technical scheme: a signal acquisition circuit, comprising:
the signal source is used for generating and outputting a square wave signal;
the input end of the surge suppression circuit is connected with an alternating current power supply, and the output end of the surge suppression circuit is connected with the input end of the signal source and is used for absorbing spike pulse signals generated when the signal source is electrified;
the input end of the clamping protection circuit is connected with the output end of the signal source and is used for clamping the square wave signal to obtain a clamping signal;
the input end of the acquisition circuit is connected with the output end of the clamping protection circuit and is used for acquiring the clamping signal to obtain an acquisition signal;
and the input end of the negative feedback amplifying circuit is connected with the output end of the acquisition circuit and is used for amplifying the acquired signal to obtain an amplified signal, and the amplified signal is subjected to negative feedback adjustment to obtain a final output signal.
Further, the surge suppression circuit comprises a common-mode inductor, a differential-mode inductor, a voltage dependent resistor and a suppression capacitor;
two input ends of the common mode inductor are used as the input ends of the surge suppression circuit and connected with the alternating current power supply, and two output ends of the common mode inductor are used as the output ends of the surge suppression circuit;
the differential mode inductor and the piezoresistor are sequentially connected in series between two output ends of the common mode inductor, and the piezoresistor and the suppression capacitor are connected in parallel between the two output ends of the common mode inductor.
Further, the clamp protection circuit comprises a first capacitor, a first resistor and a first diode;
the signal source is provided with a first signal output end and a second signal output end, one end of the first capacitor is connected with the first signal output end, the other end of the first capacitor is connected with the positive output end of the clamping protection circuit, a first node is arranged between the first capacitor and the positive output end of the clamping protection circuit, a second node is arranged between the second signal output end and the negative output end of the clamping protection circuit, the first resistor and the first diode are connected between the first node and the second node in parallel, the positive electrode of the first diode is connected with the first node, the negative electrode of the first diode is connected with the second node, and the clamping protection circuit is connected with the acquisition circuit through the first node and the second node.
Further, the acquisition circuit comprises a current transformer, the current transformer has a first input end, a second input end, a first output end and a second output end, the first input end is connected with the positive output end of the clamping protection circuit, and the second input end is connected with the negative output end of the clamping protection circuit.
Furthermore, the negative feedback amplifying circuit is a resistor parallel negative feedback amplifying circuit and comprises an operational amplifier, an input resistor, a feedback resistor, a balance resistor and an amplifying resistor;
the feedback resistor is connected with the input resistor and the operational amplifier in parallel;
the operational amplifier equidirectional input end is connected with the first output end of the current transformer through the balance resistor, and the operational amplifier reverse input end is connected with the second output end of the current transformer through the input resistor and the amplifying resistor which are sequentially connected in series.
Furthermore, the negative feedback amplifying circuit further comprises a filter capacitor, and the filter capacitor is connected with the feedback resistor in parallel.
Furthermore, the negative feedback amplifying circuit further comprises an output resistor, one end of the output resistor is connected with the output end of the operational amplifier, and the other end of the output resistor is used as the output end of the negative feedback amplifying circuit.
The utility model has the beneficial effects that:
according to the utility model, the negative feedback amplifying circuit is arranged to amplify and negatively feed back the clamping signal, so that the stability of gain is improved, and the precision of the final output signal is higher; the clamping of square wave signals is realized by arranging the clamping protection circuit, and the overlarge fluctuation of input signals is avoided, so that the output clamping signals are more stable; and by arranging the surge suppression circuit, the absorption of the spike pulse signal generated when the signal source is electrified is realized, and the situation that the spike pulse signal is too large to damage all components in the signal acquisition circuit is avoided.
Drawings
Fig. 1 is a schematic diagram of the circuit of the present invention.
In the figure: 1. a signal source; 11. a first signal output terminal; 12. a second signal output terminal; 2. a surge suppression circuit; 21. a common mode inductor; 22. a differential mode inductance; 3. a clamp protection circuit; 4. an acquisition circuit; 41. a first input terminal; 42. a second input terminal; 43. a first output terminal; 44. a second output terminal; 5. a negative feedback amplifying circuit; 51. an operational amplifier.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. In which like parts are designated by like reference numerals. It should be noted that the terms "front," "back," "left," "right," "upper" and "lower" used in the following description refer to directions in the drawings, and the terms "bottom" and "top," "inner" and "outer" refer to directions toward and away from, respectively, the geometric center of a particular component.
As shown in fig. 1, a signal acquisition circuit of the present embodiment includes:
the signal source 1 is used for generating and outputting a square wave signal. Preferably, in the present embodiment, the signal source 1 may be a signal generator.
And the input end of the surge suppression circuit 2 is connected with an Alternating Current (AC) power supply, and the output end of the surge suppression circuit 2 is connected with the input end of the signal source 1 and is used for absorbing spike pulse signals generated when the signal source 1 is powered on. Preferably, the surge suppression circuit 2 includes a common mode inductor 21, a differential mode inductor 22, a voltage dependent resistor R1 and a suppression capacitor C1.
Two input ends of the common mode inductor 21 are used as input ends of the surge suppression circuit 2 and are connected with an alternating current power supply AC, and two output ends of the common mode inductor 21 are used as output ends of the surge suppression circuit 2;
the differential mode inductor 22 and the piezoresistor R1 are sequentially connected in series between the two output ends of the common mode inductor 21, and the piezoresistor R1 and the suppression capacitor C1 are connected in parallel between the two output ends of the common mode inductor 21. By arranging the common mode inductor 21 and the differential mode inductor 22 in front of the piezoresistor R1 and the suppression capacitor C1, the service life of the piezoresistor R1 is prolonged, and the durability of the technical scheme is improved. Meanwhile, the surge suppression circuit 2 is arranged, so that the spike pulse signal generated when the signal source 1 is powered on is absorbed, the situation that the spike pulse signal is too large to damage all components in the signal acquisition circuit 4 is avoided, and the safety of the technical scheme is improved.
And the input end of the clamping protection circuit 3 is connected with the output end of the signal source 1 and is used for clamping the square wave signal to obtain a clamping signal. Preferably, the clamp protection circuit 3 includes a first capacitor C2, a first resistor R2, and a first diode D1; the signal source 1 has a first signal output terminal 11 and a second signal output terminal 12, wherein the first signal output terminal 11 outputs a positive signal, and the second signal output terminal 12 outputs a negative signal; one end of the first capacitor C2 is connected with the first signal output end 11, the other end is connected with the positive output end of the clamp protection circuit 3, a first node is arranged between the first capacitor C2 and the positive output end of the clamp protection circuit 3, a second node is arranged between the second signal output end 12 and the negative output end of the clamp protection circuit 3, the first resistor R2 and the first diode D1 are connected between the first node and the second node in parallel, the positive electrode of the first diode D1 is connected with the first node, the negative electrode of the first diode D1 is connected with the second node, and the clamp protection circuit 3 is connected with the acquisition circuit 4 through the first node and the second node. Through setting up clamp protection circuit 3, realized the clamp to the square wave signal of signal source 1 output, avoided the undulant too big of input signal for the clamp signal of output is more stable.
And the input end of the acquisition circuit 4 is connected with the output end of the clamping protection circuit 3 and is used for acquiring the clamping signal to obtain an acquisition signal. Preferably, the acquisition circuit 4 comprises a current transformer having a first input 41, a second input 42, a first output 43 and a second output 44, the first input 41 being connected to the positive output of the clamp protection circuit 3, the second input 42 being connected to the negative output of the clamp protection circuit 3.
And the input end of the negative feedback amplifying circuit 5 is connected with the output end of the acquisition circuit 4 and is used for amplifying the acquired signal to obtain an amplified signal and carrying out negative feedback adjustment on the amplified signal to obtain a final output signal. Preferably, the negative feedback amplifying circuit 5 is a resistor parallel negative feedback amplifying circuit, and includes an operational amplifier 51, an input resistor R3, a feedback resistor R4, a balance resistor R5 and an amplifying resistor R6;
the feedback resistor R4 is connected in parallel with the input resistor R3 and the operational amplifier 51;
the same-direction input end of the operational amplifier 51 is connected with the first output end 43 of the current transformer through a balance resistor R5, and the reverse-direction input end of the operational amplifier 51 is connected with the second output end 44 of the current transformer through an input resistor R3 and an amplifying resistor R6 which are sequentially connected in series. Through setting up negative feedback amplifier circuit 5, amplify and negative feedback adjustment the clamp signal, promoted the gain stability of amplifying the signal for the precision of final output signal is higher.
Preferably, the negative feedback amplifying circuit 5 further includes a filter capacitor C3, and the filter capacitor C3 is connected in parallel with the feedback resistor R4. By arranging the filter capacitor C3, the filtering of signals on the feedback resistor R4 is realized, and the stability of gain is further improved.
Preferably, the negative feedback amplifying circuit 5 further includes an output resistor R7, one end of the output resistor R7 is connected to the output terminal of the operational amplifier 51, and the other end of the output resistor R7 is used as the output terminal of the negative feedback amplifying circuit 5.
The working principle is as follows:
when the signal source 1 is started, a spike pulse signal is generated, the surge suppression circuit 2 absorbs the spike pulse signal, and the situation that the spike pulse signal is too large and damages each component in the signal acquisition circuit 4 is avoided; the surge suppression circuit 2 starts to output square wave signals, and when the square wave signals fluctuate too much, the clamping protection circuit 3 clamps the square wave signals to obtain clamping signals, and the clamping signals are output to the acquisition circuit 4. The current transformer in the acquisition circuit 4 acquires the clamp signal to obtain an acquired signal, the operational amplifier 51 in the negative feedback amplification circuit 5 amplifies the clamp signal to obtain an amplified signal, and the feedback resistor R4 performs negative feedback adjustment on the gain of the amplified signal to obtain a final output signal for output, so that the stability and the accuracy of the final output signal are improved.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above-mentioned embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the utility model may occur to those skilled in the art without departing from the principle of the utility model, and are considered to be within the scope of the utility model.
Claims (7)
1. A signal acquisition circuit, comprising:
the signal source (1) is used for generating and outputting a square wave signal;
the input end of the surge suppression circuit (2) is connected with an alternating current power supply, and the output end of the surge suppression circuit is connected with the input end of the signal source (1) and is used for absorbing spike pulse signals generated when the signal source (1) is powered on;
the input end of the clamping protection circuit (3) is connected with the output end of the signal source (1) and is used for clamping the square wave signal to obtain a clamping signal;
the input end of the acquisition circuit (4) is connected with the output end of the clamping protection circuit (3) and is used for acquiring the clamping signal to obtain an acquisition signal;
the negative feedback amplifying circuit (5), the input of negative feedback amplifying circuit (5) is connected the output of acquisition circuit (4), be used for right gather the signal and amplify, obtain an amplified signal, and right the amplified signal carries out negative feedback adjustment, obtains a final output signal.
2. The signal acquisition circuit of claim 1, wherein: the surge suppression circuit (2) comprises a common-mode inductor (21), a differential-mode inductor (22), a piezoresistor R1 and a suppression capacitor C1;
two input ends of the common mode inductor (21) are used as the input ends of the surge suppression circuit (2) and are connected with the alternating current power supply, and two output ends of the common mode inductor (21) are used as the output ends of the surge suppression circuit (2);
the differential mode inductor (22) and the piezoresistor R1 are sequentially connected in series between two output ends of the common mode inductor (21), and the piezoresistor R1 and the suppression capacitor C1 are connected in parallel between the two output ends of the common mode inductor (21).
3. The signal acquisition circuit of claim 1, wherein: the clamp protection circuit (3) comprises a first capacitor C2, a first resistor R2 and a first diode D1;
the signal source (1) has a first signal output (11) and a second signal output (12), one end of the first capacitor C2 is connected with the first signal output end (11), the other end is connected with the positive output end of the clamping protection circuit (3), a first node is arranged between the first capacitor C2 and the positive output end of the clamping protection circuit (3), a second node is arranged between the second signal output end (12) and the negative output end of the clamping protection circuit (3), the first resistor R2 and the first diode D1 are connected in parallel between the first node and the second node, the anode of the first diode D1 is connected to the first node, the cathode of the first diode D1 is connected to the second node, the clamping protection circuit (3) is connected with the acquisition circuit (4) through the first node and the second node.
4. The signal acquisition circuit of claim 3, wherein: the acquisition circuit (4) comprises a current transformer, the current transformer is provided with a first input end (41), a second input end (42), a first output end (43) and a second output end (44), the first input end (41) is connected with the positive output end of the clamping protection circuit (3), and the second input end (42) is connected with the negative output end of the clamping protection circuit (3).
5. The signal acquisition circuit of claim 4, wherein: the negative feedback amplifying circuit (5) is a resistor parallel negative feedback amplifying circuit (5) and comprises an operational amplifier (51), an input resistor R3, a feedback resistor R4, a balance resistor R5 and an amplifying resistor R6;
the feedback resistor R4 is connected in parallel with the input resistor R3 and the operational amplifier (51);
the same-direction input end of the operational amplifier (51) is connected with the first output end (43) of the current transformer through the balancing resistor R5, and the reverse input end of the operational amplifier (51) is connected with the second output end (44) of the current transformer through the input resistor R3 and the amplifying resistor R6 which are sequentially connected in series.
6. The signal acquisition circuit of claim 5, wherein: the negative feedback amplifying circuit (5) further comprises a filter capacitor C3, and the filter capacitor C3 is connected with the feedback resistor R4 in parallel.
7. The signal acquisition circuit of claim 5, wherein: the negative feedback amplifying circuit (5) further comprises an output resistor R7, one end of the output resistor R7 is connected with the output end of the operational amplifier (51), and the other end of the output resistor R7 is used as the output end of the negative feedback amplifying circuit (5).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121752806.8U CN215818450U (en) | 2021-07-29 | 2021-07-29 | Signal acquisition circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202121752806.8U CN215818450U (en) | 2021-07-29 | 2021-07-29 | Signal acquisition circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215818450U true CN215818450U (en) | 2022-02-11 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202121752806.8U Active CN215818450U (en) | 2021-07-29 | 2021-07-29 | Signal acquisition circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215818450U (en) |
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2021
- 2021-07-29 CN CN202121752806.8U patent/CN215818450U/en active Active
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