CN215734632U

CN215734632U - PCB compatible with two types of concentrator chips

Info

Publication number: CN215734632U
Application number: CN202122092137.2U
Authority: CN
Inventors: 丁永波; 吴胜广
Original assignee: Shenzhen Weibu Information Co Ltd
Current assignee: Shenzhen Weibu Information Co Ltd
Priority date: 2021-08-31
Filing date: 2021-08-31
Publication date: 2022-02-01
Anticipated expiration: 2031-08-31

Abstract

The utility model discloses a PCB board compatible with two types of concentrator chips, which comprises: the control module, a first chip area used for carrying out chip mounting on the electronic device in the first isolation circuit, a second chip area used for carrying out chip mounting on the electronic device in the second isolation circuit, a third chip area used for carrying out chip mounting on the electronic device in the first concentrator circuit module, a fourth chip area used for carrying out chip mounting on the electronic device in the second concentrator circuit module, and the clock circuit module; a USB interface of the control module is simultaneously connected with the first patch area and the second patch area; conductive pins which are electrically connected with each other are arranged between the first patch area and the third patch area; conductive pins which are electrically connected with each other are arranged between the second patch area and the fourth patch area; the third chip area comprises a bonding pad of the first type concentrator chip; the fourth patch area includes pads of a second type of hub chip. The scheme can avoid production stagnation caused by chip shortage.

Description

PCB compatible with two types of concentrator chips

Technical Field

The utility model relates to the technical field of electronic circuits, in particular to a PCB compatible with two types of concentrator chips.

Background

Universal Serial Bus (USB) is a Serial Bus standard. The USB interface has the characteristics of unified standard, access of portable equipment and hot plug realization, so that the USB interface has greater advantages compared with the traditional parallel and serial interfaces and is widely applied to hardware circuits.

The rapid application of the USB interface also puts pressure on the hardware circuit design. In some scenarios, the customer needs more USB interfaces to realize rich functions, but the native USB interface of the control module, such as the CPU, is limited, which may result in an insufficient USB interface. In this context, a HUB chip (HUB IC) and a HUB circuit module are also applied and developed, for example, a HUB chip of "one-to-eight" type can output an input upper USB signal through eight secondary USB interfaces (of course, the signal transmission direction may be opposite), so that more USB interfaces can be extended.

However, the inventor finds in research that with the increasing demand for hub chips, the purchase of hardware circuit designers is also stressed. In the production process, the situation that the required concentrator chip is in short supply is often encountered, and the production of the PCB board product is stopped.

Accordingly, there is a need for improvement in response to the problems of the prior art.

Disclosure of Invention

In view of the above, there is a need to provide a PCB board compatible with two types of hub chips, which can be alternatively produced by mounting one of the two types of hub chips on the board surface, compared with the prior art, so that when there is a shortage of one of the hub chips, the other hub chip can be used instead, thereby reducing the purchasing pressure of hardware circuit designers and avoiding the production stagnation as much as possible.

To solve the above technical problem, the present invention provides a PCB board compatible with two types of hub chips, including: the control module, a first chip area used for carrying out chip mounting on the electronic device in the first isolation circuit, a second chip area used for carrying out chip mounting on the electronic device in the second isolation circuit, a third chip area used for carrying out chip mounting on the electronic device in the first concentrator circuit module, a fourth chip area used for carrying out chip mounting on the electronic device in the second concentrator circuit module, and the clock circuit module;

a USB interface of the control module is simultaneously connected with the conductive pins in the first patch area and the second patch area; conductive pins which are electrically connected with each other are arranged between the first patch area and the third patch area; conductive pins which are electrically connected with each other are arranged between the second patch area and the fourth patch area;

the third chip area comprises a bonding pad of a first type concentrator chip; the fourth patch area comprises a bonding pad of a second type hub chip;

and the clock signal of the clock circuit module is simultaneously connected with the clock signal pins of the first type hub chip bonding pad and the second type hub chip bonding pad.

Optionally, the first patch area and the third patch area are disposed on one board surface of the PCB, and the second patch area and the fourth patch area are disposed on the other opposite board surface of the PCB.

Optionally, the first patch area is provided with an electronic device of a first isolation circuit, the third patch area is provided with an electronic device of a first concentrator circuit module, and the second patch area and the fourth patch area are suspended and not provided with patches; or

The second patch area is provided with an electronic device of a second isolation circuit, the fourth patch area is provided with an electronic device of a second concentrator circuit module, and the first patch area and the third patch area are suspended and not attached.

Optionally, the first isolation circuit and the second isolation circuit are both a combination of a resistor, an inductor, and a capacitor.

Optionally, the first hub circuit module and the second hub circuit module have the same secondary USB interface.

Optionally, the first type HUB chip in the first HUB circuit module is a GL850 HUB chip.

Optionally, the second type HUB chip in the second HUB circuit module is an FE1.1 HUB chip.

Optionally, the clock circuit module includes a crystal oscillator, the crystal oscillator includes first to fourth pins, the second and fourth pins are grounded, the first pin and the third pin are used as clock signal outputs, and the first pin and the third pin are connected through a resistor.

Optionally, the first pin and the third pin are grounded through capacitors, respectively.

The technical scheme of the embodiment of the utility model has the beneficial effects that:

the PCB compatible with two types of hub chips provided by the embodiment of the utility model comprises a control module, first to fourth patch areas and a clock circuit module, wherein the first patch area can be provided with a first isolation circuit, the second patch area can be provided with a second isolation circuit, the third patch area can be provided with a first hub circuit module, the fourth patch area can be provided with a second hub circuit module, the first hub circuit module contains a first type of hub chip, the second hub circuit module contains a second type of hub chip, and the clock circuit module can provide a clock signal for one of the first hub chip and the second hub chip, so that the technology can selectively carry out patch compared with the prior art, when one type of hub chip is in shortage, the other type of hub chip can be used for substitution, therefore, the purchasing pressure of hardware circuit design manufacturers can be reduced, and production stagnation can be avoided as far as possible.

Drawings

Fig. 1 is a schematic structural diagram of a PCB board compatible with two types of hub chips according to an embodiment of the present invention;

FIG. 2A is a schematic circuit diagram of a first isolation circuit and a second isolation circuit in one embodiment of the utility model;

FIG. 2B is a circuit schematic of a first hub circuit block in one embodiment of the utility model;

FIG. 2C is a circuit schematic of a second hub circuit block in one embodiment of the utility model;

fig. 2D is a circuit schematic of a clock circuit block in one embodiment of the utility model.

The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that the description relating to "first", "second", etc. in the present invention is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.

In the description of the embodiments of the present invention, it is to be understood that, in the description of the present invention, "a plurality" means two or more unless otherwise specified. "and/or" describes the association relationship of the associated objects, meaning that three relationships may exist, e.g., A and/or B. Can represent that: a exists alone, A and B exist simultaneously, and B exists alone.

It will also be understood that when an element is referred to as being "fixed" or "disposed" or "connected" to another element, it can be directly or indirectly secured to the other element. The terms "upper", "lower", "outer", "distal", "far away", and the like, refer to an orientation or position based on that shown in the drawings, which is for convenience of description only and is not to be construed as limiting the present disclosure.

Referring to fig. 1 and fig. 2A to 2D, in an embodiment of the present invention, a schematic structural diagram of a PCB board compatible with two types of hub chips is provided.

Specifically, in the embodiment of fig. 1, a PCB board 100 is provided, which includes: the control module 101, a first patch area 102 for performing patch mounting on the electronic device in the first isolation circuit, a second patch area 103 for performing patch mounting on the electronic device in the second isolation circuit, a third patch area 104 for performing patch mounting on the electronic device in the first hub circuit module, a fourth patch area 105 for performing patch mounting on the electronic device in the second hub circuit module, and a clock circuit module 106.

In electrical connection, a USB interface of the control module 101 is connected to the conductive pins in the first patch area 102 and the second patch area 103; the first patch region 102 and the third patch region 104 have conductive pins electrically connected to each other; the second patch area 103 and the fourth patch area 105 have electrically conductive pins electrically connected to each other.

In this embodiment, the third die area 104 includes a pad of the first type of hub die; the fourth patch area 105 includes pads of a second type of hub chip. The clock signal of the clock circuit module 106 is connected to the clock signal pins of the first type of hub chip pad and the second type of hub chip pad at the same time.

Further, in an embodiment of the present invention, in order to perform signal isolation better, make the lengths of signal transmission lines as long as possible consistent, and satisfy the characteristics of symmetrical design, the first patch area 102 and the second patch area 103 may be symmetrically disposed on two sides of the PCB 100, and the third patch area 104 and the fourth patch area 105 may be symmetrically disposed on two sides of the PCB 100, that is, the first patch area 102 and the third patch area 104 are disposed on one board surface of the PCB 100, and the second patch area 103 and the fourth patch area 105 are disposed on the other opposite board surface of the PCB 100. It can be seen that fig. 1 is only a schematic diagram of an embodiment of the present invention, and in some embodiments, the first to fourth chip areas cannot be simultaneously seen on one board surface of the PCB 100.

In some embodiments of the present invention, the PCB board 100 may be selectively subjected to the die bonding. There are two alternative ways:

first, the first patch area 102 has the electronic devices of the first isolation circuit attached thereto, the third patch area 104 has the electronic devices of the first hub circuit module attached thereto, and the second patch area 103 and the fourth patch area 105 are left free from the attached devices. The electrical connection relationship of the circuit formed in this case is: the control module 101 is connected to a first isolation circuit, the first isolation circuit is connected to a first hub circuit module, and the first hub circuit module is connected to the clock circuit module 106.

Second, the second patch area 103 has the electronic devices of the second isolation circuit, the fourth patch area 105 has the electronic devices of the second hub circuit module, and the first patch area 102 and the third patch area 104 are not mounted. The electrical connection relationship of the circuit formed in this case is: the control module 101 is connected to a second isolation circuit, the second isolation circuit is connected to a second hub circuit module, and the second hub circuit module is connected to the clock circuit module 106.

Referring to fig. 2A to 2D together, the principle of circuit design is illustrated in an embodiment of the present invention.

As shown in FIG. 2A, USB2_ HOST2_ DP and USB2_ HOST2_ DM are USB signals output in the control module (such as but not limited to native USB signals provided by the CPU). The USB signal output by the control module is connected with the first concentrator circuit module through the first isolation circuit, and the USB signal output by the control module is connected with the second concentrator circuit module through the second isolation circuit. The first isolation circuit and the second isolation circuit may be a combination of resistive, capacitive, inductive elements. In this embodiment, due to the characteristics of USB high-speed signal transmission, the first isolation circuit and the second isolation circuit may be resistors. The first isolation circuit comprises resistors R90767 and R90770, and the second isolation circuit comprises resistors R90768 and R90769. The USB signal output by the control module is output as the USB signal input of the first type hub chip by the first isolation circuit outputs GL _ HOST3_ DP and GL _ HOST3_ DM. Similarly, the USB signals output by the control module pass through the second isolation circuit outputs FE1_ HOST3_ DP and FE1_ HOST3_ DM as USB signal inputs to the second type of hub chip.

Generally, in embodiments of the present invention, the first type of hub chip and the second type of hub chip have the same secondary USB signal output. In the embodiment of the present invention, only 4 sets of USB signal outputs are taken as an example. For example, in one embodiment of the present invention, the first type HUB chip is a GL850 HUB chip, and the second type HUB chip is a FE1.1 HUB chip.

Referring to fig. 2B, which is a schematic circuit diagram of the first HUB circuit block, the device U2 is a GL850 HUB chip.

Pins

1 and 2 of U2 are connected to USB signals output by the control module via the first isolation circuit, and pins 3, 4, 6, 7, 12, 13, 15, and 16 can output 4 sets of secondary USB signals in total.

Pins

10 and 11 of device U2 are used as clock signal inputs. The remaining pins of device U2 need to be connected to power or ground, or to be pulled high via a resistor, etc., and will not be described further herein.

Fig. 2C is a schematic circuit diagram of the second hub circuit block. The device U21 is an FE1.1 HUB chip. The FE1.1 HUB chip can also implement 1 set of USB signal inputs to 4 sets of secondary USB signal outputs (although the signal transmission direction may be reversed).

Fig. 2D is a clock circuit block shared by the GL850 HUB chip and the FE1.1 HUB chip in the circuit schematic. Specifically, the clock circuit module includes a crystal oscillator X1, the crystal oscillator X1 includes first to fourth pins, the second and fourth pins are grounded, the first pin and the third pin are used as clock signal outputs, and the first pin and the third pin are connected through a resistor. The first pin and the third pin are grounded through capacitors respectively. The crystal oscillator X1 may be a crystal oscillator at a frequency of 12 MHZ.

the PCB board compatible with two types of hub chips provided in the above embodiments includes a control module, first to fourth patch areas, and a clock circuit module, the first patch area may be provided with a first isolation circuit, the second patch area may be provided with a second isolation circuit, the third patch area may be provided with a first hub circuit module, the fourth patch area may be provided with a second hub circuit module, the first hub circuit module includes a first type of hub chip, the second hub circuit module includes a second type of hub chip, and the clock circuit module may provide a clock signal for one of the first hub chip and the second hub chip, so that the technology may selectively perform the patch compared with the prior art, and when there is a shortage in one type of hub chip, the other type of hub chip may be used for replacement, therefore, the purchasing pressure of hardware circuit design manufacturers can be reduced, and production stagnation can be avoided as far as possible.

It will be evident to those skilled in the art that the utility model is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof.

The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the utility model being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference signs in the claims shall not be construed as limiting the claim concerned.

Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. A plurality of units or means recited in the system claims may also be implemented by one unit or means in software or hardware. The terms second, etc. are used to denote names, but not any particular order.

Finally, it should be noted that the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention is described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.

Claims

1. A PCB board compatible with two types of hub chips, comprising: the control module, a first chip area used for carrying out chip mounting on the electronic device in the first isolation circuit, a second chip area used for carrying out chip mounting on the electronic device in the second isolation circuit, a third chip area used for carrying out chip mounting on the electronic device in the first concentrator circuit module, a fourth chip area used for carrying out chip mounting on the electronic device in the second concentrator circuit module, and the clock circuit module;

2. The PCB of claim 1, wherein the first and third patch areas are disposed on one face of the PCB, and the second and fourth patch areas are disposed on the other, opposite face of the PCB.

3. The PCB board compatible with two types of hub chips according to claim 1 or 2, wherein the first patch area is pasted with electronic devices of a first isolation circuit, the third patch area is pasted with electronic devices of a first hub circuit module, and the second patch area and the fourth patch area are not pasted with the electronic devices in the air; or

4. The PCB board of claim 3, wherein the first isolation circuit and the second isolation circuit are all a combination of resistive, inductive, and capacitive elements.

5. The PCB board of claim 3, wherein the first hub circuit module and the second hub circuit module have the same secondary USB interface.

6. The PCB board of claim 5, wherein the first type of HUB chip in the first HUB circuit module is a GL850 HUB chip.

7. The PCB board of claim 5, wherein the second HUB circuit module comprises a second type HUB chip and a second HUB circuit module, wherein the second type HUB chip is a FE1.1 HUB chip.

8. The PCB board compatible with two types of hub chips according to claim 1, wherein the clock circuit module comprises a crystal oscillator, the crystal oscillator comprises first to fourth pins, the second and fourth pins are grounded, the first pin and the third pin are used as clock signal outputs, and the first pin and the third pin are connected through a resistor.

9. The PCB board compatible with two types of hub chips according to claim 8, wherein the first pin and the third pin are grounded through capacitors, respectively.