CN215646737U - Power amplifying circuit, radio frequency processing chip and electronic equipment - Google Patents
Power amplifying circuit, radio frequency processing chip and electronic equipment Download PDFInfo
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- CN215646737U CN215646737U CN202122325858.3U CN202122325858U CN215646737U CN 215646737 U CN215646737 U CN 215646737U CN 202122325858 U CN202122325858 U CN 202122325858U CN 215646737 U CN215646737 U CN 215646737U
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Abstract
The application provides a power amplification circuit, a radio frequency processing chip and electronic equipment, and relates to the technical field of electricians and electronics. The power amplification circuit includes: the device comprises a power divider, a first detector, a first operational amplifier, a first differential amplifier, a second differential amplifier, an analog attenuator, a first amplifier, a second detector, a second operational amplifier and a coupler; the output end of the first differential amplifier is electrically connected with the first input end of the second differential amplifier, the second input end of the second differential amplifier is used for inputting a preset reference voltage, and the output end of the second differential amplifier is electrically connected with the control end of the analog attenuator, so that the analog attenuator is adjusted based on the voltage difference output by the second differential amplifier, and the voltage difference output by the first differential amplifier is equal to the preset reference voltage. The function of quickly adjusting the specified gain amplification of the input radio frequency signal is realized.
Description
Technical Field
The utility model relates to an electrician's electronic technology field particularly, relates to a power amplification circuit, radio frequency processing chip and electronic equipment.
Background
With the continuous development of electronic technology, technicians use automatic gain control circuits to process input signals to solve the signal strength problem in various technologies.
The existing automatic gain control circuit utilizes input and output detection and difference calculation, and then utilizes software to calculate and complete the adjustment of an attenuator.
This adjustment method requires several detection-adjustment steps to complete the adjustment, and is not in place in one step and takes a long time.
SUMMERY OF THE UTILITY MODEL
The present invention is directed to provide a power amplifier circuit, a radio frequency processing chip and an electronic device, so as to shorten the adjustment time of the agc circuit.
In order to achieve the above purpose, the technical solutions adopted in the embodiments of the present application are as follows:
in a first aspect, an embodiment of the present application provides a power amplification circuit, including: the device comprises a power divider, a first detector, a first operational amplifier, a first differential amplifier, a second differential amplifier, an analog attenuator, a first amplifier, a second detector, a second operational amplifier and a coupler;
the input end of the power divider is used for receiving an input radio frequency signal, the first output end of the power divider is electrically connected with the input end of the first detector, the second output end of the power divider is electrically connected with the input end of the coupler sequentially through the analog attenuator and the first amplifier, and the first output end of the coupler is used for outputting the amplified radio frequency signal;
the output end of the first detector is electrically connected with the first input end of the first differential amplifier through the first operational amplifier, the second output end of the coupler is electrically connected with the input end of the second detector, the output end of the second detector is electrically connected with the second input end of the first differential amplifier through the second operational amplifier, the output end of the first differential amplifier is electrically connected with the first input end of the second differential amplifier, the second input end of the second differential amplifier is used for inputting a preset reference voltage, and the output end of the second differential amplifier is electrically connected with the control end of the analog attenuator, so that the analog attenuator is adjusted based on the voltage difference output by the second differential amplifier, and the voltage difference output by the first differential amplifier is equal to the preset reference voltage.
Optionally, the power amplifying circuit further includes: and the first output end of the power divider is electrically connected with the input end of the first detector through the second amplifier.
Optionally, the power amplifying circuit further includes: and the output end of the processing chip is connected with the second input end of the second differential amplifier so as to provide the preset reference voltage through the processing chip.
Optionally, the power amplifying circuit further includes: a first switch, a second switch, a third switch and a fourth switch;
the common end of the first switch is electrically connected with the output end of the first detector, and the first state end of the first switch is electrically connected with the input end of the first operational amplifier;
the common end of the second switch is electrically connected to the output end of the second detector, and the first state end of the second switch is electrically connected to the input end of the second operational amplifier;
the public end of the third switch is electrically connected with the output end of the processing chip, and the first state end of the third switch is electrically connected with the second input end of the second differential amplifier;
and the public end of the fourth switch is electrically connected with the control end of the analog attenuator, and the first state end of the fourth switch is electrically connected with the output end of the second differential amplifier.
Optionally, the power amplifying circuit further includes: a third operational amplifier and a fourth operational amplifier;
the second state end of the first switch is electrically connected with the input end of the third operational amplifier, the output end of the third operational amplifier is electrically connected with the first input end of the processing chip, the second state end of the second switch is electrically connected with the input end of the fourth operational amplifier, the output end of the fourth operational amplifier is electrically connected with the second input end of the processing chip, and the second state end of the third switch is electrically connected with the second state end of the fourth switch.
Optionally, the first amplifier is composed of: at least one amplifier is connected in series in sequence.
Optionally, the second amplifier is composed of: at least one amplifier is connected in series in sequence.
Optionally, the processing chip is a field programmable gate array chip.
In a second aspect, an embodiment of the present application further provides a radio frequency processing chip, including: the power amplifier circuit according to any one of the first aspect, and the modem module, wherein the power amplifier circuit is connected to the modem module.
In a third aspect, an embodiment of the present application further provides an electronic device, including: the radio frequency processing chip of the second aspect and the baseband chip, wherein the modem module in the radio frequency processing chip is further connected to the baseband chip.
The beneficial effect of this application is: an embodiment of the present application provides a power amplification circuit, including: the device comprises a power divider, a first detector, a first operational amplifier, a first differential amplifier, a second differential amplifier, an analog attenuator, a first amplifier, a second detector, a second operational amplifier and a coupler.
The input end of the power divider is used for receiving an input radio frequency signal, the first output end of the power divider is electrically connected with the input end of the first detector, and the second output end of the power divider sequentially passes through the analog attenuator to divide the input radio frequency signal into two paths. The first amplifier for amplifying the radio-frequency signal is electrically connected with the input end of the coupler, and the coupler outputs the radio-frequency signal for detection to the second detector through the second output end under the condition that the influence of the coupler on the radio-frequency signal output and amplified by the first output end is small as much as possible; the first detector output signal is amplified through the first operational amplifier, the amplified signal is transmitted to a first input end of the first differential amplifier, the second detector output signal is amplified through the second operational amplifier, the amplified signal is transmitted to a second input end of the first differential amplifier, the first differential amplifier processes the voltages of the two input ends and outputs the result to a first input end of the second differential amplifier, the second differential amplifier processes the input and a preset reference voltage and outputs the voltage difference to a control end of the analog attenuator, so that the analog attenuator is adjusted based on the voltage difference output by the second differential amplifier, and the voltage difference output by the first differential amplifier is equal to the preset reference voltage.
The gain value to be adjusted is rapidly calculated through two-stage operation of the first differential amplifier and the second differential amplifier, the adjustment of the gain is realized through the analog attenuator, and the adjustment of the gain is different from the adjustment of the gain realized through multiple detection-adjustment-detection-adjustment of a software power amplification circuit.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a schematic diagram of a power amplifier circuit according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a power amplifier circuit according to another embodiment of the present application;
fig. 3 is a schematic diagram of a power amplifier circuit according to another embodiment of the present application;
fig. 4 is a schematic diagram of a power amplifier circuit according to yet another embodiment of the present application;
fig. 5 is a schematic diagram of a power amplifier circuit according to yet another embodiment of the present application;
fig. 6 is a schematic diagram of a power amplifier circuit according to yet another embodiment of the present application;
fig. 7 is a schematic diagram of an rf processing chip according to an embodiment of the present disclosure;
fig. 8 is a schematic view of an electronic device according to an embodiment of the present application.
Legend: 11-power divider; 13-a first detector; 15-a first operational amplifier; 17-a first differential amplifier; 19-a second differential amplifier; 21-an analog attenuator; 23-a first amplifier; 25-a second detector; 27-a second operational amplifier; 29-a coupler; 31-a second amplifier; 33-processing the chip; k1 — first switch; k2 — second switch; k3 — third switch; k4-fourth switch; 43-a third operational amplifier; 45-a fourth operational amplifier; 100-radio frequency processing chip; 71-a power amplification circuit; 73-a modem module; 1000-an electronic device; 300-baseband chip.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention.
In this application, unless explicitly stated or limited otherwise, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one feature. In the description of the present invention, "a plurality" means at least two, for example, two, three, unless specifically defined otherwise. The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such article or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of additional like elements in the article or device comprising the element.
Most of the automatic regulation functions of the existing power amplification circuits (power amplification automatic gain control circuits) adopt input and output detection and store the input and output detection values as corresponding input and output power values. When the automatic gain control is started, the magnitude of the input and output signal values is read out through the stored data, then difference is made, the magnitude of the difference is calculated through software, the attenuation value is confirmed, and the attenuator is adjusted. When attenuation adjustment is performed by software, the attenuation steps need to be approached step by step. For example, attenuation is performed from small to large, and the attenuation is adjusted to 5dB first, and then adjusted to 2dB, 0.2dB, etc., until the target value is reached. In the case of gradual attenuation, it takes a relatively long adjustment time.
In order to shorten the adjusting time of an automatic gain control circuit, the application provides a power amplifying circuit, a radio frequency processing chip and an electronic device.
Fig. 1 is a schematic diagram of a power amplifier circuit according to an embodiment of the present disclosure; as shown in fig. 1, the power amplifying circuit includes: the power divider 11, the first detector 13, the first operational amplifier 15, the first differential amplifier 17, the second differential amplifier 19, the analog attenuator 21, the first amplifier 23, the second detector 25, the second operational amplifier 27, and the coupler 29.
An input end of the power divider 11 is configured to receive an input radio frequency signal, a first output end of the power divider 11 is electrically connected to an input end of the first detector 13, a second output end of the power divider 11 is electrically connected to an input end of the coupler 29 through the analog attenuator 21 and the first amplifier 23 in sequence, and a first output end of the coupler 29 is configured to output the amplified radio frequency signal.
The output end of the first detector 13 is electrically connected to the first input end of the first differential amplifier 17 through the first operational amplifier 15, the second output end of the coupler 29 is electrically connected to the input end of the second detector 25, the output end of the second detector 25 is electrically connected to the second input end of the first differential amplifier 17 through the second operational amplifier 27, the output end of the first differential amplifier 17 is electrically connected to the first input end of the second differential amplifier 19, the second input end of the second differential amplifier 19 is used for inputting a preset reference voltage, and the output end of the second differential amplifier 19 is electrically connected to the control end of the analog attenuator 21, so that the analog attenuator 21 adjusts based on the voltage difference output by the second differential amplifier 19, so that the voltage difference output by the first differential amplifier 17 is equal to the preset reference voltage.
A radio frequency signal is input from an input end of the power divider 11, the power divider 11 divides the input radio frequency signal into two paths of signals after receiving the input radio frequency signal, and one path of signal is transmitted to an input end of the first detector 13 through a first output end of the power divider after the power divider finishes power division; the other path of signal is transmitted to the analog attenuator 21 through the second output terminal of the power divider, and the other path of signal passes through the first amplifier 23 and the coupler 29 in sequence, and then the amplified radio frequency signal is output through the first output terminal of the coupler 29.
It should be noted that a power divider (also called a power divider) is a device that divides a path of input signal energy into two or more paths of output equal or unequal energy. The power divider 11 in the present application may select one-to-two (one input end and two output ends) power divider, one-to-three (one input end and three output ends) and other types according to the required output, and the specific type of the power divider is not limited in the present application as long as it has at least one input end and two output ends to meet the requirements of the power amplifying circuit in the present application.
In addition, the power split by the first output terminal and the second output terminal of the power splitter 11 may be the same or different. For example, if the power of the first output terminal of the power divider 11 is P1 and the power of the second output terminal of the power divider 11 is P2 when the power of the first output terminal and the power of the second output terminal are the same, P1 is P2; for another example, when the power split between the first output terminal and the second output terminal is different, the power split between the two terminals is performed according to the requirement, for example, the power split between the first output terminal power P1 of the power splitter 11 and the second output terminal power P2 of the power splitter 11 is performed according to a ratio of 1:2, then P1: p2 ═ 1: 2.
The foregoing is merely an example, and in an actual implementation, different power divider types may be selected, different power division ratios of the power dividers may be set, and the like according to different usage scenarios and requirements of the power dividers, which is not limited in this application. In addition, the power divider can be a microstrip power divider, a resistance-type power divider, a waveguide power divider and the like, and a user can select the power divider according to factors such as cost and use requirements, and the power divider is not limited in the application.
An input end of the first detector 13 receives the signal output by the first output end of the power divider 11, and detects the input signal, and the detected signal is electrically connected to a first input end of the first differential amplifier 17 through the first operational amplifier 15.
The detector is a device that detects information from a fluctuation signal. In particular, the detector may be used to identify the presence or change of a wave, oscillation or signal and extract information carried in the wave, oscillation or signal.
In the present application, the first detector 13 receives an input radio frequency signal after power division, and outputs a dc signal (dc voltage signal) obtained after detection. The first detector 13 may be an envelope detector, a synchronous detector, or the like, and the specific type, model, or the like of the first detector is not limited in the present application, and detection of the input radio frequency signal may be implemented.
In the present application, the second detector 25 receives the input rf signal after power division and outputs a dc signal (dc voltage signal) obtained after detection. The second detector 25 may be an envelope detector, a synchronous detector, or the like, and the specific type, model, or the like of the second detector is not limited in the present application, and detection may be implemented.
It should be further noted that the coupler is a component for proportionally splitting and outputting the radio frequency signal, and in the splitting, the coupler can split the radio frequency signal under the condition of less influence on the main path signal.
In the present application, the coupler 29 divides the received radio frequency signal output by the first amplifier 23 into two paths, and one path of signal is output through the first output end of the coupler 29, that is, the output radio frequency signal; the other signal is output via a second output of coupler 29 to the input of second detector 25. In this process, the coupler 29 has little influence on the signal of the first output terminal (i.e., the main path signal) while ensuring the output of the second output terminal.
In one possible implementation, the function of the coupler 29 may be implemented by using a power divider, but the power divider may have a large influence on the first output signal (i.e., the main path signal) due to its structural characteristics.
The above description is merely an example, and in actual implementation, there may be other selection ways for the coupler 29, and the present application is not limited thereto, and the function of the power amplification circuit of the present application may be implemented.
It should be further noted that the operational amplifier is a circuit unit with a very high amplification factor, and has the characteristics of suppressing zero drift of the input electrode and strong loading capacity of the output electrode. The type, model and the like of the first operational amplifier and the second operational amplifier are not limited, and a user can select the type, model and the like of the first operational amplifier and the second operational amplifier according to actual use requirements.
In the present application, the signal output by the first detector 13 is amplified by the first operational amplifier, the amplified signal is transmitted to the first input terminal of the first differential amplifier 17, the signal output by the second detector 25 is amplified by the second operational amplifier 27, the amplified signal is input to the second input terminal of the first differential amplifier 17, the first differential amplifier 17 processes the signal difference input by the first input terminal and the second input terminal to obtain a differential signal, and the differential signal is output to the first input terminal of the second differential amplifier 19. Meanwhile, a preset reference voltage is input to a second input terminal of the second differential amplifier 19, and the second differential amplifier 19 processes a difference value between the input differential signal of the first differential amplifier 17 and the preset reference voltage to obtain a second differential signal (i.e., a voltage difference), and outputs the second differential signal.
Here, it should be noted that the differential amplifier is an electronic amplifier that amplifies the difference between voltages at two input terminals with a fixed gain. The specific types, models and the like of the first differential amplifier and the second differential amplifier are not limited, and the use requirements can be met. The first differential amplifier and the second differential amplifier may amplify the differential value obtained at the input ends thereof by 1 time or any other times according to the use requirement, which is not limited in the present application.
In a specific implementation manner, the output voltage of the first operational amplifier 15 is V1, the output voltage of the second operational amplifier 27 is V2, and the gain multiples of the first differential amplifier 17 and the second differential amplifier 19 are both 1, then the output voltage V3 of the first differential amplifier 17 is V1-V2, V3 is used as an input of the first input terminal of the second differential amplifier 19, the preset reference voltage V0 is used as an input of the second input terminal of the second differential amplifier 19, and the output V4 of the second differential amplifier 19 is V0-V1.
The output terminal of the second differential amplifier 19 is connected to the control terminal of the analog attenuator 21, and when the output signal (voltage difference) of the second differential amplifier 19 is not equal to zero, the analog attenuator 21 adjusts its gain value based on the voltage difference output by the second differential amplifier 19, so that the output signal (voltage difference) of the second differential amplifier 19 is equal to zero, i.e., the voltage difference output by the first differential amplifier 17 is equal to the preset reference voltage.
It should be noted that, according to the target output rf signal and the target input rf signal, a gain value may be determined, each gain value has a unique corresponding reference voltage, and the gain value and the reference voltage are summarized to obtain a gain-reference voltage comparison table. By reading the table, when a gain value is set, a unique reference voltage (i.e., a preset reference voltage) is corresponding to the gain value. The user can set the preset reference voltage according to the required gain value.
In another possible implementation, if the gain value changes, the reference voltage is determined again and then adjusted through the above-mentioned adjusting step.
In a possible implementation manner, the user may set the preset reference voltage by using an output device such as a regulated power supply, and the setting manner of the preset reference voltage is not limited in the present application as long as the preset reference voltage can be output.
In summary, an embodiment of the present application provides a power amplification circuit, including: the device comprises a power divider, a first detector, a first operational amplifier, a first differential amplifier, a second differential amplifier, an analog attenuator, a first amplifier, a second detector, a second operational amplifier and a coupler.
The input end of the power divider is used for receiving an input radio frequency signal, the first output end of the power divider is electrically connected with the input end of the first detector, and the second output end of the power divider sequentially passes through the analog attenuator to divide the input radio frequency signal into two paths. The first amplifier for amplifying the radio-frequency signal is electrically connected with the input end of the coupler, and the coupler outputs the radio-frequency signal for detection to the second detector through the second output end under the condition that the influence of the coupler on the radio-frequency signal output and amplified by the first output end is small as much as possible; the first detector output signal is amplified through the first operational amplifier, the amplified signal is transmitted to a first input end of the first differential amplifier, the second detector output signal is amplified through the second operational amplifier, the amplified signal is transmitted to a second input end of the first differential amplifier, the first differential amplifier processes the voltages of the two input ends and outputs the result to a first input end of the second differential amplifier, the second differential amplifier processes the input and a preset reference voltage and outputs the voltage difference to a control end of the analog attenuator, so that the analog attenuator is adjusted based on the voltage difference output by the second differential amplifier, and the voltage difference output by the first differential amplifier is equal to the preset reference voltage.
The gain value to be adjusted is rapidly calculated through two-stage operation of the first differential amplifier and the second differential amplifier, the adjustment of the gain is realized through the analog attenuator, and the method is different from the method for realizing the gain adjustment through multiple detection-adjustment-detection-adjustment of a software power amplification circuit.
Optionally, on the basis of fig. 1, the present application further provides a possible implementation manner of a power amplifier circuit, and fig. 2 is a schematic diagram of a power amplifier circuit according to another embodiment of the present application; as shown in fig. 2, the power amplification circuit further includes: and a second amplifier 31, through which a first output end of the power divider is electrically connected to an input end of the first detector.
It should be noted that the amplifier is a device capable of amplifying the voltage or power of the input signal in this application, the second amplifier 31 may be composed of a transistor or a transistor, a power transformer, and other electrical components, and the application does not limit the specific type, model, and the like of the second amplifier 31, and may be capable of realizing the signal amplification function.
In a possible implementation manner, the amplification factor of the second amplifier 31 may be matched with the power distribution condition of the power divider 11, for example, the power divider 11 equally divides the input radio frequency signal into two output radio frequency signals, that is, the radio frequency signal input in the second amplifier 31 is half of the power of the input radio frequency signal of the power divider 11, and at this time, the received input radio frequency signal may be amplified twice by the second amplifier 31, that is, the signal may be restored to the state of the same power as the input radio frequency signal before power division by the power divider 11. For another example, when the first output end power P1 of the power divider 11 and the second output end power P2 of the power divider 11 perform power division according to a ratio of 1:2, the first output end power of the power divider 11 is one third of the power of the input radio frequency signal, so that the second amplifier 31 amplifies the received input radio frequency signal by three times, that is, the signal can be restored to the same state as the power of the input radio frequency signal before the power divider 11 performs power division.
In another possible implementation manner, the amplification factor of the second amplifier 31 may be matched with the correlation factor of the first detector 13, that is, the signal may be adjusted by the second amplifier 31, so that the signal output by the second amplifier 31 can be detected by the first detector 13; alternatively, the signal may be adjusted by the second amplifier 31, so that the signal output from the second amplifier 31 is better detected by the first detector 13.
The second amplifier 31 of the present invention may be a single amplifier or a combination of a plurality of amplifiers (for example, a plurality of amplifiers are connected in series, a plurality of amplifiers are connected by a specific connection form, or the like), and the present invention is not limited thereto, and the present invention may be configured to amplify the radio frequency signal before the first detector 13.
The above is merely an example, and in practical use, there may be other setting manners of the specific amplification factor of the second amplifier 31, which is not limited in this application, and the power amplification function of the circuit of this application may be implemented cooperatively.
Through setting up the second amplifier, adjust the radio frequency signal after the merit divides, can make the signal after the adjustment the same with the input radio frequency signal before the merit divides on the one hand, on the other hand can make the signal after the adjustment better by the first detector detection, realize the function of the power amplifier circuit of this application better.
Optionally, on the basis of fig. 1, the present application further provides a possible implementation manner of a power amplifier circuit, and fig. 3 is a schematic diagram of a power amplifier circuit according to another embodiment of the present application; as shown in fig. 3, the power amplification circuit further includes: and the output end of the processing chip 33 is connected with the second input end of the second differential amplifier 19, so that the preset reference voltage is provided through the processing chip 33.
In a possible implementation manner, the processing chip 33 stores a gain-reference voltage comparison table, and since each gain value has a unique reference voltage corresponding to it, after the gain value is set, the processing chip 33 may look up the table to obtain the corresponding preset reference voltage. The output terminal of the processing chip 33 is connected to the second input terminal of the second differential amplifier 19, and the processing chip 33 can provide the preset reference voltage to the second differential amplifier 19.
Optionally, on the basis of fig. 3, the present application further provides a possible implementation manner of a power amplifier circuit, and fig. 4 is a schematic diagram of a power amplifier circuit according to yet another embodiment of the present application; as shown in fig. 4, the power amplification circuit further includes: a first switch K1, a second switch K2, a third switch K3, and a fourth switch K4;
the common end of the first switch K1 is electrically connected with the output end of the first detector, and the first state end of the first switch K1 is electrically connected with the input end of the first operational amplifier;
the common end of the second switch K2 is electrically connected to the output end of the second detector, and the first state end of the second switch K2 is electrically connected to the input end of the second operational amplifier;
the common end of the third switch K3 is electrically connected with the output end of the processing chip, and the first state end of the third switch K3 is electrically connected with the second input end of the second differential amplifier;
the common end of the fourth switch K4 is electrically connected with the control end of the analog attenuator, and the first state end of the fourth switch K4 is electrically connected with the output end of the second differential amplifier.
When the first switch K1, the second switch K2, the third switch K3, and the fourth switch K4 are all turned on at the first state end (i.e., #1 end in the figure), the power amplifying circuit of the above embodiment can be implemented.
Optionally, on the basis of fig. 4, the present application further provides a possible implementation manner of a power amplifier circuit, and fig. 5 is a schematic diagram of a power amplifier circuit according to yet another embodiment of the present application; as shown in fig. 5, the power amplification circuit further includes: a third operational amplifier 43 and a fourth operational amplifier 45;
the second state terminal of the first switch K1 is electrically connected to the input terminal of the third operational amplifier 43, the output terminal of the third operational amplifier 43 is electrically connected to the first input terminal of the processing chip 33, the second state terminal of the second switch K2 is electrically connected to the input terminal of the fourth operational amplifier 45, the output terminal of the fourth operational amplifier 45 is electrically connected to the second input terminal of the processing chip 33, and the second state terminal of the third switch K3 is electrically connected to the second state terminal of the fourth switch K4.
When the second state terminals (i.e., #2 terminal in the figure) of the first switch K1, the second switch K2, the third switch K3 and the fourth switch K4 are all turned on, the input terminal of the first detector 13 receives the signal output by the first output terminal of the power divider 11, and then detects the input signal, and the detected signal is electrically connected to the first input terminal of the processing chip 33 through the third operational amplifier 43.
The processing chip 33 stores the signal output from the third operational amplifier 43 received from the first input terminal as an input power value, and stores the signal output from the fourth operational amplifier 45 received from the second input terminal as an output power value. When the processing and adjustment are performed, the processing chip 33 reads the stored input power value and output power value, subtracts the input power value from the output power value to obtain a difference value between the two, and further calculates the corresponding attenuation/gain value. After obtaining the attenuation/gain value, the processing chip 33 adjusts the analog attenuator 21 until the desired attenuation/gain value is reached.
When the attenuation/gain adjustment is performed on the analog attenuator 21, it is necessary to step closer the attenuation/gain step by step. For example, when attenuation is controlled, attenuation may be performed from small to large, and the attenuation may be performed by 5dB, 2dB, 0.2dB, or the like until the target value is adjusted.
By switching the conduction states of the first switch, the second switch, the third switch and the fourth switch, when the first switch, the second switch, the third switch and the fourth switch are all conducted at the first end, the automatic gain adjustment of the power amplification circuit on the hardware level is realized through the two differential amplifiers, the quick adjustment can be completed only by one-time monitoring, and the reaction speed is greatly improved. When the four switches are all at the second end and are conducted, the automatic gain adjustment of the software level is realized through software, and although the adjustment time is long, the gain adjustment of a low-power signal can be realized. The switching of hardware and software power amplification modes is realized by switching the states of the four switches, so that the power amplification circuit can amplify high-power signals and low-power signals, and is flexible in use mode and wide in use range.
Optionally, on the basis of fig. 1, the present application further provides a possible implementation manner of a power amplifier circuit, and fig. 6 is a schematic diagram of a power amplifier circuit provided in yet another embodiment of the present application; as shown in fig. 6, the first amplifier is composed of: at least one amplifier is connected in series in sequence.
It should be noted that the first amplifier 23 in the present application may be composed of a plurality of amplifiers connected in series, so as to achieve the step-by-step amplification of the signal, for example, the first amplifier 23 in fig. 6 is composed of two amplifiers connected in series, so as to achieve two-stage amplification of the input signal.
The above is merely an example, and the number of amplifiers included in the first amplifier is not limited in the present application, and a user may determine the number of amplifiers according to actual needs.
Optionally, on the basis of fig. 1, the present application further provides a possible implementation manner of the power amplifying circuit, wherein the second amplifier is formed by: at least one amplifier is connected in series in sequence.
It should be noted that the second amplifier 31 in this application may be composed of a plurality of amplifiers connected in series, where the functions performed by each amplifier may be the same or different. For example, the second amplifier 31 may be composed of two amplifiers connected in series, and both of the amplifiers are intended to amplify a signal so as to satisfy the detection range of the first detector 13. As another example, the second amplifier 31 may be composed of two amplifiers connected in series, wherein, along the direction of the input signal, the first amplifier is set to restore the received signal to the same power as the input rf signal before the power divider 11 performs power division, and the second amplifier is set to amplify the input signal so as to satisfy the detection range of the first detector 13.
The above is merely an example, and the present application does not limit the number of amplifiers included in the second amplifier 31, and may be configured to meet the user demand.
Optionally, on the basis of fig. 3, the present application further provides a possible implementation manner of the power amplifying circuit, wherein the processing chip 33 is a field programmable gate array chip.
It should be noted that the processing chip 33 may be in the form of a Field Programmable Gate Array (FPGA), a single chip, or the like, and the specific form of the processing chip is not limited in the present application as long as it can provide a preset reference voltage to the second differential amplifier.
The function of the processing chip is realized by utilizing the field programmable gate array chip, the parallelism is high, the compiling is simple, and the cost is low.
Specific implementation processes and technical effects of the radio frequency processing chip and the electronic device including the power amplifying circuit provided by the present application are described below, and are not described in detail below.
The embodiment of the application provides a possible implementation example of a radio frequency processing chip. Fig. 7 is a schematic diagram of a radio frequency processing chip according to an embodiment of the present disclosure, as shown in fig. 7, the radio frequency processing chip may be integrated in a terminal device, and the terminal device may be a computing device with a data processing function.
The rf processing chip 100 includes: the power amplifier circuit 71 and the modulation and demodulation module 73 are connected, and the power amplifier circuit 71 and the modulation and demodulation module 73 are connected. The power amplifier circuit 71 may be any one of the power amplifier circuits provided in the above embodiments, and its specific implementation and technical effects are similar, and are not described herein again.
The embodiment of the application provides a possible implementation example of an electronic device. Fig. 8 is a schematic view of an electronic device according to an embodiment of the present application, and as shown in fig. 8, the electronic device 1000 includes: in any of the radio frequency processing chips 100 and the baseband chip 300 provided in the above embodiments, the modem module in the radio frequency processing chip 100 is further connected to the baseband chip 300.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A power amplification circuit, comprising: the device comprises a power divider, a first detector, a first operational amplifier, a first differential amplifier, a second differential amplifier, an analog attenuator, a first amplifier, a second detector, a second operational amplifier and a coupler;
the input end of the power divider is used for receiving an input radio frequency signal, the first output end of the power divider is electrically connected with the input end of the first detector, the second output end of the power divider is electrically connected with the input end of the coupler sequentially through the analog attenuator and the first amplifier, and the first output end of the coupler is used for outputting the amplified radio frequency signal;
the output end of the first detector is electrically connected with the first input end of the first differential amplifier through the first operational amplifier, the second output end of the coupler is electrically connected with the input end of the second detector, the output end of the second detector is electrically connected with the second input end of the first differential amplifier through the second operational amplifier, the output end of the first differential amplifier is electrically connected with the first input end of the second differential amplifier, the second input end of the second differential amplifier is used for inputting a preset reference voltage, and the output end of the second differential amplifier is electrically connected with the control end of the analog attenuator, so that the analog attenuator is adjusted based on the voltage difference output by the second differential amplifier, and the voltage difference output by the first differential amplifier is equal to the preset reference voltage.
2. The power amplification circuit of claim 1, further comprising: and the first output end of the power divider is electrically connected with the input end of the first detector through the second amplifier.
3. The power amplification circuit of claim 1, further comprising: and the output end of the processing chip is connected with the second input end of the second differential amplifier so as to provide the preset reference voltage through the processing chip.
4. The power amplification circuit of claim 3, further comprising: a first switch, a second switch, a third switch and a fourth switch;
the common end of the first switch is electrically connected with the output end of the first detector, and the first state end of the first switch is electrically connected with the input end of the first operational amplifier;
the common end of the second switch is electrically connected to the output end of the second detector, and the first state end of the second switch is electrically connected to the input end of the second operational amplifier;
the public end of the third switch is electrically connected with the output end of the processing chip, and the first state end of the third switch is electrically connected with the second input end of the second differential amplifier;
and the public end of the fourth switch is electrically connected with the control end of the analog attenuator, and the first state end of the fourth switch is electrically connected with the output end of the second differential amplifier.
5. The power amplification circuit of claim 4, further comprising: a third operational amplifier and a fourth operational amplifier;
the second state end of the first switch is electrically connected with the input end of the third operational amplifier, the output end of the third operational amplifier is electrically connected with the first input end of the processing chip, the second state end of the second switch is electrically connected with the input end of the fourth operational amplifier, the output end of the fourth operational amplifier is electrically connected with the second input end of the processing chip, and the second state end of the third switch is electrically connected with the second state end of the fourth switch.
6. The power amplification circuit of claim 1, wherein the first amplifier is formed by: at least one amplifier is connected in series in sequence.
7. The power amplification circuit of claim 2, wherein the second amplifier is formed by: at least one amplifier is connected in series in sequence.
8. The power amplification circuit of claim 3, wherein the processing chip is a field programmable gate array chip.
9. A radio frequency processing chip, comprising: the power amplifier circuit according to any of claims 1 to 8, and a modem module, said power amplifier circuit being connected to said modem module.
10. An electronic device, comprising: the rf processing chip of claim 9, and a baseband chip, wherein the modem module of the rf processing chip is further connected to the baseband chip.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122325858.3U CN215646737U (en) | 2021-09-24 | 2021-09-24 | Power amplifying circuit, radio frequency processing chip and electronic equipment |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202122325858.3U CN215646737U (en) | 2021-09-24 | 2021-09-24 | Power amplifying circuit, radio frequency processing chip and electronic equipment |
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| CN215646737U true CN215646737U (en) | 2022-01-25 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117579008A (en) * | 2024-01-17 | 2024-02-20 | 南京纳特通信电子有限公司 | Overload signal prevention automatic adjusting device and adjusting method for power amplifier system |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117579008A (en) * | 2024-01-17 | 2024-02-20 | 南京纳特通信电子有限公司 | Overload signal prevention automatic adjusting device and adjusting method for power amplifier system |
| CN117579008B (en) * | 2024-01-17 | 2024-04-02 | 南京纳特通信电子有限公司 | Overload signal prevention automatic adjusting device and adjusting method for power amplifier system |
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