CN215642681U - Interface circuit for upgrading SOC (system on chip) program - Google Patents

Interface circuit for upgrading SOC (system on chip) program Download PDF

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CN215642681U
CN215642681U CN202122114489.3U CN202122114489U CN215642681U CN 215642681 U CN215642681 U CN 215642681U CN 202122114489 U CN202122114489 U CN 202122114489U CN 215642681 U CN215642681 U CN 215642681U
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soc
link
circuit
connection terminal
resistor
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黄鑫杰
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Huizhou Desay SV Automotive Co Ltd
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Huizhou Desay SV Automotive Co Ltd
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Abstract

The application relates to an interface circuit for upgrading an SOC program, which is applied to an automobile electronic product and comprises a connector, an SOC chip and a switch circuit connected between the connector and the SOC chip; the connector is provided with second link, third link, fourth link, the SOC chip is provided with data negative signal end, data positive signal end and starts the configuration end, second link, third link respectively with data negative signal end, data positive signal end are connected, the fourth link passes through switch circuit with it connects to start the configuration end. The beneficial effect of this application is: this application sets up the switch circuit and is connected with the OTG data line, has realized the selection of SOC procedure starting mode and has carried out the program upgrade to SOC, has optimized SOC's starting mode, and is totally different with common SOC procedure upgrading method, and efficiency is higher, and the reliability is better.

Description

Interface circuit for upgrading SOC (system on chip) program
Technical Field
The present application relates to the field of automotive electronics, and more particularly, to an interface circuit for upgrading an SOC program.
Background
At present, there is an application of the SOC program upgrading method, as shown in fig. 1, there are SOCs in the product: starting a configuration end BOOT, firstly, carrying out short circuit on a BOOT pin and a point A by using a jump cap, setting the BOOT pin to be connected to VCC, namely, a high level, and setting the BOOT to be 1, so that a BOOT loader can be started from a system memory, and the BOOT loader is in a downloading mode; with the help of the BootLoader, a program is downloaded to a Flash memory Flash through a serial port or an SD card, after the program is downloaded and upgraded, a BOOT pin and a point B need to be in short circuit through a jump cap, the pin is connected to GND (ground potential) which is a low level, the BOOT is set to 0, the BootLoader is in a starting and loading mode, and therefore the SOC can be started from the Flash and the system runs normally.
The general SOC chip has the disadvantages that the downloading and upgrading of programs by using a serial port or an SD card are troublesome, a jump cap needs to be manually plugged and unplugged, so that the user experience is not emphasized very much, and meanwhile, static electricity and surge are easily introduced, and the chip is easily damaged; on the other hand, the transmission speed of the serial port or the SD card is low, and the user needs to wait for a long time under the condition that the firmware upgrade package is large, so that the efficiency is low.
Disclosure of Invention
To overcome the above problems in the prior art, the present application provides an interface circuit for SOC program upgrade.
An interface circuit for upgrading an SOC program is applied to an automobile electronic product, and comprises a connector, an SOC chip and a switch circuit connected between the connector and the SOC chip;
the connector is provided with second link, third link, fourth link, the SOC chip is provided with data negative signal end, data positive signal end and starts the configuration end, second link, third link respectively with data negative signal end, data positive signal end are connected, the fourth link passes through switch circuit with it connects to start the configuration end.
Optionally, the switch circuit includes a first triode and a first filter circuit, a base of the first triode is connected to the fourth connection terminal, an emitter of the first triode is connected to a first power supply terminal of the automotive electronic product, and a collector of the first triode is connected to the start configuration terminal through the first filter circuit.
Optionally, the first filter circuit at least includes a third resistor and a first capacitor, one end of the third resistor is connected to the first triode, the other end of the third resistor is connected to the start configuration end and the first capacitor, and the other end of the first capacitor is grounded.
Optionally, the first transistor is a PNP transistor.
Optionally, the collector of the first triode is further connected with a second resistor.
Optionally, the switching circuit further includes a first voltage dividing circuit, where the first voltage dividing circuit includes at least one first resistor, and the first resistor is connected between the base and the emitter of the first transistor.
Optionally, the switching circuit further includes a second voltage divider circuit, where the second voltage divider circuit includes at least one fourth resistor, and the fourth resistor is connected between the base of the first transistor and the fourth connection terminal.
Optionally, an electrostatic tube is further connected between the second connection end and the third connection end, a first end of the electrostatic tube is connected to the second connection end, a second end of the electrostatic tube is connected to the third connection end, and a third end of the electrostatic tube is grounded.
Optionally, a second capacitor is further connected to the fourth connection terminal.
Optionally, the connector is further provided with a first connection end and a fifth connection end, the first connection end is connected with the second power supply end of the automobile electronic product, and the fifth connection end is grounded.
Compared with the prior art, the beneficial effects of this application are: this application sets up the switch circuit and is connected with the OTG data line, has realized the selection of SOC procedure starting mode and has carried out the program upgrade to SOC, has optimized SOC's starting mode, and is totally different with common SOC procedure upgrading method, and efficiency is higher, and the reliability is better.
Drawings
Fig. 1 is a schematic diagram of an interface circuit in the prior art.
Fig. 2 is a schematic diagram of an interface circuit according to an embodiment of the present application.
Detailed Description
The present application will be further described with reference to the following detailed description.
The same or similar reference numerals in the drawings of the embodiments of the present application correspond to the same or similar components; in the description of the present application, it is to be understood that the terms "upper", "lower", "left", "right", "top", "bottom", "inner", "outer", and the like, if any, are used in the orientations and positional relationships indicated in the drawings only for the convenience of describing the present application and for simplicity of description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and therefore the terms describing the positional relationships in the drawings are for illustrative purposes only and are not to be construed as limiting the present patent.
Furthermore, if the terms "first," "second," and the like are used for descriptive purposes only, they are used for mainly distinguishing different devices, elements or components (the specific types and configurations may be the same or different), and they are not used for indicating or implying relative importance or quantity among the devices, elements or components, but are not to be construed as indicating or implying relative importance.
In the embodiment shown in fig. 2, the present application provides an interface circuit for SOC program upgrade, which is applied in an automotive electronic product, and comprises a connector J1, an SOC chip U1, and a switch circuit connected between the connector J1 and the SOC chip U1; the connector J1 is provided with a second connection terminal P2, a third connection terminal P3 and a fourth connection terminal P4, the SOC chip U1 is provided with a data negative signal terminal USB _ DM, a data positive signal terminal USB _ DP and a start configuration terminal FORCED _ USB _ BOOT, the second connection terminal P2 and the third connection terminal P3 are respectively connected with the data negative signal terminal USB _ DM and the data positive signal terminal USB _ DP, and the fourth connection terminal P4 is connected with the start configuration terminal FORCED _ USB _ BOOT through a switch circuit. The switch circuit comprises a first triode Q1 and a first filter circuit, the base of the first triode Q1 is connected with a fourth connecting end P4, the emitting electrode is connected with a first power supply end VCC of an automobile electronic product, and the collecting electrode is connected with a starting configuration end FORCED _ USB _ BOOT through the first filter circuit. The first filter circuit at least comprises a third resistor R3 and a first capacitor C1, one end of the third resistor R3 is connected with the first triode Q1, the other end of the third resistor R3 is connected with a starting configuration end FORCED _ USB _ BOOT and the first capacitor C1, and the other end of the first capacitor C1 is grounded. The first transistor Q1 is a PNP transistor. The collector of the first triode Q1 is also connected with a second resistor R2. The switch circuit further comprises a first voltage dividing circuit comprising at least one first resistor R1, the first resistor R1 being connected between the base and emitter of the first transistor Q1. The switching circuit further comprises a second voltage divider circuit comprising at least one fourth resistor R4, the fourth resistor R4 being connected between the base of the first transistor Q1 and a fourth connection P4. An electrostatic tube D1 is further connected between the second connection end P2 and the third connection end P3, a first end of the electrostatic tube D1 is connected with the second connection end P2, a second end is connected with the third connection end P3, and a third end is grounded. The fourth connection P4 is further connected to a second capacitor C2. The connector J1 is further provided with a first connecting end and a fifth connecting end, the first connecting end is connected with a second power supply end VBUS of the automobile electronic product, and the fifth connecting end is grounded. In this embodiment, a first power supply terminal VCC of an automotive electronic product is a set of power supplies inside the product, a second power supply terminal VBUS of the automotive electronic product is a power supply inside the product for supplying power to USB devices, U1 is an SOC chip U1, FORCED _ USB _ BOOT is a startup configuration terminal FORCED _ USB _ BOOT inside the SOC, J1 is a micro-USB connector J1 female socket, USB _ DM is a data negative signal terminal USB _ DM of the SOC chip U1, USB _ DP is a data positive signal terminal USB _ DP of the SOC chip U1, USB _ BOOT is connected to a fourth connection terminal P4, i.e. an ID pin, of the connector J1 and is an input signal of the external BOOT of the product, R1 and R4 constitute a voltage division circuit for providing a base bias voltage and current, Q1 is a PNP triode, a collector C of a first triode Q1 is connected to FORCED _ USB _ BOOT through R3, a base Q45B is controlled by USB _ BOOT, a first triode Q _ BOOT emitter is connected to a pull-down resistor 85 2, r3 and C1 form an RC low-pass filter to remove high-frequency signal interference, D1 is an electrostatic tube on the USB data line, and C2 is a filter capacitor. The SOC chip is a conventional system-level chip, and SOC chips of any type in the prior art can be upgraded through the interface circuit.
In some embodiments, a common MicroUSB 2.0 line is 4 pins, with Vbus and GND for power transfer and Data +, Data-for Data transfer. The OTG line is 5 pins, wherein Vbus and GND are used for power transmission, Data + and Data-are used for Data transmission, and ID is that an A interface is connected with a ground wire. The connector of the application includes first link, second link P2, third link P3, fourth link P4, fifth link, and five links correspond with 5 stitches respectively, as shown in Table 1.
Figure BDA0003244397280000041
TABLE 1
The working principle of the circuit is as follows:
when an external device is connected to the J1 through a common MicroUSB 2.0 line: the USB _ BOOT is in a floating state, no current passes through the base electrode of the Q1, no current passes through the emitter electrode, and the Q1 is in a cut-off state, namely is disconnected; therefore, the FORCED _ USB _ BOOT pin is directly connected to GND through R2 and R3, the value detected by the pin is low level, the SOC is in a normal operating mode, and the external device and the SOC can perform ordinary USB data transmission.
When an external device is connected to J1 through an OTG line: the USB _ BOOT is connected with the ID to be grounded, the USB _ BOOT is at a low level at the moment, the base voltage of Q1 is VCC R4/(R1+ R4), the voltage of an emitter is only higher than 0.7V of the base, Q1 is conducted, the voltage drop of an EC end is ignored, the voltage of a collector is VCC, the FORCED _ USB _ BOOT pin is connected to the collector through R3 at the moment, the detected value of the pin is VCC which is at a high level, the SOC enters a USB _ BOOT program downloading mode, and the program is upgraded into the SOC by the external equipment through USB data. When the program is upgraded, the OTG line is disconnected from J1, Q1 is in an off state, the value detected by the FORCED _ USB _ BOOT pin is low, and the SOC returns to the normal operating mode.
This application sets up the switch circuit and is connected with the OTG data line, has realized the selection of SOC procedure starting mode and has carried out the program upgrade to SOC, has optimized SOC's starting mode, and is totally different with common SOC procedure upgrading method, and efficiency is higher, and the reliability is better.
It should be understood that the above examples of the present application are only examples for clearly illustrating the present application, and are not intended to limit the embodiments of the present application. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present application shall be included in the protection scope of the claims of the present application.

Claims (10)

1. An interface circuit for upgrading an SOC program is applied to an automobile electronic product and comprises a connector, an SOC chip and a switch circuit connected between the connector and the SOC chip;
the connector is provided with second link, third link, fourth link, the SOC chip is provided with data negative signal end, data positive signal end and starts the configuration end, second link, third link respectively with data negative signal end, data positive signal end are connected, the fourth link passes through switch circuit with it connects to start the configuration end.
2. The interface circuit for upgrading SOC program of claim 1, wherein the switch circuit comprises a first transistor and a first filter circuit, the base of the first transistor is connected to the fourth connection terminal, the emitter is connected to the first power supply terminal of the automotive electronics, and the collector is connected to the start-up configuration terminal through the first filter circuit.
3. The interface circuit for SOC program upgrade according to claim 2, wherein the first filter circuit at least includes a third resistor and a first capacitor, one end of the third resistor is connected to the first transistor, the other end of the third resistor is connected to the start configuration terminal and the first capacitor, and the other end of the first capacitor is grounded.
4. The interface circuit of claim 3, wherein the first transistor is a PNP transistor.
5. The interface circuit for upgrading the SOC program of claim 4, wherein a second resistor is further connected to the collector of the first transistor.
6. The interface circuit for SOC program upgrade of claim 2, wherein the switch circuit further comprises a first voltage divider circuit, the first voltage divider circuit comprising at least one first resistor, the first resistor being connected between the base and emitter of the first transistor.
7. The interface circuit for SOC program upgrade according to claim 2, wherein the switch circuit further comprises a second voltage divider circuit, the second voltage divider circuit comprising at least one fourth resistor, the fourth resistor being connected between the base of the first transistor and the fourth connection terminal.
8. The interface circuit for SOC program upgrade according to claim 1, wherein an electrostatic tube is further connected between the second connection terminal and the third connection terminal, a first end of the electrostatic tube is connected to the second connection terminal, a second end of the electrostatic tube is connected to the third connection terminal, and a third end of the electrostatic tube is grounded.
9. The interface circuit for SOC program upgrade according to claim 1, wherein a second capacitor is further connected to the fourth connection terminal.
10. The interface circuit for upgrading the SOC program according to claim 1, wherein the connector further comprises a first connection terminal and a fifth connection terminal, the first connection terminal is connected to the second power supply terminal of the automotive electronic product, and the fifth connection terminal is grounded.
CN202122114489.3U 2021-09-02 2021-09-02 Interface circuit for upgrading SOC (system on chip) program Active CN215642681U (en)

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CN202122114489.3U CN215642681U (en) 2021-09-02 2021-09-02 Interface circuit for upgrading SOC (system on chip) program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122114489.3U CN215642681U (en) 2021-09-02 2021-09-02 Interface circuit for upgrading SOC (system on chip) program

Publications (1)

Publication Number Publication Date
CN215642681U true CN215642681U (en) 2022-01-25

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