CN215581117U - Antenna diplexer circuit and power amplifier transmitting module - Google Patents

Antenna diplexer circuit and power amplifier transmitting module Download PDF

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CN215581117U
CN215581117U CN202122370395.2U CN202122370395U CN215581117U CN 215581117 U CN215581117 U CN 215581117U CN 202122370395 U CN202122370395 U CN 202122370395U CN 215581117 U CN215581117 U CN 215581117U
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周佳辉
郭嘉帅
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Shenzhen Volans Technology Co Ltd
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Shenzhen Volans Technology Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/50—Circuits using different frequencies for the two directions of communication
    • H04B1/52—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
    • H04B1/525—Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa with means for reducing leakage of transmitter signal into the receiver

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  • Computer Networks & Wireless Communication (AREA)
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Abstract

The utility model provides an antenna diplexer circuit and a power amplifier transmitting module, the antenna diplexer circuit comprising a first port for connecting a first signal, a second port for connecting an antenna, a third port for connecting a second signal, a first matching circuit and a second matching circuit, wherein the first signal is transmitted between the first port and the second port through the first matching circuit, the second signal is transmitted between the third port and the second port through the second matching circuit, the second matching circuit comprises a second filter arranged between the third port and the second port, a second impedance matcher connected between the second filter and the second port, a third filter connected between the second port and the ground and a resonant unit connected between the third port and the second filter, by the above manner, the isolation between the first signal and the second signal can be improved, and the mutual interference of the two signals can be reduced.

Description

Antenna diplexer circuit and power amplifier transmitting module
Technical Field
The utility model belongs to the field of mobile communication, and particularly relates to an antenna diplexer circuit and a power amplifier transmitting module.
Background
In mobile communication, in order to meet the requirement of peak rate per user and system capacity increase, one of the most direct methods is to increase the transmission bandwidth of the system. The LTE-Advanced system thus introduces a technique to increase the transmission bandwidth, namely CA. In order to implement multi-band carrier aggregation, an antenna diplexer circuit is generally used in a radio frequency front end module of a mobile phone to better implement band separation. The existing antenna diplexer circuit has insufficient mutual suppression capability at high frequency and low frequency, and is difficult to adapt to actual requirements.
SUMMERY OF THE UTILITY MODEL
Based on this, in a first aspect, the present invention provides an antenna diplexer circuit, including:
a first port for connection to a first processing circuit, the first processing circuit processing a first signal;
a second port for connecting an antenna;
a third port, configured to connect to a second processing circuit, where the second processing circuit processes a second signal, an operating frequency of the second signal is lower than an operating frequency of the first signal, and the first signal and the second signal share the antenna;
a first matching circuit including a first filter disposed between the first port and the second port and a first impedance matcher connected between the first filter and the second port;
a second matching circuit including a second filter disposed between the third port and the second port, a second impedance matcher connected between the second filter and the second port, a third filter connected between the second port and ground, and a resonance unit connected between the third port and the second filter, the second impedance matcher including a first resonance capacitor, an impedance matching inductor, and an impedance matching capacitor, the first resonance capacitor and the impedance matching inductor being connected in parallel to form a first parallel structure, one end of the first parallel structure being connected to one end of the impedance matching capacitor, the other end of the parallel structure being connected to the second port, the other end of the impedance matching capacitor being connected to the second filter, the resonance unit including a resonance inductor and a second resonance capacitor forming a second parallel structure, one end of the second parallel structure is connected with the third port, and the other end of the second parallel structure is connected with the second filter.
Optionally, the first filter is connected between the first impedance matcher and ground;
the first filter includes a first resonator and a second resonator connected in series, the first resonator including a first inductor and a first capacitor connected in parallel; the second resonator includes a second inductor and a second capacitor connected in series.
Optionally, the first resonator resonates at a first harmonic frequency or a second harmonic frequency, and the second resonator resonates at the first harmonic frequency or the second harmonic frequency.
Optionally, the second filter includes a third inductor and a third capacitor connected in series, one end of the third capacitor is connected to the second impedance matcher, and the other end of the third capacitor is grounded through the third inductor.
Optionally, the third inductor and the third capacitor resonate at a second multiple of an operating frequency of the second signal.
Optionally, the third filter includes a fourth inductor and a fourth capacitor connected in series, one end of the fourth capacitor is connected to the second port, and the other end of the fourth capacitor is grounded through the fourth inductor.
Optionally, the first impedance matcher comprises a fifth inductor and a fifth capacitor connected in series, one end of the fifth capacitor is connected to the second port, and the other end of the fifth capacitor is connected to the first filter through the fifth inductor;
the second matching circuit further comprises a seventh inductor connected between the second port and ground.
Optionally, the first matching circuit further comprises an eighth inductor connected between the first port and the first filter.
Optionally, the operating frequency of the first signal is: 1.7-2.7 GHz; the operating frequency of the second signal is: 700- > 920MHz, the first resonance capacitor and the impedance matching inductor resonate between 2GHz-3GHz, and the resonance inductor and the second resonance capacitor resonate between 2GHz-3 GHz.
In a second aspect, the present invention further provides a power amplifier transmitting module, including any one of the antenna diplexer circuits described above.
By using the antenna diplexer circuit, the first matching circuit is used for transmitting a first signal (for example, a medium-high frequency signal) by arranging the first matching circuit and the second matching circuit, other signals except the first signal, such as a second signal, can be effectively suppressed by the filter and the impedance matcher in the first matching circuit, the second matching circuit is used for transmitting a second signal (for example, a low-frequency signal), other signals except the second signal, such as the first signal, can be effectively suppressed by the filter and the impedance matcher in the second matching circuit, so that different signals can be transmitted simultaneously without mutual interference, carrier aggregation can be realized, and the isolation between the low-frequency signal and the medium-high frequency signal can be further improved by the action of the first resonant capacitor and the second resonant capacitor.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below.
Fig. 1 is a schematic diagram of a topology of an antenna diplexer circuit according to an embodiment of the present invention;
fig. 2 is a graph of the transmission gain of the filter 11 in the matching circuit of fig. 1;
fig. 3 is a schematic diagram illustrating transmission gain curves from a first port 1 to a second port 2 of the antenna diplexer circuit shown in fig. 1;
fig. 4 is a smith chart of the first port 1 of the antenna diplexer circuit of fig. 1;
fig. 5 is a schematic diagram of a transmission gain curve from the third port 3 to the second port 2 of the antenna diplexer circuit shown in fig. 1;
fig. 6 is a smith chart of the antenna diplexer circuit of fig. 1 at the third port 3;
FIG. 7 is a diagram illustrating transmission gain curves of the first port 1 to the third port 3 of the circuit shown in FIG. 1;
fig. 8 is a schematic structural diagram of a power amplifier transmitting module according to an embodiment of the utility model.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 shows a schematic topology of an antenna diplexer circuit according to an embodiment of the present invention.
As shown in fig. 1, the antenna diplexer circuit 1000 may be configured to implement a common antenna ANT for the first and second signals. Wherein the operating frequency of the first signal may be greater than the operating frequency of the second signal, e.g., the first signal may comprise an LTE Band3(1.710GHz-1.785GHz) signal and/or an LTE Band 5(1.850GHz-1.910GHz) signal; the second signal may comprise an LTE Band 28(703MHz-748MHz) signal. The antenna diplexer circuit 1000 is configured to match the first signal and the second signal, respectively, and may be configured to isolate the first signal and the second signal from interfering with each other.
As shown in fig. 1, the antenna diplexer circuit 1000 may include a first port 1, a second port 2, and a third port 3. The second port 2 may be used to connect an antenna ANT, and the first signal and the second signal may share the antenna ANT. The first port 1 may be used for connecting a first processing circuit (not shown) which may be used for processing the first signal. The third port 3 may be used for connecting a second processing circuit (not shown) which may be used for processing the second signal.
A first matching circuit may be disposed between the first port 1 and the second port 2, i.e., the antenna diplexer circuit 1000 includes a first matching circuit. The first matching circuit may be used to match the first signal and may be used to suppress harmonics of the first signal and suppress the second signal. The first matching circuit may include a first filter 11 disposed between the first port 1 and the second port 2 and a first impedance matcher 12 connected between the first filter 11 and the second port 2.
As shown in the exemplary embodiment shown in fig. 1, the first impedance matcher 12 may be connected to the second port 2 at the right end of fig. 1, and the first impedance matcher 12 may be used for matching the impedance between the antenna diplexer circuit 1000 and the antenna ANT. The first frequency is assumed to be the center frequency of the first signal. Alternatively, the impedance of the first impedance matcher 12 at the first frequency may be a first preset impedance. Alternatively, the first preset impedance may be 50 Ω. As shown in the exemplary embodiment, the first impedance matcher 12 may include a fifth inductor L connected in series5And a fifth capacitor C5Wherein the fifth capacitor C5Through a fifth inductor L5A fifth capacitor C connected to the first filter 115Is connected to the second port 2. Optionally, a fifth inductor L5And an electric fifth container C5May resonate at about the first frequency.
As shown in the exemplary embodiment shown in fig. 1, the first filter 11 may be connected to the first impedance matcher 12 between the left end in fig. 1 and ground. Alternatively, the first filter 11 may include a first resonator and a second resonator connected in series. Alternatively, the first resonator may include a parallel-connected first inductor L1And a first capacitor C1. The second resonator may include a second inductor L connected in series2And a second capacitor C2. The second frequency is assumed to be the center frequency of the second signal.
Optionally, the first resonator may resonate at a frequency between the first harmonic frequency and the second frequency. Wherein the first harmonic frequency may be a first predetermined integer multiple of the first frequency. Alternatively, the first harmonic frequency may be three times the first frequency. Optionally, the first harmonic frequency may also be other integer multiples of the first frequency, such as: may be two, four or five times the first frequency.
Optionally, the first harmonic may resonate at a first frequency. Optionally, the second resonator may also resonate at a frequency between the first harmonic frequency and the second frequency. Optionally, the second harmonic may resonate at the first frequency. Alternatively, the first resonator and the second resonator may resonate at the same frequency. Alternatively, the first resonator and the second resonator may be series-resonant at the second frequency and the first resonant frequency.
Optionally, the first resonator may resonate at a frequency between the second frequency and a first harmonic frequency, wherein the first harmonic frequency may be a third multiple of the first frequency. For example the first resonator may be resonant at a first frequency. The second resonator may also resonate at a frequency between the second frequency and the first harmonic frequency. The second resonator may also resonate at the first frequency. Alternatively, the first resonator and the second resonator may resonate at the same frequency. Alternatively, the first resonator and the second resonator may be series-resonant at the second frequency and the first harmonic frequency. For example, the impedance of the first resonator may be expressed as:
Figure BDA0003282689870000051
the impedance of the second resonator may be expressed as:
Figure BDA0003282689870000052
order to
Figure BDA0003282689870000053
Figure BDA0003282689870000054
The impedance Z of the first resonator can be found from the equation (1)111Resonates at omegaα. At omega < omegaαImpedance Z of the first resonator111Is capacitive at ω>ωαImpedance Z of the first resonator111Is inductive. The impedance Z of the second resonator can be found from the equation (2)112Resonates at omegaβ. At omega < omegaβImpedance Z of the first resonator111Is inductive at omega>ωβImpedance Z of the first resonator111Is of compatibility.
The impedance of the filter 11 can be expressed as:
Figure BDA0003282689870000061
it is clear that the equation ω4L1L1C1C2-ω2(L1C1+L1C2+L2C2) There are four roots when +1 ═ 0. The four roots can be divided into two pairs, each pair of roots being opposite numbers to each other. Can be reasonably configured with the capacitor C1、C2And an inductor L1、L2. Such that the two pairs of roots correspond to the second frequency and the first harmonic frequency, respectively. I.e. such that the impedance Z of the first filter 11 is in the vicinity of the second frequency and in the vicinity of the first harmonic frequency of the first filter 1111Very small, close to zero. Thereby allowing the first filter 11 to attenuate the second frequency and the first harmonic frequency significantly.
As shown in fig. 2, 11a1 is a transmission gain curve with the first resonator alone as a filter. 11a2 is the transmission gain curve for the second resonator alone as a filter. 11A is the transmission gain curve of the first filter 11. As can be seen from fig. 2, the transmission gain of the first filter 11 at a frequency m6 of 800MHz (around the second frequency) is-20.598 dB. I.e. the first filter 11 has an attenuation of more than 20dB for 800MHz frequencies. The transmission gain of the first filter 11 is-16.705 dB at the frequency m 10-4.93 GHz and-14.45 dB at the frequency m 11-5.67 GHz. Namely, the attenuation of the first filter 11 in the frequency range of 4.93 to 5.67GHz (near the first harmonic frequency) is greater than 14 dB. It is clear that the first filter 11 has a significant attenuation effect for frequencies around the second frequency and for frequencies around the first harmonic.
Optionally, the first matching circuit may further include: first inductor L8. Eighth inductor L8May be connected in series between the first filter 11 and the port 1. Optionally, an eighth inductor L8May be used to match the impedance between the first processing circuit and the antenna diplexer circuit 1000. Optionally, an eighth inductor L8The impedance at the first frequency is the first predetermined impedance.
A second matching circuit may be arranged between the second port 2 and the third port 3, i.e. the antenna diplexer circuit 1000 further comprises a second matching circuit. The second matching circuit may be used to match the second signal and may be used to suppress the first signal. Alternatively, the second matching circuit may include a second filter 13 disposed between the third port 3 and the second port 2, a second impedance matcher 14 connected between the second filter 13 and the second port 2, a third filter 15 connected between the second port 2 and ground, and a resonance unit 16 connected between the third port 3 and the second filter 13.
As shown in the exemplary embodiment shown in fig. 1, wherein the second impedance matcher 14 may be connected with the second port 2 at the left end in fig. 1. The second impedance matcher 14 may be used for impedance matching between the second matching circuit and the antenna ANT. The impedance of the second impedance matcher 14 at the second frequency may be the aforementioned first preset impedance. Optionally, the second impedance matcher 14 may include a first resonance capacitor Ct1Impedance matching inductor L6And an impedance matching capacitor C6The first mentionedA resonant capacitor Ct1And the impedance matching inductor L6A first parallel structure is formed by connecting in parallel, one end of the first parallel structure is connected with the impedance matching capacitor C6Is connected to the second port 2, the other end of the parallel structure is connected to the impedance matching capacitor C6And the other end thereof is connected to a third capacitor C3 of the second filter 13. The resonant cell 16 includes a resonant inductor L9 and a second resonant capacitor C forming a second parallel structuret2One end of the second parallel structure is connected to the third port 3, and the other end of the second parallel structure is connected to the third capacitor C3 of the second filter 13.
As shown in fig. 1, the second filter 13 may be connected to the second impedance matcher 14 between the right end in fig. 1 and the ground. Alternatively, the second filter 13 may include a third inductor L connected in series3And a third capacitor C3. Optionally, a third inductor L3And a third capacitor C3May resonate at about the first frequency.
As shown in fig. 1, optionally, the second matching circuit may further include a seventh inductor L7. Seventh inductor L7May be connected between the left end of the second impedance matcher 14 in fig. 1 and ground. Seventh inductor L7May be used to assist the second impedance matcher 14 in impedance matching.
Wherein the resonant inductor L9May be used for impedance matching between the second matching circuit and the second processing circuit. Optionally, a resonant inductor L9The impedance at the second frequency is the first predetermined impedance.
Wherein, in the second matching circuit, the first resonance capacitor Ct1And the impedance matching inductor L6Forming a parallel resonance and having a resonance frequency of 2GHz to 3GHz, the resonant inductor L9And said second resonant capacitor Ct2Parallel resonance is formed, and the resonance frequency is between 2GHz and3 GHz.
As shown in fig. 1, a third filter 15 may be connected between the second port 2 and ground. Optionally, aThe triple filter 15 may be used to filter out at least one of harmonics of the first signal and harmonics of the second signal. Alternatively, the third filter 15 may include a series connection of fourth inductors L4And a fourth capacitor C4. Optionally, a fourth inductor L4And a fourth capacitor C4May resonate at the second harmonic frequency. Optionally, the second harmonic frequency may be about a second preset integer multiple of the first frequency and/or a third preset integer multiple of the second frequency. For example a fourth inductor L4And a capacitor C4Can resonate at about 9.3GHz, wherein 9.3GHz is adjacent to both a 5-fold frequency of the first frequency and a 10-fold frequency of the second frequency.
Wherein the operating frequency of the first signal can be 1.7-2.7 GHz; the operating frequency of the second signal may be 700-. In the embodiment of the utility model, the first resonant capacitor C is arranged in the second matching circuitt1And a second resonant capacitor Ct2To respectively connect with the inductor L6And an inductor L9Parallel resonance is formed, so that signals of a 2GHz-3GHz frequency band can be more strongly inhibited in the working state of a low frequency band, and the isolation of low-frequency and medium-high frequency signals is better, namely, the low-frequency signals can be effectively blocked when the first matching circuit works, the medium-high frequency signals can be effectively blocked when the second matching circuit works, and the mutual interference between the low-frequency signals and the medium-high frequency signals is reduced.
Fig. 3 shows a diagram of a transmission gain curve from the first port 1 to the second port 2 of the circuit shown in fig. 1.
As shown in fig. 3, at a frequency of m3 ═ 1.710GHz, the transmission gain of the first port 1 to the second port 2 is-0.572 dB; at a frequency of m 4-2.000 GHz, the transmission gain of the first port 1 to the second port 2 is-0.460 dB; at frequency m 5-2.700 GHz, the transmission gain of the first port 1 to the second port 2 is-0.562 dB. It can be seen that the transmission loss from the first port 1 to the second port 2 is only around 0.5dB in the frequency range 1.71-2.7 GHz. Has relatively high transmission efficiency.
As shown in fig. 3, the transmission gain of the first port 1 to the second port 2 is-28.436 dB at the frequency m 1-920 MHz, and the transmission gain of the first port 1 to the second port 2 is-22.636 dB at the frequency m 2-700 MHz. The first port 1 to the second port 2 may have at least 22dB of attenuation for the frequency range 700 and 920MHz, including the operating frequency range of the second signal. The first port 1 to the second port 2 have a good effect of suppressing interference in the operating frequency range of the second signal.
As shown in fig. 3, at a frequency of m 6-5.360 GHz, the transmission gain of the first port 1 to the second port 2 is-39.516 dB. At frequency m 7-9.320 GHz, the transmission gain of the first port 1 to the second port 2 is-52.627 dB. It can be seen that there is a very good suppression of the third and fifth harmonics of the first signal.
Fig. 4 shows a smith chart of the first port 1 of the circuit of fig. 1.
As shown in fig. 4, at a frequency of m 14-1.710 GHz, the input impedance of port 1 is 52.961+ j 6.445. At a frequency of m 15-2.000 GHz, the input impedance of port 1 is 50.462-j 1.605. At frequency m 16-2.700 GHz, the input impedance of port 1 is 43.514-j 8.716. The input impedance of the first port 1 is around 50 omega in the frequency range 1.71-2.7GHz including the operating frequency range of the first signal. It can be seen that port 1 of the antenna diplexer circuit 1000 has a good impedance match for the first signal.
Curve b in fig. 5 shows a schematic diagram of a transmission gain curve from the third port 3 to the second port 2 of the circuit shown in fig. 1, wherein curve a in fig. 5 is the circuit without the first resonant capacitor Ct1And a second resonant capacitor Ct2The transmission gain curve from the third port 3 to the second port 2.
As shown in fig. 5, where the curve b has a transmission gain of-0.339 dB from the third port 3 to the second port 2 at the frequency m18 of 660 MHz. Curve b the transmission gain from the third port 3 to the second port 2 is-0.555 dB at frequency m 17-920 MHz. Curve b the transmission gain from the third port 3 to the second port 2 is-0.634 dB at frequency m 19-960 MHz. The loss of the circuit shown in fig. 1 from the third port 3 to the second port 2 is thus less than 0.5dB in the frequency range 660-960MHz, which includes the operating frequency range of the second signal. It can be seen that for the second signal, the transmission efficiency from the third port 3 to the second port 2 is high, and there is a good matching characteristic.
As shown in fig. 5, at frequency m20 ═ 1.690GHz, the transmission gain from the third port 3 to the second port 2 is-38.080 dB; curve b has a transmission gain of-51.180 dB from the third port 3 to the second port 2 at a frequency m 21-2.000 GHz; curve b the transmission gain from the third port 3 to the second port 2 is-53.297 dB at frequency m 22-2.100 GHz. It can be seen that the third port 3 to the second port 2 have a suppression effect of more than 38dB for the frequency range 1.69-2.1GHz including the operating range of the first frequency and the second harmonic frequency range of the second signal. I.e. a suppression of the operating frequency range of the first signal of more than 38dB, which is much greater than the suppression of curve a, and therefore passes through the first resonant capacitor Ct1And a second resonant capacitor Ct2The effect of (2) is beneficial to improving the isolation of low-frequency and medium-high frequency signals.
As shown in fig. 5, the transmission gain of the third port 3 to the second port 2 is-32.779 dB at the frequency m 26-9.320 GHz in curve b. It can be seen that the third port 3 to the second port 2 also have a very good suppression of higher harmonics of the first signal and higher harmonics of the second signal.
Fig. 6 shows a smith chart of the circuit of fig. 1 at the third port 3.
As shown in fig. 6, at a frequency of m 29-660 MHz, the impedance of the third port 3 is 52.124+ j 2.900; at frequency m 29-920 MHz, the impedance of port 3 is 53.071+ j 2.257. It can be seen that the input impedance of the third port 3 is around 50 omega for the frequency range 700-. It can be seen that the third port 3 has a good impedance match for the frequency range 700-.
Curve b in fig. 7 shows a schematic diagram of the transmission gain curves of the first port 1 to the third port 3 of the circuit shown in fig. 1, and curve a in fig. 7 is a curve without the first resonant capacitor Ct1And a second resonant capacitor Ct2From the first port 1 toTransmission gain curve of the third port 3.
As shown in fig. 7, the transmission gain of the first port 1 to the third port 3 is-23.277 dB at the frequency m 8-700 MHz of curve b; curve b the transmission gain of the first port 1 to the third port 3 is-29.372 dB at a frequency m 9-920 MHz. It can be seen that the isolation between the first port 1 and the third port 3 can be more than 23dB in the frequency range of 700-920MHz including the operating frequency of the second signal.
As shown in fig. 7, the transmission gain of the first port 1 to the third port 3 is-40.527 dB at the frequency m10 ═ 1.710GHz according to curve b; curve b the transmission gain of the first port 1 to the third port 3 is-46.080 dB at frequency m 11-2.700 MHz. It can be seen that the isolation of the first port 1 from the third port 3 can be up to 40dB or more in the frequency range 1.71-2.7GHz including the operating frequency of the first signal.
As can be seen from fig. 7, when the first port 1 receives a first signal, the third port 3 receives a second signal, and simultaneously transmits a signal to the antenna ANT connected to the second port 2, the isolation between the first port 1 and the third port 3 may reach 40dB, so that the antenna diplexer circuit 1000 has a good isolation effect. The method and the device can realize simultaneous transmission of different signals without mutual interference, thereby realizing carrier aggregation.
Fig. 8 is a schematic diagram illustrating a power amplifier transmission module according to an embodiment of the utility model.
As shown in fig. 8, the transmitting module 2000 may include an antenna diplexer DP 1. The antenna diplexer DP1 may include any of the antenna diplexer DP1 circuits described above. The antenna diplexer DP1 circuit may include a first port 1, a second port 2, and a third port 3. Wherein the first port 1 is used for accessing a first signal and the third port 3 is used for accessing a second signal. The first signal and the second signal share an antenna ANT connected to the second port 2. The antenna diplexer DP1 matches the first and second signals separately and performs signal isolation between the two. Alternatively, the first signal may comprise a 1.710GHz-2.7GHz signal. The second signal may comprise a 700MHz-960MHz signal.
The transmit module 2000 may further include an antenna ANT. The antenna ANT may be connected to the second port 2 of the antenna diplexer DP 1. The antenna ANT is used to transmit a first signal and a second signal.
The transmit module 2000 may further include a power amplification circuit PA1 and a power amplifier PA 2. The power amplification circuit PA1 may be used to power amplify the first signal; a power amplification circuit PA2 may be used to power amplify the second signal.
The utility model also provides a mobile communication device. The mobile communication device may include any of the antenna diplexer circuits described above, or may include any of the power amplifier transmit modules described above. Optionally, the mobile communication device may include at least one of a cell phone, a tablet, and a notebook.
The utility model also provides a chip which comprises any one of the antenna diplexer circuits or any one of the power amplifier transmitting modules.
In the embodiment of the utility model, two matching circuits are arranged in the antenna diplexer circuit, and each matching circuit can respectively comprise a filter circuit and an impedance matching circuit, so that the antenna diplexer circuit is respectively used for transmitting a first signal with a higher frequency and a second signal with a lower frequency.
The embodiments of the present invention have been described in detail, and the principles and embodiments of the present invention are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present invention. Meanwhile, those skilled in the art should also be able to make modifications or variations to the embodiments and applications of the present invention based on the idea of the present invention. In view of the above, the present disclosure should not be construed as limiting the utility model.

Claims (10)

1. An antenna diplexer circuit, comprising:
a first port for connection to a first processing circuit, the first processing circuit processing a first signal;
a second port for connecting an antenna;
a third port, configured to connect to a second processing circuit, where the second processing circuit processes a second signal, an operating frequency of the second signal is lower than an operating frequency of the first signal, and the first signal and the second signal share the antenna;
a first matching circuit including a first filter disposed between the first port and the second port and a first impedance matcher connected between the first filter and the second port;
a second matching circuit including a second filter disposed between the third port and the second port, a second impedance matcher connected between the second filter and the second port, a third filter connected between the second port and ground, and a resonance unit connected between the third port and the second filter, the second impedance matcher including a first resonance capacitor, an impedance matching inductor, and an impedance matching capacitor, the first resonance capacitor and the impedance matching inductor being connected in parallel to form a first parallel structure, one end of the first parallel structure being connected to one end of the impedance matching capacitor, the other end of the parallel structure being connected to the second port, the other end of the impedance matching capacitor being connected to the second filter, the resonance unit including a resonance inductor and a second resonance capacitor forming a second parallel structure, one end of the second parallel structure is connected with the third port, and the other end of the second parallel structure is connected with the second filter.
2. The antenna diplexer circuit of claim 1, wherein the first filter is connected between the first impedance matcher and ground;
the first filter includes a first resonator and a second resonator connected in series, the first resonator including a first inductor and a first capacitor connected in parallel; the second resonator includes a second inductor and a second capacitor connected in series.
3. The antenna diplexer circuit of claim 2, wherein the first resonator is resonant at a first harmonic frequency or a second frequency and the second resonator is resonant at the first harmonic frequency or the second frequency.
4. The antenna diplexer circuit of claim 1, wherein the second filter comprises a third inductor and a third capacitor connected in series, one end of the third capacitor being connected to the second impedance matcher, the other end of the third capacitor being connected to ground through the third inductor.
5. The antenna diplexer circuit of claim 4, wherein the third inductor and the third capacitor resonate at twice the operating frequency of the second signal.
6. An antenna diplexer circuit according to claim 1 wherein the third filter comprises a fourth inductor and a fourth capacitor connected in series, one end of the fourth capacitor being connected to the second port and the other end of the fourth capacitor being connected to ground through the fourth inductor.
7. The antenna diplexer circuit of claim 1, wherein the first impedance matcher comprises a fifth inductor and a fifth capacitor connected in series, one end of the fifth capacitor being connected to the second port, the other end of the fifth capacitor being connected to the first filter through the fifth inductor;
the second matching circuit further comprises a seventh inductor connected between the second port and ground.
8. The antenna diplexer circuit of claim 1, wherein the first matching circuit further comprises an eighth inductor connected between the first port and the first filter.
9. The antenna diplexer circuit of claim 1, wherein the operating frequency of the first signal is: 1.7-2.7 GHz; the operating frequency of the second signal is: 700- > 920MHz, the first resonance capacitor and the impedance matching inductor resonate between 2GHz-3GHz, and the resonance inductor and the second resonance capacitor resonate between 2GHz-3 GHz.
10. A power amplifier transmit module comprising the antenna diplexer circuit of any one of claims 1-9.
CN202122370395.2U 2021-09-27 2021-09-27 Antenna diplexer circuit and power amplifier transmitting module Active CN215581117U (en)

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WO2023045545A1 (en) * 2021-09-27 2023-03-30 深圳飞骧科技股份有限公司 Antenna diplexer circuit and power amplifier transmitting module

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JP4271474B2 (en) * 2003-03-28 2009-06-03 Ｔｄｋ株式会社 Power line termination circuit and method, and power line relay device
JP5083125B2 (en) * 2008-08-27 2012-11-28 株式会社村田製作所 Demultiplexer, semiconductor integrated circuit device and communication portable terminal
TWI478492B (en) * 2012-01-17 2015-03-21 Richwave Technology Corp Matching circuit system
WO2019213851A1 (en) * 2018-05-08 2019-11-14 华为技术有限公司 Antenna device and mobile terminal
CN110165347B (en) * 2019-05-31 2020-12-15 四川大学 High-isolation microstrip duplexer loaded with open-circuit branches
CN215581117U (en) * 2021-09-27 2022-01-18 深圳飞骧科技股份有限公司 Antenna diplexer circuit and power amplifier transmitting module

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2023045545A1 (en) * 2021-09-27 2023-03-30 深圳飞骧科技股份有限公司 Antenna diplexer circuit and power amplifier transmitting module

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