CN215498923U - Protection circuit of LVDS low-voltage differential signal interface - Google Patents

Protection circuit of LVDS low-voltage differential signal interface Download PDF

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Publication number
CN215498923U
CN215498923U CN202121427247.3U CN202121427247U CN215498923U CN 215498923 U CN215498923 U CN 215498923U CN 202121427247 U CN202121427247 U CN 202121427247U CN 215498923 U CN215498923 U CN 215498923U
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lvds
protection device
electrostatic protection
signal
transmitting
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CN202121427247.3U
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严新发
肖南海
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Shanghai Yinte Electronics Co ltd
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Shanghai Yinte Electronics Co ltd
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Abstract

The utility model discloses a protection circuit of an LVDS low-voltage differential signal interface, and relates to the technical field of circuit protection. The utility model comprises an LVDS signal sending end, an LVDS signal receiving end, an LVDS transmission line and a matching resistor; a first transmitting end electrostatic protection device and a second transmitting end electrostatic protection device are respectively connected between a positive signal output end and a negative signal output end of the LVDS signal transmitting end and the ground; a first receiving end electrostatic protection device and a second receiving end electrostatic protection device are respectively connected between a positive signal input end and a negative signal input end of the LVDS signal receiving end and the ground. The utility model utilizes the low capacitance value of the electrostatic protection device and the electrostatic protection capability of rapid overvoltage suppression, improves the reliability of the product, effectively prevents electrostatic interference introduced by an LVDS signal transmission line and a power line, protects LVDS transmitting and receiving decoding chips and ensures that an image communication and interface circuit of the LVDS is well protected.

Description

Protection circuit of LVDS low-voltage differential signal interface
Technical Field
The utility model belongs to the technical field of circuit protection, and particularly relates to a protection circuit of an LVDS low-voltage differential signal interface.
Background
In recent years, with the development of integrated circuits, the trend toward lower supply voltages and higher data rates is becoming a technological trend, and lowering the supply voltages can reduce the power consumption of high-density integrated circuits, contributing to the improvement of chip integration. But as the voltage is reduced, new challenges are presented to high speed transmission of signals. LVDS is specifically Low Voltage Differential Signaling, a Low Voltage swing Differential Signaling technique, LVDS driver and receiver do not depend on a specific supply Voltage, LVDS signals can be transmitted over Differential PCB line pairs or balanced cables at a rate of several hundred Mbps. Therefore, LVDS is widely used in low-voltage, low-power consumption image data transmission interfaces, such as display screens.
The data transceiver chip and the module circuit of the LVDS interface are easily interfered by power supply fluctuation, transmission line static electricity and other factors, so that the transmission rate of data is affected, and even the chip and other parts are damaged.
SUMMERY OF THE UTILITY MODEL
The utility model provides a protection circuit of an LVDS low-voltage differential signal interface, which solves the problems.
In order to solve the technical problems, the utility model is realized by the following technical scheme:
the protection circuit of the LVDS low-voltage differential signal interface comprises an LVDS signal sending end, an LVDS signal receiving end, an LVDS transmission line connected between the LVDS signal sending end and the LVDS signal receiving end, and a matching resistor connected between the LVDS transmission lines;
a first transmitting end electrostatic protection device is connected between a positive signal output end of the LVDS signal transmitting end and the ground;
a second transmitting end electrostatic protection device is connected between a negative signal output end of the LVDS signal transmitting end and the ground;
a first receiving end electrostatic protection device is connected between a positive signal input end of the LVDS signal receiving end and the ground;
and a second receiving end electrostatic protection device is connected between the negative signal input end of the LVDS signal receiving end and the ground.
Further, first transmitting terminal electrostatic protection device, second transmitting terminal electrostatic protection device, first receiving terminal electrostatic protection device and second receiving terminal electrostatic protection device all adopt SOD923 encapsulation, and the capacitance value is less than 1 pF.
Further, the matching resistor is connected between a positive signal input end and a negative signal input end of the LVDS signal receiving end and packaged by 0402, and the resistance value is 100 omega-120 omega.
Compared with the prior art, the utility model has the following beneficial effects:
1. the protection circuit is used for connecting the two transmitting end electrostatic protection devices and the receiving end electrostatic protection devices between the LVDS signal transmitting end and the LVDS signal receiving end and the ground respectively, and each protection device is packaged by the SOD923, so that the area of a PCB can be reduced to the maximum extent, and the layout and wiring design of a user circuit board is reduced;
2. the static protection device can suppress the transient state in two directions, and when the LVDS transmission line is subjected to high-voltage static, the static protection device can form a clamp within ps-level time, so that the voltage of the data interface of the LVDS interface chip does not exceed a limit value, the interface chip is protected from being damaged, and the reliability of a product is improved;
3. the electrostatic protection device of the circuit has the characteristic of low capacitance, specifically, the capacitance value is less than 1pF, and the LVDS image data transmission rate can be guaranteed not to be influenced; by the circuit, unit circuits at the transmitting end and the receiving end of the LVDS can be well protected, and the overall stability of a product is well guaranteed.
Of course, it is not necessary for any product in which the utility model is practiced to achieve all of the above-described advantages at the same time.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram illustrating a transmission principle of a transceiver end signal of a protection circuit of an LVDS low-voltage differential signaling interface according to the present invention;
FIG. 2 is a schematic diagram of an LVDS transmitting end interface protection circuit of the present invention;
fig. 3 is a schematic diagram of an LVDS receiving end interface protection circuit according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-3, the protection circuit of an LVDS low-voltage differential signaling interface according to the present invention includes an LVDS signal transmitting terminal LVDS _ TX, an LVDS signal receiving terminal LVDS _ RX, an LVDS transmission line connected between the LVDS signal transmitting terminal LVDS _ TX and the LVDS signal receiving terminal LVDS _ RX, and a matching resistor R connected between the LVDS transmission lines;
the LVDS signal sending terminal LVDS _ TX refers to a circuit which converts a TTL signal into LVDS image data and sends the LVDS image data to a receiving terminal through a transmission line; the LVDS signal receiving end LVDS _ RX is an image decoding circuit which is responsible for receiving and decoding LVDS signals and sending the LVDS signals to a post-stage display; the number of pins for LVDS data transmission is usually 30, wherein 3 groups of differential signal lines, 1 group of clock signal lines and 1 group of power lines are provided;
a first transmitting end electrostatic protection device ESDTX1 is connected between a positive signal output end TX + of an LVDS signal transmitting end LVDS _ TX and the ground;
a second transmitting end electrostatic protection device ESDTX2 is connected between a negative signal output end TX-of the LVDS signal transmitting end LVDS _ TX and the ground;
a first receiving end electrostatic protection device ESDRX1 is connected between a positive signal input end RX + of the LVDS signal receiving end LVDS _ RX and the ground;
a second receiving end electrostatic protection device ESDRX2 is connected between the negative signal input end RX-of the LVDS signal receiving end LVDS _ RX and the ground.
Wherein, first transmitting terminal electrostatic protection device ESDTX1, second transmitting terminal electrostatic protection device ESDTX2, first receiving terminal electrostatic protection device ESDRX1 and second receiving terminal electrostatic protection device ESDRX2 all adopt SOD923 encapsulation, the capacitance value is less than 1pF, the capacitance value is 0.8pF in this embodiment, the specific size of this encapsulation is long wide high: 1mm × 0.6mm × 0.4 mm; the clamping voltage of the first transmitting end electrostatic protection device ESDTX1, the second transmitting end electrostatic protection device ESDTX2, the first receiving end electrostatic protection device ESDRX1 and the second receiving end electrostatic protection device is 5V or less, the transient state (8/20us) inhibits the power by 150W or more, and the transient state can be inhibited in two directions; when the LVDS transmission line is crossed into high-voltage static electricity, the static protection device can form clamping in ps-level time, so that the voltage of the data interface of the LVDS interface chip does not exceed a limit value, the interface chip is protected from being damaged, and the reliability of a product is improved.
The matching resistor R is connected between a positive signal input end RX + and a negative signal input end RX-of the LVDS signal receiving end LVDS _ RX, and is packaged by 0402, and the resistance value is 100-120 omega; in this embodiment, the resistance of the matching resistor R is 100 Ω.
Has the advantages that:
1. the protection circuit is used for connecting the two transmitting end electrostatic protection devices and the receiving end electrostatic protection devices between the LVDS signal transmitting end and the LVDS signal receiving end and the ground respectively, and each protection device is packaged by the SOD923, so that the area of a PCB can be reduced to the maximum extent, and the layout and wiring design of a user circuit board is reduced;
2. the static protection device can suppress the transient state in two directions, and when the LVDS transmission line is subjected to high-voltage static, the static protection device can form a clamp within ps-level time, so that the voltage of the data interface of the LVDS interface chip does not exceed a limit value, the interface chip is protected from being damaged, and the reliability of a product is improved;
3. the electrostatic protection device of the circuit has the characteristic of low capacitance, specifically, the capacitance value is less than 1pF, and the LVDS image data transmission rate can be guaranteed not to be influenced; by the circuit, unit circuits at the transmitting end and the receiving end of the LVDS can be well protected, and the overall stability of a product is well guaranteed.
The preferred embodiments of the utility model disclosed above are intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the utility model to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the utility model and the practical application, to thereby enable others skilled in the art to best utilize the utility model. The utility model is limited only by the claims and their full scope and equivalents.

Claims (3)

1. The utility model provides a protection circuit of LVDS low pressure differential signal interface, includes LVDS signal transmitting terminal, LVDS signal receiving terminal, connects LVDS transmission line between LVDS signal transmitting terminal and LVDS signal receiving terminal, connects the matching resistance between LVDS transmission line which characterized in that:
a first transmitting end electrostatic protection device is connected between a positive signal output end of the LVDS signal transmitting end and the ground;
a second transmitting end electrostatic protection device is connected between a negative signal output end of the LVDS signal transmitting end and the ground;
a first receiving end electrostatic protection device is connected between a positive signal input end of the LVDS signal receiving end and the ground;
and a second receiving end electrostatic protection device is connected between the negative signal input end of the LVDS signal receiving end and the ground.
2. The protection circuit of claim 1, wherein the first transmitting end electrostatic protection device, the second transmitting end electrostatic protection device, the first receiving end electrostatic protection device, and the second receiving end electrostatic protection device are packaged by SOD923, and a capacitance value is smaller than 1 pF.
3. The protection circuit of claim 1, wherein the matching resistor is connected between a positive signal input terminal and a negative signal input terminal of the LVDS signal receiving terminal, and is packaged in 0402, and the resistance value is between 100 Ω and 120 Ω.
CN202121427247.3U 2021-06-25 2021-06-25 Protection circuit of LVDS low-voltage differential signal interface Active CN215498923U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202121427247.3U CN215498923U (en) 2021-06-25 2021-06-25 Protection circuit of LVDS low-voltage differential signal interface

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202121427247.3U CN215498923U (en) 2021-06-25 2021-06-25 Protection circuit of LVDS low-voltage differential signal interface

Publications (1)

Publication Number Publication Date
CN215498923U true CN215498923U (en) 2022-01-11

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202121427247.3U Active CN215498923U (en) 2021-06-25 2021-06-25 Protection circuit of LVDS low-voltage differential signal interface

Country Status (1)

Country Link
CN (1) CN215498923U (en)

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