CN215344578U - Cyclic addressing AWG router interconnection structure and distributed switching network - Google Patents
Cyclic addressing AWG router interconnection structure and distributed switching network Download PDFInfo
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Abstract
The utility model relates to a cyclic addressing AWG router interconnection structure and a distributed switching network. The utility model is suitable for the fields of optical communication and optical switching. The technical scheme of the utility model is a cyclic addressing AWG router interconnection structure, which is used for interconnection between an NxN cyclic addressing AWG router I and an NxN cyclic addressing AWG router II, reduces the maximum interconnection loss and flattens the channel loss, and is characterized in that: an edge port in an output channel of the cyclic addressing AWG router I is interconnected with a central port in an input channel of the cyclic addressing AWG router II; and/or a central port in the output channel of the cyclic addressing AWG router I is interconnected with an edge port in the input channel of the cyclic addressing AWG router II.
Description
Technical Field
The utility model relates to a cyclic addressing AWG router interconnection structure and a distributed switching network. The method is suitable for the fields of optical communication and optical switching.
Background
To cope with the rapid increase in data volume in data centers, the demand for all-optical switching is increasingly pressing. The WSS as a core device of all-optical switching is slowly developed, LCOS and MES are two main WSS implementation technologies, but the two technical schemes have the problems of high technical difficulty, high cost and high price. The design of the cyclic addressing AWG router is relatively easy and the manufacturing cost is low, and the optical switching technology based on the cyclic addressing AWG router receives more and more attention.
Because the circularly addressed arrayed waveguide grating router is wide in free spectral coverage, the m-level interference of the edge port is extremely large and the m-1 level interference is extremely large, and the inherent 3dB loss non-uniformity exists between the edge output port and the central output port. Experts and scholars at home and abroad put forward more schemes and measures to solve the problem of uniformity of the cyclic addressing AWG, and the schemes mainly comprise the following schemes:
1. the m-level interference maximum and the m-1 level interference maximum energy of the edge port are coupled to the same output channel through a multi-mode interference coupler, so that the purpose of improving the channel loss non-uniformity is achieved. This approach has the disadvantage that there will be many nodes where the waveguides cross at the output waveguide end.
2. The auxiliary waveguide is added at the output end of the array waveguide, and the output mode field is changed by a directional coupler method, so that the loss uniformity of each output channel is realized. Due to the fact that the coupling efficiency between the directional couplers is low due to the fact that the waveguide platforms are weakly limited by silicon dioxide and the like, the sawtooth-shaped waveguide is often designed by adopting the method, the coupling efficiency of the directional couplers is increased by improving waveguide loss, the design complexity is increased, meanwhile, the manufacturing difficulty is increased, and meanwhile, unnecessary waveguide loss is introduced.
3. Chinese patent No. ZL200510126242.6 provides a "method for realizing uniformity of arrayed waveguide grating channels by using loss trimming waveguides", which adds loss trimming waveguides at the ends of the output waveguides of an arrayed waveguide grating router, thereby realizing uniform insertion loss of the output channels of the arrayed waveguide grating router. The method adds extra loss trimming waveguide at the output end of the AWG, resulting in extremely complex structure and larger volume.
4. Chinese patent No. ZL2012104193432 discloses a "waveguide grating device with uniform channel loss", which improves the uniformity of the channel loss of the output channel of the cyclic addressing AWG router by tilting the arrayed waveguide at a certain angle and redistributing the energy on the imaging plane, similar to the blazed grating method. This approach tends to increase the crosstalk of the cyclic addressing AWG router and degrade the performance of the cyclic addressing AWG router.
5. The chinese patent with patent number CN201820764046.4 provides "an arrayed waveguide grating router with uniform loss", which makes the output star coupler output a rectangular optical field by designing waveguide parameters, thereby realizing the function of uniform loss of the arrayed waveguide grating router, but the design and process difficulty of this scheme is large, and the waveguide loss is also increased. In a typical distributed optical transceiving switching network, a plurality of distributed optical transceiving switching units are interconnected in pairs, and each optical transceiving switching unit comprises N tunable optical modules and an NxN circularly addressed arrayed waveguide grating router. The interconnection loss fluctuation of NxN cyclic addressing array waveguide gratings of different nodes of the distributed optical transceiving network is large.
SUMMERY OF THE UTILITY MODEL
The technical problem to be solved by the utility model is as follows: aiming at the existing problems, an interconnection structure of a cyclic addressing AWG router and a distributed switching network are provided to reduce the maximum interconnection loss and flatten the channel loss.
The technical scheme adopted by the utility model is as follows: a cyclic addressing AWG router interconnection structure is used for interconnection between an NxN cyclic addressing AWG router I and an NxN cyclic addressing AWG router II, reduces maximum interconnection loss and flattens channel loss, and is characterized in that:
an edge port in an output channel of the cyclic addressing AWG router I is interconnected with a central port in an input channel of the cyclic addressing AWG router II; and/or a central port in the output channel of the cyclic addressing AWG router I is interconnected with an edge port in the input channel of the cyclic addressing AWG router II.
An output port M of the cyclic addressing AWG router I is interconnected with an input port K of the cyclic addressing AWG router II, wherein M is a port number, and M is more than or equal to 1 and less than or equal to N; k is the same or similar port of M + N/2 or M-N/2, and K is more than or equal to 1 and less than or equal to N.
A distributed switching network having a plurality of nodes, each node having at least one cyclic addressing AWG router thereon, wherein: and the cyclic addressing AWG router on the node is interconnected with the cyclic addressing AWG router on the other node by adopting the cyclic addressing AWG router interconnection structure.
And the cyclic addressing AWG router on the node is interconnected with the cyclic addressing AWG router on the other node through two or more optical fibers.
The utility model has the beneficial effects that: the utility model utilizes the characteristics of the edge port and the central port of the cyclic addressing AWG router to reduce the maximum interconnection loss and flatten the channel loss by interconnecting the edge port and the central port.
The cyclic addressing AWG router on one node and the cyclic addressing AWG router on the other node are interconnected through two or more optical fibers, so that the cyclic addressing AWG router can provide a fiber breakage protection function and has a collision prevention function.
Drawings
Fig. 1 is a diagram of typical edge port input insertion loss in the prior art.
Fig. 2 is a diagram of typical prior art central port input insertion loss.
Fig. 3 is a block diagram of a typical distributed optical switching network.
Fig. 4 is a schematic structural diagram of the interconnection of the cyclic addressing AWG router in embodiment 1.
Fig. 5 is a diagram of total loss of the interconnection link in embodiment 1, which is respectively the output of the i 1 port of the cyclic addressing AWG router and the input of the ii 9 port of the cyclic addressing AWG router; circularly addressing output of an I2 port of the AWG router and input of an AWG II 10 port; circularly addressing 3 port output of the AWG router I and circularly addressing 11 port input of the AWG router II; circularly addressing output of the I4 port of the AWG router and circularly addressing input of the II 12 port of the AWG router; circularly addressing output of the I5 port of the AWG router and input of the II 13 port of the AWG router; the output of the I6 port of the cyclic addressing AWG router and the input of the II 14 port of the cyclic addressing AWG router; circularly addressing output of the I7 port of the AWG router and input of the II 15 port of the AWG router; and the output of the I8 port of the cyclic addressing AWG router, the input of the II 18 port of the cyclic addressing AWG router and the like, wherein the abscissa is a wavelength channel.
Fig. 6 is a schematic diagram of a distributed switching network according to embodiment 2.
Fig. 7 is a schematic diagram of a distributed switching network according to embodiment 3.
Detailed Description
Example 1: the embodiment is a cyclic addressing AWG router interconnection structure, which is used for interconnection between an NxN cyclic addressing AWG router I (N can be 4, 8, 16, 32, 64 and the like) and an NxN cyclic addressing AWG router II, and reduces the maximum interconnection loss and the channel loss.
Fig. 1 is a typical edge port input insertion loss diagram in the prior art, where the abscissa is a wavelength channel, the edge insertion loss of the wavelength channel is small, and the center insertion loss of the wavelength channel is large; fig. 2 is a diagram of typical central port input insertion loss in the prior art, where the abscissa is a wavelength channel, the central insertion loss of the wavelength channel is small, and the edge insertion loss of the wavelength channel is large. Fig. 3 is a diagram of a typical distributed optical switching network in the prior art. Based on the characteristics of the edge port and the central port, the embodiment interconnects the central port in the input/output port of the cyclic addressing AWG router i with the edge port in the input/output port of the cyclic addressing AWG router ii (see fig. 4), compensates the overall loss through the interconnection of the middle port and the edge port, reduces the maximum interconnection loss, and flattens the channel loss (see fig. 5).
In this example, the port numbers of the N input/output ports of the cyclic addressing AWG router i are 1, 2, and 3.. N in sequence from one side edge to the other side edge thereof, and the port numbers of the N input/output ports of the cyclic addressing AWG router ii are 1, 2, and 3.. N in sequence from one side edge to the other side edge thereof. In the embodiment, an input/output port M of a cyclic addressing AWG router I is interconnected with an input/output port K of a cyclic addressing AWG router II, wherein M is the port number of the input/output port of the cyclic addressing AWG router I, and M is more than or equal to 1 and less than or equal to N; k is the port number of an input/output port of the cyclic addressing AWG router II, and on the premise that K is more than or equal to 1 and less than or equal to N, K is a port with the same or similar M + N/2 or M-N/2, generally a channel with similar adjacent loss, and the difference is within 0.5 dB.
Example 2: the embodiment is a distributed switching network, which has 5 nodes, each node has an optical transceiving switching unit, each optical transceiving switching unit has an NxN cyclic addressing AWG router, and the cyclic addressing AWG router on a node is interconnected with the cyclic addressing AWG router on another node through the cyclic addressing AWG router interconnection structure in embodiment 1.
As shown in fig. 6, port 1 of the NxN cyclic addressing AWG router in the optical switch unit # 1 is interconnected with port 9 of the NxN cyclic addressing AWG router in the optical switch unit # 5; the 12 ports of the NxN cyclic addressing AWG router in the No. 1 optical transceiving switching unit are interconnected with the 4 ports of the NxN cyclic addressing AWG router in the No. 3 optical transceiving switching unit; the 1 port of the NxN cyclic addressing AWG router in the 1 # optical transceiving switching unit is interconnected with the 9 # port of the NxN cyclic addressing AWG router in the 5 # optical transceiving switching unit; the 12 ports of the NxN cyclic addressing AWG router in the No. 1 optical transceiving switching unit are interconnected with the 4 ports of the NxN cyclic addressing AWG router in the No. 3 optical transceiving switching unit; the 16 ports of the NxN cyclic addressing AWG router in the No. 3 optical transceiving switching unit are interconnected with the 8 ports of the NxN cyclic addressing AWG router in the No. 5 optical transceiving switching unit; forming a distributed optical transceiving switching network.
Example 3: the present embodiment is a distributed switching network with protection and collision prevention functions, and has 5 nodes, each node has an optical transceiver switching unit, each optical transceiver switching unit has an NxN cyclic addressing AWG router, the cyclic addressing AWG router on a node and the cyclic addressing AWG router on another node are interconnected via two optical fibers, and the specific interconnection structure is the cyclic addressing AWG router interconnection structure in embodiment 1.
As shown in fig. 7, ports 1 and 11 of the NxN cyclic addressing AWG router in the optical switch unit No. 1 are interconnected with ports 9 and 3 of the NxN cyclic addressing AWG router in the optical switch unit No. 5, respectively; the ports 3 and 12 of the NxN cyclic addressing AWG router in the No. 1 optical transceiving switching unit are interconnected with the ports 8 and 4 of the NxN cyclic addressing AWG router in the No. 3 optical transceiving switching unit; the ports 1 and 11 of the NxN cyclic addressing AWG router in the No. 1 optical transceiving switching unit are respectively interconnected with the ports 9 and 2 of the NxN cyclic addressing AWG router in the No. 5 optical transceiving switching unit; the ports 3 and 12 of the NxN cyclic addressing AWG router in the No. 1 optical transceiving switching unit are respectively interconnected with the ports 11 and 4 of the NxN cyclic addressing AWG router in the No. 3 optical transceiving switching unit; the ports 8 and 16 of the NxN cyclic addressing AWG router in the No. 3 optical transceiving switching unit are interconnected with the ports 16 and 8 of the NxN cyclic addressing AWG router in the No. 5 optical transceiving switching unit; forming a distributed optical transceiving switching network.
In this embodiment, the cyclic addressing AWG router in any optical transceiving switching unit has two optical fibers interconnected with ports of cyclic addressing AWG routers in other optical transceiving switching units, and when one of the optical fiber links is broken due to some reason or has excessive loss, the other optical fiber link can still maintain normal operation of the distributed optical transceiving switching system, thereby playing a role in mutual protection and improving robustness of the system.
In this embodiment, the cyclic addressing AWG router in any optical transceiving switching unit has two optical fibers interconnected with ports of cyclic addressing AWG routers in other optical transceiving switching units, information forwarding exists in the distributed optical transceiving switching system, and dual-optical-fiber interconnection between nodes can avoid a signal collision and loss phenomenon caused by occupation of receiving resources by a single optical fiber, thereby achieving a collision avoidance capability of the distributed optical switching system.
Claims (4)
1. A cyclic addressing AWG router interconnection structure is characterized in that:
an edge port in an output channel of the cyclic addressing AWG router I is interconnected with a central port in an input channel of the cyclic addressing AWG router II; and/or a central port in the output channel of the cyclic addressing AWG router I is interconnected with an edge port in the input channel of the cyclic addressing AWG router II.
2. The cyclic addressing AWG router interconnection structure of claim 1, wherein: an output port M of the cyclic addressing AWG router I is interconnected with an input port K of the cyclic addressing AWG router II, wherein M is a port number, and M is more than or equal to 1 and less than or equal to N; k is M + N/2 or M-N/2 same or similar ports, and K is more than or equal to 1 and less than or equal to N.
3. A distributed switching network having a plurality of nodes, each node having at least one cyclic addressing AWG router thereon, wherein: the cyclic addressing AWG router on the node is interconnected with the cyclic addressing AWG router on another node using the cyclic addressing AWG router interconnection structure of claim 1 or 2.
4. The distributed switching network of claim 3, wherein: and the cyclic addressing AWG router on the node is interconnected with the cyclic addressing AWG router on the other node through two or more optical fibers.
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