CN111865472B - Bufferless optical interconnection architecture and method for data center - Google Patents

Bufferless optical interconnection architecture and method for data center Download PDF

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CN111865472B
CN111865472B CN202010744155.1A CN202010744155A CN111865472B CN 111865472 B CN111865472 B CN 111865472B CN 202010744155 A CN202010744155 A CN 202010744155A CN 111865472 B CN111865472 B CN 111865472B
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awgr
stage
optical signal
wavelength
line card
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CN111865472A (en
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杨晓雪
胡冰
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Zhejiang University ZJU
Zhejiang Lab
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Zhejiang University ZJU
Zhejiang Lab
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J14/00Optical multiplex systems
    • H04J14/02Wavelength-division multiplex systems
    • H04J14/0227Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
    • H04J14/0254Optical medium access
    • H04J14/0267Optical signaling or routing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J14/00Optical multiplex systems
    • H04J14/02Wavelength-division multiplex systems
    • H04J14/0201Add-and-drop multiplexing
    • H04J14/0215Architecture aspects
    • H04J14/022For interconnection of WDM optical networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J14/00Optical multiplex systems
    • H04J14/02Wavelength-division multiplex systems
    • H04J14/0227Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
    • H04J14/0254Optical medium access
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J14/00Optical multiplex systems
    • H04J14/02Wavelength-division multiplex systems
    • H04J14/0227Operation, administration, maintenance or provisioning [OAMP] of WDM networks, e.g. media access, routing or wavelength allocation
    • H04J14/0254Optical medium access
    • H04J14/0272Transmission of OAMP information

Abstract

The invention discloses a bufferless optical interconnection architecture and a method for a data center. The switching module comprises a first stage AWGR, a third stage AWGR and a second stage TWC; the first stage AWGR input port is provided with an inlet line card, the third stage AWGR output port is provided with an outlet line card, and the first stage AWGR output port and the third stage AWGR input port are connected by a second stage TWC; the signal of the server is transmitted to the exchange module after wavelength division multiplexing through the wavelength modulation of the inlet line card, the specific wavelength optical signal is transmitted to the outlet line card through TWC wavelength conversion and AWGR circulating route, and the outlet line card processes the optical signal and then transmits the optical signal to the server. The invention realizes the all-optical interconnection with large capacity, high reliability and low power consumption, effectively flattens the data center, overcomes the defects of low port bandwidth and limited port number of the traditional space switch, and has the characteristics of high reliability, low complexity, low delay and the like.

Description

Bufferless optical interconnection architecture and method for data center
Technical Field
The invention belongs to an optical interconnection structure and an optical communication method of a data center optical switching network, and relates to a method for realizing a bufferless optical backplane by utilizing a wavelength domain to perform optical switching.
Background
Optical backplanes have found widespread use in data center optical networks. In the past decade, to cope with the rapid growth of interconnect nodes and traffic, many improvements have been applied to data center optical backplane architectures. The method comprises the steps of utilizing a passive orthogonal electricity intermediate plate to connect a line card and an exchange card to construct a three-stage non-blocking Clos network; a fiber ring is formed with concentrically arranged optical buses to interconnect more nodes. However, because of the technical limitations of the devices, the bandwidth and the number of interconnectable nodes achieved by these methods are limited, and in order to reduce the number of switches and build a flat data center, the AWGR-based interconnection scheme can utilize both the spatial domain and the wavelength domain. The AWGR is a buffer-free wavelength routing device which is not considered to be configured, and has a cyclic routing characteristic, and can forward an optical signal to a corresponding output port according to an input port and a wavelength of the optical signal. In addition, AWGR builds high throughput, low latency, and low power consumption networks while providing high reliability and all-optical interconnects.
Currently, there are some AWGR-based interconnect architectures, but most approaches fail to achieve high reliability and high throughput. Although existing AWGR-based optical networks may utilize wavelength division multiplexing to increase the capacity of each port, there are often blocking situations between optical signals with the same wavelength, which increases the packet loss rate and the system delay.
Disclosure of Invention
In order to solve the problems in the background art, the invention provides a buffer-free optical interconnection method for a data center, which takes an optical signal after wavelength division multiplexing as an input, is a flat, high-reliability and non-blocking data center network, reduces the cost, the number of devices and the energy consumption. The technical problems of multiple network devices, long configuration time and high power consumption of the traditional data center are solved, and the aims of low delay and high reliability are achieved on the premise of high throughput.
In order to achieve the purpose, the invention adopts the following technical scheme:
a bufferless optical interconnect architecture for a data center:
the switching system is divided into an inlet line card, a three-stage switching module and an outlet line card, wherein the switching module consists of a first-stage AWGR, a second-stage TWC and a third-stage AWGR; each of the M first-level AWGR and the M third-level AWGR has M input ports and output ports, each input port of the first-level AWGR is connected with an inlet line card, each output port of the third-level AWGR is connected with an outlet line card, and one output port of the first-level AWGR and one input port of the third-level AWGR are connected through a second-level TWC.
The number of the single-end ports of the AWGR device is M, and then the number of the inlet line cards and the number of the outlet line cards are M respectively2For it respectively from 0 to M2-1 for numbering ordering; the number of the first stage and the third stage AWGR in the switching module is M respectively, the AWGR is numbered and sequenced from 0 to M-1 respectively, and the port number is numbered from 0 to M2-a numbering ordering of 1; the second stage TWC in the switching module has M2From 0 to M for the second stage TWC as well2-1 for numbering ordering.
After the sorting is finished, the inlet line cards are connected with the input ports of the first-level AWGR one by one according to the serial numbers, and the outlet line cards are connected with the output ports of the third-level AWGR one by one according to the serial numbers.
In the switching module, the xth second-stage TWC in all the second-stage TWCs is connected with the xth input port in all the third-stage AWGR input ports, and x is more than or equal to 0 and less than or equal to M2-1, calculating x as follows:
Figure BDA0002607761170000021
x2=x mod M(0≤x2≤M-1)
wherein the content of the first and second substances,
Figure BDA0002607761170000022
denotes rounding down x/M, mod denotes taking the remainder, x1And x2Respectively representing the quotient and remainder of x divided by M, x1And x2Indicating that the xth input port of all third level AWGR input ports is located at the xth1X on a third level AWGR2And the local input port refers to a sequence number which is obtained by sequencing M ports on the single AWGR from 0 to M-1.
The xth TWC of all the second stage TWCs and the xth TWC of all the first stage AWGR2Xth on first level AWGR1And the output ports are connected. After all connections are completed, a bufferless optical interconnect architecture for the data center is formed.
The first stage of the switching module is provided with a (a is more than or equal to 1 and less than or equal to M) AWGR with M single-ended ports, and the third stage is provided with b (b is more than or equal to 1 and less than or equal to M) AWGR with M single-ended ports.
The innovation of the architecture of the invention is that a switching module based on a first-stage, a third-stage AWGR and a second-stage TWC is structurally arranged, wherein the TWC is a wavelength conversion device, the AWGR is a wavelength routing device, the first-stage, the third-stage and the second-stage are combined for use, and a wavelength domain and a space domain are simultaneously used for transmitting signals in optical signal transmission.
The routing method comprises the following steps:
1) ingress line card wavelength modulation
The structure only processes the wavelength as lambda01...λM-1The optical signal of (1).
The server framework generates M optical signals with different wavelengths, and the optical signals are subjected to wavelength division multiplexing and then enter each inlet line card through optical fiber transmission to be subjected to wavelength modulation;
for each inlet line card, M optical signals with different wavelengths enter the inlet line card, and the M optical signals can be processed simultaneously, wherein the different wavelengths are respectively lambda01...λM-1
For M2Each inlet line card simultaneously processes M wavelengths of lambda01...λM-1So that the structure can process M simultaneously3An optical signal;
each optical signal S (i, j) has an inlet line card serial number i of a source address and an outlet line card serial number j of a destination address, the optical signals S (i, j) are respectively input from the ith inlet line card of all inlet line cards and output from the jth outlet line card of all outlet line cards, and the wavelength of the optical signal S (i, j) is lambdak(i,j)Wherein k (i, j) is more than or equal to 0 and less than or equal to M-1, and k (i, j) represents the wavelength serial number of the optical signal S (i, j), and the calculation is carried out to obtain:
Figure BDA0002607761170000031
i2=i mod M(0≤i2≤M-1)
Figure BDA0002607761170000032
j2=j mod M(0≤j2≤M-1)
wherein i1And i2Respectively representing the quotient and remainder of i divided by M, j1And j2Respectively representing a quotient and a remainder of j divided by M;
the ith inlet line card of the optical signal S (i, j) and the ith in the exchange module1I on the first stage AWGR2Are connected to one another at input ports(ii) a The j (th) outlet line card of the optical signal S (i, j) and the j (th) outlet line card in the exchange module1J on the third level AWGR2The output ports are connected;
based on the above information, the wavelength λ of the optical signal S (i, j) is transmitted by the ingress line cardk(i,j)And modulating, wherein the modulated wavelength is as follows:
Figure BDA0002607761170000033
the modulated optical signal S (i, j) enters the first stage AWGR for routing through a waveguide between the ingress line card and the first stage AWGR:
2) switching module first stage AWGR wavelength routing
Each port of the first stage AWGR and the third stage AWGR can simultaneously process M different wavelengths of lambda01...λM-1I.e. for an AWGR with M single-ended ports, it can process M simultaneously2An optical signal. The AWGR has a cyclic routing characteristic, after an optical signal is input into each first-stage AWGR, the inside of the first-stage AWGR forwards to its local output port according to the local input port and the wavelength input by the current first-stage AWGR, and a formula of the wavelength routing inside the first-stage AWGR is as follows:
out=(in+k'(i,j))mod M
where in represents the ordinal number of the local input port of the optical signal S (i, j) on the current first stage AWGR, and k '(i, j) represents the wavelength number of the modulated optical signal S' (i, j), i.e. the wavelength is λk'(i,j)M denotes the total number of single-ended ports of the AWGR, out denotes the ordinal number of the local output port of the optical signal S (i, j) on the current first stage AWGR according to the cyclic routing characteristic;
the wavelength of the optical signal S (i, j) modulated by the inlet line card is lambdak'(i,j)Substituting the above formula, the modulated optical signal S' (i, j) enters the ith1The sequence number of the local output port of each first-level AWGR is:
Figure BDA0002607761170000034
modulated optical signal S' (i, j) at i-th1J on the first level AWGR1A local output port output, and the j th1A local output port and the (Mxj) th port1+i1) The second stage TWCs are connected and then forwarded to the second stage second (Mxj)1+i1) A TWC;
3) switching module second stage TWC wavelength modulation
The optical signal S' (i, j) enters the (Mxj) th1+i1) After the second stage TWC, the wavelength lambda of the optical signal S' (i, j) is adjusted according to the following formula of an outlet line cardk'(i,j)Modulating again, the modulated wavelength is lambdak”(i,j)Obtaining a wavelength of λk”(i,j)The remodulated optical signal S "(i, j):
Figure BDA0002607761170000041
(Mxj) th1+i1) An output port of the second stage TWC and the j1I on a third level AWGR1A local input port connected to the input port and having a wavelength of λk”(i,j)Is forwarded to the jth optical signal S' (i, j)1I on a third level AWGR1A local input port;
4) switching module third order AWGR wavelength routing
The routing process of the third stage AWGR is the same as that of the first stage AWGR, and the wavelength of the optical signal S' (i, j) after remodulation is lambdak”(i,j)Wavelength routing into a third level AWGR, through jth1The local output port number of each third level AWGR is:
out”(i,j)=(i1+k”(i,j))mod M=(i1+(i1-j2+M)mod M)mod M=j2=j mod M
after the remodulation, the optical signal S' (i, j) will be from the j-th1J on the third level AWGR2The total port serial number of the output port is correspondingly set as:
Figure BDA0002607761170000042
and the output port number of the optical signal S '(i, j) in all the output ports of the third-level AWGR is j after the optical signal S' (i, j) is modulated again, the port is connected with the jth outlet line card and is a destination port of the optical signal S (i, j), and therefore optical signal transmission of a bufferless optical interconnection backplane architecture for the data center is completed.
To M2For each ingress line card, the number of optical signals processed by each ingress line card may be the same or different, as long as the number of optical signals is an integer greater than or equal to 0 and less than or equal to M.
The innovation of the method is that the routing route of each optical signal S (i, j) in the wavelength division multiplexing optical signals is respectively determined through the wavelength modulation of the inlet line card in the step 1) and the wavelength modulation of the second-stage TWC in the step 3), and the wavelength routing is carried out by utilizing the circulating routing characteristic of the AWGR. The first stage AWGR and the third stage AWGR are interconnected through the second stage TWC, the number of inlet line cards can be increased, the number of interconnected servers is further increased, meanwhile, the wavelength domain and the space domain are utilized to transmit optical signals, and the throughput of the switching module can be increased.
The invention discloses a bufferless optical interconnection backplane architecture, which comprises an exchange module and a line card connected with each port of the exchange module. Signals generated by the server rack are subjected to wavelength division multiplexing, subjected to wavelength modulation through the inlet line card and forwarded to the switching module. The switching module is composed of a first stage AWGR (arrayed waveguide grating router), a third stage AWGR (arrayed waveguide grating router) and a second stage TWC (tunable wavelength converter), after optical signals with specific wavelengths enter the switching module, the optical signals are forwarded to corresponding outlet line cards by utilizing the wavelength conversion function of the TWC and the circulating routing function of the AWGR, and the outlet line cards process the optical signals and send the optical signals to corresponding servers.
The optical signals with different wavelengths are input into the inlet line card after being subjected to wavelength division multiplexing, and then the inlet performs wavelength modulation according to the source address and the destination address of the optical signals after demultiplexing the optical signals. For each input port of the first stage, the third stage AWGR to which the output line cards of the M optical signals are connected should be different, so as to prevent optical signals with the same wavelength from generating blocking inside the AWGR.
The invention has the beneficial effects that:
the invention can be widely used for realizing high-capacity and high-reliability all-optical interconnection, uses the AWGR device, and simultaneously utilizes the wavelength domain and the space domain, thereby using less switch resources, increasing the number of interconnected nodes of the data center in a large scale, effectively flattening the data center, overcoming the defects of low port bandwidth and limited port number of the traditional space switch, having the characteristics of high reliability, low complexity, low delay and the like, and having higher application value in practical engineering.
Drawings
FIG. 1 is a schematic diagram of the system architecture of the present invention.
Fig. 2 is a schematic of a package utilizing a waveguide for optical interconnection.
Fig. 3 is a schematic diagram of AWGR wavelength routing in accordance with the present invention.
Detailed Description
The invention is further illustrated by the following figures and examples.
As shown in fig. 1, the architecture of the present invention is divided into an ingress line card, a three-stage switching module and an egress line card, wherein the switching module is composed of a first-stage AWGR, a second-stage TWC and a third-stage AWGR; each of the M first-level AWGR and the M third-level AWGR has M input ports and output ports, each input port of the first-level AWGR is connected with an inlet line card, each output port of the third-level AWGR is connected with an outlet line card, and one output port of the first-level AWGR and one input port of the third-level AWGR are connected through a second-level TWC.
The number of the single-end ports of the AWGR device is M, and then the number of the inlet line cards and the number of the outlet line cards are M respectively2For it respectively from 0 to M2-1 for numbering ordering; the number of the first stage and the third stage AWGR in the switching module is M respectively, the AWGR is numbered and sequenced from 0 to M-1 respectively, and the port number is numbered from 0 to M2-a numbering ordering of 1; the second stage TWC in the switching module has M2From 0 to M for the second stage TWC as well2-1 for numbering ordering.
After the sorting is finished, the inlet line cards are connected with the input ports of the first-level AWGR one by one according to the serial numbers, and the outlet line cards are connected with the output ports of the third-level AWGR one by one according to the serial numbers.
In the switching module, the xth second-stage TWC in all the second-stage TWCs is connected with the xth input port in all the third-stage AWGR input ports, and x is more than or equal to 0 and less than or equal to M2-1, calculating x as follows:
Figure BDA0002607761170000061
x2=x mod M(0≤x2≤M-1)
wherein the content of the first and second substances,
Figure BDA0002607761170000062
denotes rounding down x/M, mod denotes taking the remainder, x1And x2Respectively representing the quotient and remainder of x divided by M, x1And x2Indicating that the xth input port of all third level AWGR input ports is located at the xth1X on a third level AWGR2And the local input port refers to a sequence number which is obtained by sequencing M ports on the single AWGR from 0 to M-1.
The xth TWC of all the second stage TWCs and the xth TWC of all the first stage AWGR2Xth on first level AWGR1And the output ports are connected. After all connections are completed, a bufferless optical interconnect architecture for the data center is formed. The first stage of the switching module is provided with a (a is more than or equal to 1 and less than or equal to M) AWGR with M single-ended ports, and the third stage is provided with b (b is more than or equal to 1 and less than or equal to M) AWGR with M single-ended ports.
The invention respectively uses the inlet line card and the outlet line card to carry out input and output processing on the optical signals, and uses exchange to carry out routing on the optical signals. The switching module, the ingress line card and the egress line card are connected by a backplane and the transmission of the optical signals is performed by waveguides on the backplane, as shown in fig. 2, the processed optical signals are directly modulated by a VCSEL (vertical cavity surface emitting laser) array and mapped via MLA mirrors to interconnect with the waveguides on the backplane.
After the server rack generates optical signals with different wavelengths, the optical signals are input into a backboard framework, routing is carried out by the backboard framework, and the optical signals are sent to a destination address, wherein the routing comprises the following steps:
1) ingress line card wavelength modulation
The structure only processes the wavelength as lambda01...λM-1The optical signal of (1). The server framework generates M optical signals with different wavelengths, and the optical signals are subjected to wavelength division multiplexing, transmitted through optical fibers and enter the inlet line card for wavelength modulation. For each inlet line card, the optical line card can simultaneously process M optical signals, and the wavelengths of the M optical signals are different and are respectively lambda01...λM-1. For M2Each inlet line card simultaneously processes M wavelengths of lambda01...λM-1The bandwidth of the single wavelength optical signal is 25Gbps, i.e. the backplane architecture can simultaneously process 25 xM3Data at Gbps. For example, optical signals with 32 wavelengths are wavelength division multiplexed and input to each ingress line card, the total throughput of 1024 ingress line cards is 819.2Tbps, and compared with a conventional optical space switch, the optical space switch can interconnect more server architectures, provide higher capacity, and implement large-capacity all-optical interconnection.
Each optical signal has a source address i and a destination address j, respectively corresponding to an inlet line card i and an outlet line card j of the signal, and is represented by S (i, j), and has a wavelength λk(i,j)Wherein k (i, j) is more than or equal to 0 and less than or equal to M-1.
Figure BDA0002607761170000063
i2=i mod M(0≤i2≤M-1)
Wherein i1And i2Respectively representing the quotient and remainder of dividing i by M, namely the I (i, j) of the inlet line card i and the ith of the first stage of the switching module1I th on AWGR2The local input ports are connected.
Figure BDA0002607761170000071
j2=j mod M(0≤j2≤M-1)
Wherein j is1And j2Respectively representing the quotient and remainder of j divided by M, namely the j of the outlet line card j of S (i, j) and the j of the third stage of the switching module1J on AWGR2The local output ports are connected.
Based on the above information, the wavelength λ of the optical signal S (i, j) is transmitted by the ingress line cardk(i,j)And modulating, wherein the modulated wavelength is as follows:
Figure BDA0002607761170000072
this signal will be routed through the waveguide between the ingress linecard and the first stage AWGR, into the first stage AWGR.
To M2For each ingress line card, the number of optical signals processed by each line card may be the same or different, as long as the number of optical signals is an integer greater than or equal to 0 and less than or equal to M. The optical signals with different wavelengths are input into the inlet line card after being subjected to wavelength division multiplexing, and then the inlet performs wavelength modulation according to the source address and the destination address of the optical signals after demultiplexing the optical signals. For each input port of the first stage, the third stage AWGR to which the output line cards of the M optical signals are connected should be different, so as to prevent optical signals with the same wavelength from generating blocking inside the AWGR.
2) Switching module first stage AWGR wavelength routing
The AWGR is a non-blocking contention-free switching fabric with delays on the order of nanoseconds and sub-nanoseconds, enabling low-delay interconnect transmission. Each port of the AWGR can simultaneously process M wavelengths of lambda01...λM-1I.e. for an AWGR with M single-ended ports, it can process M simultaneously2An optical signal. AWGR with cycleThe routing characteristics may be forwarded to the corresponding local output port of the AWGR according to the local input port and the wavelength of the optical signal on the AWGR, where the formula of the wavelength routing is as follows:
out=(in+k'(i,j))mod M
where in denotes the local input port of the optical signal S (i, j) on the AWGR, k' (i, j) denotes the wavelength number of the optical signal, i.e. its wavelength is λk'(i,j)M denotes the number of single-ended ports of the AWGR, and out denotes a local output port of the optical signal S (i, j) on this AWGR according to the cyclic routing characteristic.
Fig. 3 illustrates the wavelength routing of the AWGR, where different labels in the upper right corner of the wavelength indicate that it belongs to different local input ports.
After being modulated by the line card, the wavelength of the optical signal S (i, j) is lambdak'(i,j)Substituting it into the above formula, the optical signal passes through the ith stage1The local output port number of the AWGR is:
Figure BDA0002607761170000073
this means that the optical signal S (i, j) is at the ith stage of the first stage1J on AWGR1A local output port connected to the (Mxj) th stage of the second stage1+i1) TWCs are connected such that the optical signal S (i, j) is forwarded to the second stage (Mxj)1+i1) And a TWC.
3) Switching module second stage TWC wavelength modulation
The TWC can adjust any input wavelength to a specified output wavelength at a rate of 160Gbps with a linear increase in delay, generally below 30ns, as the amplitude of the converted wavelength changes.
The optical signal S (i, j) enters the second stage (Mxj)1+i1) After each TWC, according to the outlet line card, the wavelength lambda is measured according to the following formulak'(i,j)Modulating again, the modulated wavelength is lambdak”(i,j)
Figure BDA0002607761170000081
Second stage (Mxj)1+i1) TWC and third stage jth1I th on AWGR1A local input port is connected so that the wavelength is lambda at this timek”(i,j)Will be sent to the third stage j1I th on AWGR1A local input port.
4) Switching module third order AWGR wavelength routing
After TWC modulation, the wavelength of the optical signal S (i, j) is lambdak”(i,j)Substituting the wavelength into the wavelength routing formula of AWGR, the optical signal passes through the jth stage of the third stage1The local output port number of the AWGR is:
out”(i,j)=(i1+k”(i,j))mod M=(i1+(i1-j2+M)mod M)mod M=j2=j mod M
that is, the optical signal S (i, j) will be from the j-th1J on AWGR2And the local output port outputs, and the port number of the port is as follows:
Figure BDA0002607761170000082
i.e. the output port of this signal at the third stage is j, which is connected to the j-th egress line card, which is also the destination port for the optical signal S (i, j). To this end, the unbuffered optical interconnect backplane architecture for data centers completes the transmission of optical signals with a total delay on the order of nanoseconds.
When the conditions of the above steps are satisfied, the backplane architecture can simultaneously transmit M3The optical signal and the backplane structure are strictly non-blocking, i.e. no matter what state they are, a connection can be established at any time in the switching module, as long as the start point and the end point of the connection are idle, and the connection established in the network is not affected. Due to the strict non-blocking characteristic of the back plate framework, the packet loss rate of signals is greatly reduced, and the reliability is improved.
The optical interconnection method of the data center optical switching network of the invention is matched with the wavelength conversion of the TWC through the wavelength routing characteristic of the AWGR to complete the transmission of optical signals. From the control perspective, due to the cyclic routing characteristics of the AWGR and the selection of different input ports, a complex control architecture and optical cache are omitted, high capacity is realized with fewer devices, simple wavelength routing is provided by wavelength conversion of optical signals, and complexity is greatly reduced; from the point of view of power consumption, due to the passive nature of the AWGR, it does not consume any power, the required power consumption being that of the second stage TWC wavelength modulation, etc.
Therefore, the novel all-optical interconnection back plate framework with high capacity and high reliability can effectively flatten a data center, overcome the defects of low port bandwidth and limited port number of the traditional space switch, and has the characteristics of high bandwidth, low delay and the like.
The foregoing detailed description is intended to illustrate and not limit the invention, which is intended to be within the spirit and scope of the appended claims, and any changes and modifications that fall within the true spirit and scope of the invention are intended to be covered by the following claims.

Claims (4)

1. A bufferless optical interconnect architecture for a data center, comprising: the switching system is divided into an inlet line card, a three-stage switching module and an outlet line card, wherein the switching module consists of a first-stage AWGR, a second-stage TWC and a third-stage AWGR; each of the M first-stage AWGR and the M third-stage AWGR is provided with M input ports and output ports, each input port of the first-stage AWGR is connected with an inlet line card, each output port of the third-stage AWGR is connected with an outlet line card, and one output port of the first-stage AWGR is connected with one input port of the third-stage AWGR through a second-stage TWC;
in the switching module, the xth second-stage TWC in all the second-stage TWCs is connected with the xth input port in all the third-stage AWGR input ports, and x is more than or equal to 0 and less than or equal to M2-1, calculating x as follows:
Figure FDA0003017559300000011
x2=xmodM(0≤x2≤M-1)
wherein the content of the first and second substances,
Figure FDA0003017559300000012
denotes rounding down x/M, mod denotes taking the remainder, x1And x2Indicating that the xth input port of all third level AWGR input ports is located at the xth1X on a third level AWGR2And an input port.
2. The bufferless optical interconnect architecture for a data center of claim 1, wherein: the xth TWC of all the second stage TWCs and the xth TWC of all the first stage AWGR2Xth on first level AWGR1And the output ports are connected.
3. A routing method for a bufferless optical interconnect architecture for use in a data center as claimed in any one of claims 1-2 wherein: the routing method comprises the following steps:
1) ingress line card wavelength modulation
The structure only processes the wavelength as lambda01...λM-1The optical signal of (a);
the server framework generates M optical signals with different wavelengths, and the optical signals are subjected to wavelength division multiplexing and then enter each inlet line card through optical fiber transmission to be subjected to wavelength modulation;
for each inlet line card, M optical signals with different wavelengths are entered, wherein the different wavelengths are respectively lambda01...λM-1
For M2Each inlet line card simultaneously processes M wavelengths of lambda01...λM-1The optical signal of (a);
each optical signal S (i, j) has an inlet line card serial number i of a source address and an outlet line card sequence of a destination addressJ corresponding to the optical signal S (i, j) input from the ith inlet line card of all inlet line cards and output from the jth outlet line card of all outlet line cards, respectively, the wavelength of the optical signal S (i, j) is lambdak(i,j)Wherein k (i, j) is more than or equal to 0 and less than or equal to M-1, and k (i, j) represents the wavelength serial number of the optical signal S (i, j), and the calculation is carried out to obtain:
Figure FDA0003017559300000021
i2=imodM(0≤i2≤M-1)
Figure FDA0003017559300000022
j2=jmodM(0≤j2≤M-1)
wherein i1And i2Respectively representing the quotient and remainder of i divided by M, j1And j2Respectively representing a quotient and a remainder of j divided by M;
the ith inlet line card of the optical signal S (i, j) and the ith in the exchange module1I on the first stage AWGR2The input ports are connected; the j (th) outlet line card of the optical signal S (i, j) and the j (th) outlet line card in the exchange module1J on the third level AWGR2The output ports are connected;
2) according to the information in 1), the wavelength lambda of the optical signal S (i, j) is transmitted by the inlet line cardk(i,j)And modulating, wherein the modulated wavelength is as follows:
Figure FDA0003017559300000023
the modulated optical signal S (i, j) enters the first stage AWGR through the ingress line card for routing:
3) switching module first stage AWGR wavelength routing
Each port of the first stage AWGR and the third stage AWGR can simultaneously process M different wavelengths of lambda01...λM-1Optical signal ofAfter the signal is input into each first-stage AWGR, the inside of the first-stage AWGR forwards the signal to its output port according to the input port and the wavelength input by the current first-stage AWGR, and a formula of a wavelength routing inside the first-stage AWGR is as follows:
out=(in+k'(i,j))modM
wherein in represents the ordinal number of the input port of the optical signal S (i, j) on the current first stage AWGR, k '(i, j) represents the wavelength serial number of the modulated optical signal S' (i, j), M represents the total number of the single-ended ports of the AWGR, and out represents the ordinal number of the output port of the optical signal S (i, j) on the current first stage AWGR according to the cyclic routing characteristic;
the wavelength of the optical signal S (i, j) modulated by the inlet line card is lambdak'(i,j)Substituting the above formula, the modulated optical signal S' (i, j) enters the ith1The sequence number of the output port of each first-stage AWGR is:
Figure FDA0003017559300000024
modulated optical signal S' (i, j) at i-th1J on the first level AWGR1The output ports output, then forwarded to the second stage (Mxj)1+i1) A TWC;
4) switching module second stage TWC wavelength modulation
The optical signal S' (i, j) enters the (Mxj) th1+i1) After the second stage TWC, the wavelength lambda of the optical signal S' (i, j) is adjusted according to the following formula of an outlet line cardk'(i,j)Modulating again, the modulated wavelength is lambdak”(i,j)Obtaining a wavelength of λk”(i,j)The remodulated optical signal S "(i, j):
Figure FDA0003017559300000025
(Mxj) th1+i1) An output port of the second stage TWC and the j1I on a third level AWGR1A local input port connected to the input port and having a wavelength of λk”(i,j)Is forwarded to the jth optical signal S' (i, j)1I on a third level AWGR1An input port;
5) switching module third order AWGR wavelength routing
The routing process of the third stage AWGR is the same as that of the first stage AWGR, and the wavelength of the optical signal S' (i, j) after remodulation is lambdak”(i,j)Wavelength routing into a third level AWGR, through jth1The output port number of the third level AWGR is:
out”(i,j)=(i1+k”(i,j))modM=(i1+(i1-j2+M)modM)modM=j2=jmodM
after the remodulation, the optical signal S' (i, j) will be from the j-th1J on the third level AWGR2The total port serial number of the output port is correspondingly set as:
Figure FDA0003017559300000031
the output port number of the remodulated optical signal S "(i, j) in all the output ports of the third-level AWGR is j, and the output port of the remodulated optical signal S" (i, j) in all the output ports of the third-level AWGR is connected with the jth egress line card, thereby completing the optical signal transmission of the bufferless optical interconnection backplane architecture for the data center.
4. The routing method for the bufferless optical interconnect architecture of claim 3, wherein the method comprises:
to M2For each ingress line card, the number of optical signals processed by each ingress line card may be the same or different, as long as the number of optical signals is an integer greater than or equal to 0 and less than or equal to M.
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103795654A (en) * 2014-02-14 2014-05-14 上海交通大学 Non-blocking Clos switching network design method based on AWG

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4228533B2 (en) * 2000-10-18 2009-02-25 沖電気工業株式会社 Optical path switching device
US7430346B2 (en) * 2005-09-01 2008-09-30 Lucent Technologies Inc. Non-blocking cyclic AWG-based node architectures
WO2012167572A1 (en) * 2011-11-25 2012-12-13 华为技术有限公司 Polybox clustered optical network switching node, optical burst synchronization method and line frame
CN103336334B (en) * 2013-06-28 2015-06-03 华中科技大学 Optical switching system based on arrayed waveguide grating
CN104297853B (en) * 2014-10-16 2018-02-27 浙江大学 Modular wavelength and space All-optical routing device
CN105162721B (en) * 2015-07-31 2018-02-27 重庆大学 Full light network data centre network system and data communications method based on software defined network
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Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103795654A (en) * 2014-02-14 2014-05-14 上海交通大学 Non-blocking Clos switching network design method based on AWG

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
AWG-Based Non-Blocking Clos Networks;Tong Ye; Tony T. Lee; Weisheng Hu;《IEEE/ACM Transactions on Networking》;20150430;第491-503页 *

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