CN215072136U - Anti-pulse signal output circuit, system and equipment - Google Patents

Anti-pulse signal output circuit, system and equipment Download PDF

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Publication number
CN215072136U
CN215072136U CN202121137391.3U CN202121137391U CN215072136U CN 215072136 U CN215072136 U CN 215072136U CN 202121137391 U CN202121137391 U CN 202121137391U CN 215072136 U CN215072136 U CN 215072136U
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power supply
module
circuit
control module
output
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CN202121137391.3U
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王恒
陈科壬
黄雅凛
东莲正
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Guangzhou DSPPA Audio Co Ltd
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Guangzhou DSPPA Audio Co Ltd
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Abstract

The utility model discloses a pulse signal output prevention circuit, a system and a device, wherein the circuit comprises a power supply module, a power supply detection module, a control module, a device signal input module, a control module and a signal output interface; the control module is used for the power supply module to perform time delay output; the output end of the power supply module is connected to the input end of the power supply detection and control module, and the output end of the power supply detection and control module is connected to the input end of the control module; the output end of the power supply module is also connected to the input end of the equipment signal input module, the output end of the equipment signal input module is connected to the input end of the control module, and the output end of the control module is connected to the signal output interface; the utility model discloses can directly be controlled by hardware circuit, need not to add extra software control part, control response speed is very fast, and the circuit is simple also more be favorable to debugging and using to other logic control scenes, but wide application in electronic circuit technical field.

Description

Anti-pulse signal output circuit, system and equipment
Technical Field
The utility model belongs to the technical field of the electronic circuit technique and specifically relates to a prevent pulse signal output circuit, system and equipment.
Background
In the process of starting or shutting down the equipment, the equipment can produce an impact pulse signal at an output port due to the impact action of a power supply, and a loudspeaker connected with a power amplifier circuit can produce impact sound: in the prior art, in order to prevent the power amplifier circuit from generating the impact sound, a pulse-preventing circuit for starting and stopping a power supply is arranged, and the working principle of the pulse-preventing circuit is that a signal output stage circuit does not provide a power supply at first, and after the power supply is started stably, the power supply is controlled to electrify the signal output stage circuit so as to prevent the starting impact signal from being generated; or the mute of the IC chip or the function of the pin is closed, and the purpose of starting the computer to impact the signal is achieved through software delay control. However, the anti-pulse circuit in the prior art generally has the disadvantages of slow response speed, difficult debugging and the like.
SUMMERY OF THE UTILITY MODEL
In order to solve one of the above technical problems, the utility model aims to provide a: provided are a pulse-proof signal output circuit which is quick in response and easy to debug, and a pulse-proof signal output system and apparatus including the circuit.
The utility model adopts the technical proposal that:
in a first aspect, the utility model provides a pulse signal output prevention circuit, which comprises a power supply module, a power detection and control module, an equipment signal input module, a control module and a signal output interface; the control module is used for the power supply module to perform time delay output;
the output end of the power supply module is connected to the input end of the power supply detection and control module, and the output end of the power supply detection and control module is connected to the input end of the control module; the output end of the power supply module is also connected to the input end of the equipment signal input module, the output end of the equipment signal input module is connected to the input end of the control module, and the output end of the control module is connected to the signal output interface.
In some optional embodiments, the power detection and control module includes an RC delay circuit and a power detection circuit, the output terminal of the power supply module is connected to the input terminal of the RC delay circuit, the output terminal of the RC delay circuit is connected to the input terminal of the power detection circuit, and the output terminal of the power detection circuit is connected to the input terminal of the control module.
In some optional embodiments, the device signal input module comprises a device signal source and a digital signal control switch circuit; the output end of the equipment signal source is connected to the input end of the control module, and the output end of the digital signal control switch circuit is connected to the input end of the RC delay circuit.
In some optional embodiments, the control module is a relay control circuit.
In some optional embodiments, the power supply module is a 12V dc power supply.
In some optional embodiments, the relay control circuit comprises a first transistor, a second transistor, a first diode, and a relay;
the emitter of the first triode is connected to the base of the second triode, the collector of the second triode is connected to one end of the relay, and the first diode is connected with the coil of the relay in parallel.
In a second aspect, the present invention provides a pulse-proof signal output system including a pulse-proof signal output circuit as set forth in the first aspect.
In a third aspect, the present invention provides a pulse-proof signal output apparatus including a pulse-proof signal output system as set forth in the second aspect.
The utility model has the advantages that: according to the technical scheme, the control module is arranged in the signal output circuit, the problem that the power pulse signal impacts the output port when the computer is started and shut down is solved, the technical scheme can be directly controlled by a hardware circuit, an additional software control part is not required to be added, the control response speed is high, and the circuit is simple and is more favorable for debugging and application to other logic control scenes.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic block diagram of a pulse signal output circuit according to an embodiment of the present invention;
fig. 2 is a schematic circuit diagram of a pulse signal output circuit according to an embodiment of the present invention;
fig. 3 is a characteristic curve diagram of a diode according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present invention, and should not be construed as limiting the present invention.
In the description of the present invention, it is to be understood that the terms "length", "upper", "lower", "front", "rear", "left", "right", "top", "inner", "outer", "axial", "radial", "circumferential", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are merely for convenience of description and simplicity of description, and do not indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In a first aspect, as shown in fig. 1, the system of the present invention includes a power supply module, a power detection and control module, an equipment signal input module, a control module, and a signal output interface;
the output end of the power supply module is connected to the input end of the power supply detection and control module, and the output end of the power supply detection and control module is connected to the input end of the control module; the output end of the power supply module is also connected to the input end of the equipment signal input module, the output end of the equipment signal input module is connected to the input end of the control module, and the output end of the control module is connected to the signal output interface.
Specifically, the power supply module is configured to output a power supply signal and provide power support for other modules or control circuits in the circuit, and the power detection and control module is configured to perform voltage division and voltage reduction processing on a power supply voltage output by the power supply module, and cooperate with the control module to implement power-on delay in the processes of startup and shutdown, or prevent a shutdown pulse from being output to a port; the device signal input module is mainly used for receiving an instruction signal for controlling the startup or shutdown and controlling the startup or shutdown of a system or a device where the anti-pulse signal output circuit is located; meanwhile, the device signal input module also comprises a module for outputting signals which need to be output when the system or the device operates, such as audio signals and the like. In the embodiment, the control module mainly realizes power-on delay output or prevents the shutdown pulse from being connected to the output port according to the output signal of the power detection and control module. The signal output interface in the embodiment is mainly used for outputting signals provided by the equipment signal input module.
In some possible embodiments, as shown in FIG. 2, the power detection and control module includes an RC delay circuit and a power detection circuit;
the output end of the power supply module is connected to the input end of the RC delay circuit, the output end of the RC delay circuit is connected to the input end of the power supply detection circuit, and the output end of the power supply detection circuit is connected to the input end of the control module.
Specifically, as shown in fig. 2, in the embodiment, the RC delay circuit includes a diode D4, resistors R25 and R26, and a capacitor C7; the power supply detection circuit comprises resistors R22 and R15 and a voltage stabilizing diode DZ 2; the power-on RC delay circuit is formed by R22, R15, R23, R26 and C7, and the current charges C7 from R22 and R23 to enable the voltage of a pin 1 of the DZ2 to rise slowly. As shown in fig. 3, according to the diode reverse characteristics: when the reverse voltage is lower than (the withstand voltage value of the diode) the reverse breakdown voltage, the reverse resistance is very large, the reverse leakage current is very small, the diode is cut off, namely, the current cannot flow from the cathode to the anode; when the reverse voltage is larger than the (diode withstand voltage) reverse breakdown voltage, the reverse resistance is small, and the reverse current increases abruptly. The diode is conducted, namely, current flows from the negative electrode to the positive electrode; in addition, the breakdown in the embodiment is not a breakdown damage, but a sudden turn-on phenomenon, and the diode D4 in the embodiment is not damaged. Furthermore, in the embodiment where DZ2 is a 10V zener diode, when the voltage at pin 1 is greater than the zener voltage of zener diode D4, diode D4 conducts current in the reverse direction from pin 1 to pin 2, driving transistor Q4 of the control module. The triode Q4 controls the triode Q5 to turn on the switch relay, so that the circuit achieves the purpose of power-on delay output. When the device or system of the embodiment is rapidly turned off, for example, when the voltage of the dc power supply 12V is lower than 10V, the DZ2 is that the zener diode cannot reverse conduct the transistor Q4 in the control module without voltage driving due to the voltage dividing effect of R22 and R15, so that the control module is closed and the turn-off pulse cannot be connected to the output port. The diode D4 is used to discharge the voltage on the capacitor when the power is off, so as to avoid the delay circuit from being ineffective when the power is turned on and off rapidly (R22, R15, R23, R26 and C7 constitute a power-on RC delay circuit).
In some possible embodiments, the device signal input module includes a device signal source and a digital signal control switch circuit;
the output end of the equipment signal source is connected to the input end of the control module, and the output end of the digital signal control switch circuit is connected to the input end of the RC delay circuit.
Specifically, the equipment signal source is mainly used for providing normal output signals of the system or the equipment of the embodiment; the digital signal control switch circuit comprises a resistor R1, a resistor R24, a capacitor C6 and a triode Q6; when the power supply voltage jumps too much, a signal drives a triode Q6 through a resistor R1 and a capacitor C6, so that the voltage on a pin 3 of the triode Q6 is grounded, a relay of the control module is closed, and a power supply pulse signal cannot be output; a base pin 1 of the triode Q6 is connected with the digital IO port through a resistor R24, and the on-off control mode of the relay controlled by software can be further realized.
In some possible embodiments, the control module is a relay control circuit; the delayed electrification or the blocking of the shutdown pulse is realized through the switch of the relay.
In some possible embodiments, the relay control circuit includes a first transistor Q4, a second transistor Q5, a first diode D3, and a relay T1;
an emitter of the first triode Q4 is connected to a base of the second triode Q5, a collector of the second triode Q5 is connected to one end of the relay T1, and the first diode Q4 is connected with a coil of the relay in parallel;
in particular, in the embodiment, the T1 in the circuit is a relay and a Q5 triode forms an output switch circuit. When just powered on, relay T1 defaults to an off state and no signal is output.
In some possible embodiments, the power supply module is a 12V dc power supply for providing 12V dc power to other modules or control circuits in the circuit.
In a second aspect, embodiments of the present invention further provide an anti-pulse signal output system, which includes at least one anti-pulse signal output circuit as described in the first aspect.
In a third aspect, embodiments of the present invention further provide an anti-pulse signal output apparatus including an anti-pulse signal output system as described in the second aspect.
To sum up, compared with the prior art, the utility model, have following characteristics or advantage:
1: the technical proposal of the utility model solves the problem of directly eliminating the output port and the power impulse signal when starting up and shutting down from hardware without software control;
2: the technical scheme of the utility model reaction rate is fast, and the simple easy debugging of circuit conveniently is applied to other logic control scenes.
In the description herein, references to the description of "one embodiment," "another embodiment," or "certain embodiments," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (8)

1. A pulse signal output prevention circuit comprises a power supply module and a power supply detection and control module, and is characterized by further comprising an equipment signal input module, a control module and a signal output interface;
the control module is used for the power supply module to perform time delay output;
the output end of the power supply module is connected to the input end of the power supply detection and control module, and the output end of the power supply detection and control module is connected to the input end of the control module; the output end of the power supply module is also connected to the input end of the equipment signal input module, the output end of the equipment signal input module is connected to the input end of the control module, and the output end of the control module is connected to the signal output interface.
2. The anti-pulse signal output circuit according to claim 1, wherein the power supply detection and control module comprises an RC delay circuit and a power supply detection circuit, the output terminal of the power supply module is connected to the input terminal of the RC delay circuit, the output terminal of the RC delay circuit is connected to the input terminal of the power supply detection circuit, and the output terminal of the power supply detection circuit is connected to the input terminal of the control module.
3. The anti-pulse signal output circuit according to claim 2, wherein the device signal input module comprises a device signal source and a digital signal control switch circuit; the output end of the equipment signal source is connected to the input end of the control module, and the output end of the digital signal control switch circuit is connected to the input end of the RC delay circuit.
4. The anti-pulse signal output circuit as claimed in claim 1, wherein the control module is a relay control circuit.
5. The anti-pulse signal output circuit of claim 1, wherein the power supply module is a 12V dc power supply.
6. The anti-pulse signal output circuit according to claim 4, wherein the relay control circuit comprises a first transistor, a second transistor, a first diode, and a relay;
the emitter of the first triode is connected to the base of the second triode, the collector of the second triode is connected to one end of the relay, and the first diode is connected with the coil of the relay in parallel.
7. A pulse-proof signal output system, characterized in that the system comprises a pulse-proof signal output circuit according to any one of claims 1 to 6.
8. An impulse-proof signal output apparatus, characterized in that the apparatus comprises an impulse-proof signal output system as claimed in claim 7.
CN202121137391.3U 2021-05-25 2021-05-25 Anti-pulse signal output circuit, system and equipment Active CN215072136U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202121137391.3U CN215072136U (en) 2021-05-25 2021-05-25 Anti-pulse signal output circuit, system and equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202121137391.3U CN215072136U (en) 2021-05-25 2021-05-25 Anti-pulse signal output circuit, system and equipment

Publications (1)

Publication Number Publication Date
CN215072136U true CN215072136U (en) 2021-12-07

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202121137391.3U Active CN215072136U (en) 2021-05-25 2021-05-25 Anti-pulse signal output circuit, system and equipment

Country Status (1)

Country Link
CN (1) CN215072136U (en)

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