CN214900707U - Switched reluctance motor and control circuit thereof - Google Patents
Switched reluctance motor and control circuit thereof Download PDFInfo
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- CN214900707U CN214900707U CN202121051622.9U CN202121051622U CN214900707U CN 214900707 U CN214900707 U CN 214900707U CN 202121051622 U CN202121051622 U CN 202121051622U CN 214900707 U CN214900707 U CN 214900707U
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Abstract
The utility model relates to a switched reluctance motor and control circuit thereof, include: a first topology circuit and a control unit; the control unit outputs a first PWM control signal when the switched reluctance motor operates in a high-speed mode, and outputs a second PWM control signal when the switched reluctance motor operates in a low-speed mode; the first PWM control signal controls the current of an uncontrolled phase in the first topology circuit to rise in a high-level interval and fall in a low-level interval, and the falling rate of the current of the uncontrolled phase in the low-level interval is greater than the rising rate of the current in the high-level interval; the second PWM control signal adjusts the duty ratio of the second PWM control signal according to the rotating speed of the switched reluctance motor, and controls the average rising rate of the current of the controlled phase in each period of the second PWM control signal to be reduced. The utility model discloses eliminate the electric current peak of uncontrolled looks when switched reluctance motor high-speed operation, reduce the average rate of rise of electric current when low-speed operation, reduce the electric current harmonic, reduce the noise.
Description
Technical Field
The utility model relates to a switched reluctance motor's technical field, more specifically say, relate to a switched reluctance motor and control circuit thereof.
Background
Under the asymmetric topology, when the switched reluctance motor is in phase loss or in high-speed transition, overcurrent sometimes occurs, which causes the motor and the controller to heat if light, and causes the motor and the controller to burn if heavy. Through analysis of a controller topological structure, the overcurrent is caused by continuous conduction of an upper pipe, namely, under an asymmetric topology, when a switched reluctance motor runs at a high speed and is in phase failure, a pin switching device is fully conducted, so that a large current condition occurs to an uncontrolled phase, and the motor or the controller is burnt.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model lies in, to the above-mentioned defect of prior art, provide a switched reluctance motor and control circuit thereof.
The utility model provides a technical scheme that its technical problem adopted is: a switched reluctance motor control circuit is constructed comprising: the method comprises the following steps: the device comprises a first topological circuit and a control unit connected with the first topological circuit;
the control unit is used for outputting a first PWM control signal to a power switch of the first topology circuit when the switched reluctance motor operates in a high-speed mode;
and/or the control unit outputs a second PWM control signal to a power switch of the first topology circuit when the switched reluctance motor operates in a low-speed mode;
the first PWM control signal is used for controlling the current of the uncontrolled phase in the first topological circuit to rise in a high-level interval of the first PWM control signal and to fall in a low-level interval of the first PWM control signal, and the falling rate of the current of the uncontrolled phase in the first topological circuit in the low-level interval is greater than the rising rate of the current in the high-level interval;
the second PWM control signal is used for adjusting the self duty ratio according to the rotating speed of the switched reluctance motor so as to control the average rising rate of the current of the controlled phase in the first topological circuit to be reduced in each period of the second PWM control signal.
In the switched reluctance motor control circuit of the present invention, the switch reluctance motor control circuit further comprises: the second topological circuit is connected with the control unit and arranged in parallel with the first topological circuit;
the control unit is used for outputting a first PWM control signal to a power switch of the second topological circuit when the switched reluctance motor operates in a high-speed mode;
and/or the control unit outputs a second PWM control signal to a power switch of the second topology circuit when the switched reluctance motor operates in a low-speed mode;
the first PWM control signal is used for controlling the current of the uncontrolled phase in the second topological circuit to rise in a high-level interval of the first PWM control signal and to fall in a low-level interval of the first PWM control signal, and the falling rate of the current of the uncontrolled phase in the second topological circuit in the low-level interval is greater than the rising rate of the current in the high-level interval;
the second PWM control signal is used for adjusting the self duty ratio according to the rotating speed of the switched reluctance motor so as to control the average rising rate of the current of the controlled phase in the second topological circuit to be reduced in each period of the second PWM control signal.
In the switched reluctance motor control circuit of the present invention, the first topology circuit and the second topology circuit are asymmetric topology circuits.
In the switched reluctance motor control circuit of the present invention, the first topology circuit includes: the circuit comprises a first power switch, a first diode, a second switch, a third diode, a third switch, a first inductor and a second inductor;
a cathode of the first diode is connected with a first end of the first power switch and connected to a positive input end, an anode of the first diode is connected with a first end of the second switch and a first end of the first inductor, a second end of the first power switch is connected with a second end of the first inductor and a cathode of the third diode, a second end of the second switch and an anode of the third diode are connected and connected to a negative input end, and a control end of the first power switch and a control end of the second switch are respectively connected to the control unit;
the cathode of the second diode is connected to the positive input terminal, the anode of the second diode is connected to the second end of the second inductor and the first end of the third switch, the first end of the second inductor is connected to the second end of the first power switch, the second end of the third switch is connected to the negative input terminal, and the control terminal of the third switch is connected to the control unit.
In the switched reluctance motor control circuit of the present invention, when the switched reluctance motor operates in the high speed mode, the control terminal of the first power switch receives the first PWM control signal output by the control unit; when the switched reluctance motor operates in a low-speed mode, the control end of the first power switch receives a second PWM control signal output by the control unit; and the control end of the second switch and the control end of the third switch receive the level signal output by the control unit.
In the switched reluctance motor control circuit of the present invention, the first power switch, the second switch and the third switch are MOS transistors or IGBT transistors.
In the switched reluctance motor control circuit of the present invention, the second topology circuit includes: the fourth power switch, the fourth diode, the fifth switch, the sixth diode, the sixth switch, the third inductor and the fourth inductor;
a cathode of the fourth diode is connected to the first end of the fourth power switch and to the positive input terminal, an anode of the fourth diode is connected to the first end of the fifth switch and the first end of the third inductor, a second end of the fourth power switch is connected to the second end of the third inductor and the cathode of the sixth diode, a second end of the fifth switch and an anode of the sixth diode are connected and to the negative input terminal, and a control terminal of the fourth power switch and a control terminal of the fifth switch are respectively connected to the control unit;
the cathode of the fifth diode is connected to the positive input terminal, the anode of the fifth diode is connected to the second end of the fourth inductor and the first end of the sixth switch, the first end of the fourth inductor is connected to the second end of the fourth power switch, the second end of the sixth switch is connected to the negative input terminal, and the control terminal of the sixth switch is connected to the control unit.
In the switched reluctance motor control circuit of the present invention, when the switched reluctance motor operates in the high speed mode, the control terminal of the fourth power switch receives the first PWM control signal output by the control unit; when the switched reluctance motor operates in a low-speed mode, the control end of the fourth power switch receives a second PWM control signal output by the control unit; and the control end of the fifth switch and the control end of the sixth switch receive the level signal output by the control unit.
In the switched reluctance motor control circuit of the present invention, the fourth power switch, the fifth switch and the sixth switch are MOS transistors or IGBT transistors.
In the switched reluctance motor control circuit of the present invention, the first topology circuit includes: the first power switch, the first diode, the second switch, the third diode, the fourth diode, the third power switch, the fourth switch, the first inductor and the second inductor;
a cathode of the first diode is connected with a first end of the first power switch and connected to a positive input end, an anode of the first diode is connected with a first end of the second switch and a first end of the first inductor, a second end of the first power switch is connected with a second end of the first inductor and a cathode of the second diode, a second end of the second switch and an anode of the second diode are connected and connected to a negative input end, and a control end of the first power switch and a control end of the second switch are respectively connected to the control unit;
the cathode of the third diode is connected to the first end of the third power switch and connected to the positive input terminal, the anode of the third diode is connected to the first end of the second inductor and the first end of the fourth switch, the second end of the fourth switch is connected to the anode of the fourth diode and connected to the negative input terminal, the second end of the third power switch is connected to the second end of the second inductor and the cathode of the fourth diode, and the control terminal of the third power switch and the control terminal of the fourth switch are connected to the control unit respectively.
Switched reluctance motor control circuit in the switched reluctance motor operation when the low-speed mode:
the control unit outputs a second PWM control signal to the control end of the first power switch and outputs a level signal to the control end of the second switch;
and/or the control unit outputs a second PWM control signal to the control end of the third power switch and outputs a level signal to the control end of the fourth switch.
In the switched reluctance motor control circuit of the present invention, the second topology circuit includes: a fifth diode, a fifth power switch, a sixth diode, a seventh power switch, an eighth diode, a third inductor, and a fourth inductor;
a cathode of the fifth diode is connected to the first end of the fifth power switch and to the positive input terminal, an anode of the fifth diode is connected to the first end of the sixth switch and the first end of the third inductor, a second end of the fifth power switch is connected to the second end of the third inductor and the cathode of the sixth diode, a cathode of the sixth diode and a second end of the sixth switch are connected to the negative input terminal, and a control terminal of the fifth power switch and a control terminal of the sixth switch are respectively connected to the control unit;
a cathode of the seventh diode is connected to the first end of the seventh power switch and is connected to the positive input terminal, an anode of the seventh diode is connected to the first end of the fourth inductor and the first end of the eighth switch, a second end of the eighth switch is connected to an anode of the eighth diode and is connected to the negative input terminal, a second end of the seventh power switch is connected to the second end of the fourth inductor and the cathode of the eighth diode, and a control terminal of the seventh power switch and a control terminal of the eighth switch are respectively connected to the control unit.
Switched reluctance motor control circuit in the switched reluctance motor operation when the low-speed mode:
the control unit outputs a second PWM control signal to the control end of the seventh power switch and outputs a level signal to the control end of the eighth switch;
and/or the control unit outputs a second PWM control signal to the control end of the seventh power switch and outputs a level signal to the control end of the eighth switch.
Switched reluctance motor control circuit in the switched reluctance motor operation is when high-speed mode, first PWM control signal's duty cycle is more than or equal to 0.8.
Switched reluctance motor control circuit in the switched reluctance motor operation is when low-speed mode, second PWM control signal's duty cycle is followed switched reluctance motor's rotational speed change and change.
The utility model also provides a switched reluctance motor, including above switched reluctance motor control circuit.
Implement the utility model discloses a switched reluctance motor control circuit, switched reluctance motor have following beneficial effect: a first topology circuit and a control unit; the control unit outputs a first PWM control signal when the switched reluctance motor operates in a high-speed mode, and outputs a second PWM control signal when the switched reluctance motor operates in a low-speed mode; the first PWM control signal controls the current of an uncontrolled phase in the first topology circuit to rise in a high-level interval and fall in a low-level interval, and the falling rate of the current of the uncontrolled phase in the low-level interval is greater than the rising rate of the current in the high-level interval; the second PWM control signal adjusts the self air ratio according to the rotating speed of the switched reluctance motor, and controls the average rising rate of the current of the controlled phase in each period of the second PWM control signal to be reduced. The utility model discloses eliminate the electric current peak of uncontrolled looks when switched reluctance motor high-speed operation, reduce the average rate of rise of electric current when low-speed operation, reduce the electric current harmonic, reduce the noise.
Drawings
The invention will be further explained with reference to the drawings and examples, wherein:
fig. 1 is a schematic block diagram of a switched reluctance motor control circuit according to an embodiment of the present invention;
fig. 2 is a circuit diagram of a first embodiment of a control circuit of a switched reluctance motor provided by the present invention;
FIG. 3 is a schematic diagram of the current variation of a conventional switched reluctance motor in high-speed operation;
fig. 4 is a schematic diagram of a current change of a switched reluctance motor according to an embodiment of the present invention during high-speed operation;
FIG. 5 is a schematic diagram of the current variation of a prior art switched reluctance motor at low speed operation;
fig. 6 is a schematic diagram of current variation of a switched reluctance motor control circuit according to an embodiment of the present invention during low-speed operation;
FIG. 7 is a schematic current diagram of the uncontrolled phase in the first topology during the low interval of the first PWM control signal;
fig. 8 is a circuit diagram of a second embodiment of a switched reluctance motor control circuit according to the present invention.
Detailed Description
In order to clearly understand the technical features, objects, and effects of the present invention, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Referring to fig. 1, fig. 1 is a schematic block diagram of a first embodiment of a switched reluctance motor control circuit provided by the present invention, the switched reluctance motor control circuit includes: the control unit 104 comprises a first topology circuit 102, a second topology circuit 103, and a tank circuit 101.
The first topology circuit 102 and the second topology circuit 103 of the embodiment of the present invention are asymmetric topology circuits.
Specifically, the control unit 104 is connected to the first topology circuit 102, and the control unit 104 is configured to output a first PWM control signal to the power switch of the first topology circuit 102 when the switched reluctance motor operates in the high speed mode. And/or, the control unit 104 outputs the second PWM control signal to the power switch of the first topology circuit 102 when the switched reluctance motor operates in the low speed mode.
The first PWM control signal is used to control the current of the uncontrolled phase in the first topology circuit 102 to increase in the high level interval of the first PWM control signal and decrease in the low level interval of the first PWM control signal, and the decrease rate of the current of the uncontrolled phase in the first topology circuit 102 in the low level interval is greater than the increase rate of the current in the high level interval; the second PWM control signal is used to adjust its duty ratio according to the rotation speed of the switched reluctance motor, so as to control the average rising rate of the current of the controlled phase in the first topology circuit 102 to decrease in each period of the second PWM control signal.
Similarly, the control unit 104 is connected to the second topology circuit 103, and the control unit 104 is configured to output the first PWM control signal to the power switch of the second topology circuit 103 when the switched reluctance motor operates in the high speed mode. And/or, the control unit 104 outputs the second PWM control signal to the power switch of the second topology circuit 103 when the switched reluctance motor operates in the low speed mode.
The first PWM control signal is used to control the current of the uncontrolled phase in the second topology circuit 103 to increase in the high level interval of the first PWM control signal and decrease in the low level interval of the first PWM control signal, and the decrease rate of the current of the uncontrolled phase in the second topology circuit 103 in the low level interval is greater than the increase rate of the current in the high level interval; the second PWM control signal is used to adjust its duty ratio according to the rotation speed of the switched reluctance motor, so as to control the average rising rate of the current of the controlled phase in the second topology circuit 103 to decrease in each period of the second PWM control signal.
By adding the first PWM control signal, the current of the uncontrolled phase of the motor can be effectively reduced when the switched reluctance motor runs at a high speed, and the motor and the controller can be protected. When the motor runs at a low speed, a second PWM control signal with a proper proportion of duty ratio is added in the current chopping control (the second PWM control signal changes along with the rotating speed of the switched reluctance motor, the rotating speed of the switched reluctance motor is reduced, the duty ratio of the second PWM control signal is reduced, the rotating speed of the switched reluctance motor is increased, and the duty ratio of the second PWM control signal is increased), so that the current chopping threshold can be effectively reduced, current harmonics are reduced, and the low-speed running noise of the motor is reduced.
Referring to fig. 2, fig. 2 is a circuit diagram of a first embodiment of a switched reluctance motor control circuit according to the present invention.
The embodiment of the present invention provides a high-speed control scheme and a low-speed control scheme, which can be applied to this embodiment. That is, when the switched reluctance motor operates in the high speed mode, the current of the uncontrolled phase in the first topology circuit 102 or the second topology circuit 103 may be controlled by the first PWM control signal, and the falling rate of the current in the low level interval of the uncontrolled phase in the first topology circuit 102 or the second topology circuit 103 is greater than the rising rate of the current in the high level interval. When the switched reluctance motor operates in the low speed mode, the average rising rate of the current of the controlled phase in the first topology circuit 102 or the second topology circuit 103 can be controlled to decrease in each period of the second PWM control signal by the second PWM control signal.
Specifically, as shown in fig. 2, in this embodiment, the first topology circuit 102 includes: the circuit comprises a first power switch Q1, a first diode D1, a second diode D2, a second switch Q2, a third diode D3, a third switch Q3, a first inductor A and a second inductor C.
A cathode of the first diode D1 is connected to a first end of the first power switch Q1 and connected to the positive input terminal, an anode of the first diode D1 is connected to a first end of the second switch Q2 and a first end of the first inductor a, a second end of the first power switch Q1 is connected to a second end of the first inductor a and a cathode of the third diode D3, a second end of the second switch Q2 and an anode of the third diode D3 are connected and connected to the negative input terminal, and a control terminal of the first power switch Q1 and a control terminal of the second switch Q2 are respectively connected to the control unit 104; the cathode of the second diode D2 is connected to the positive input terminal, the anode of the second diode D2 is connected to the second terminal of the second inductor C and the first terminal of the third switch Q3, the first terminal of the second inductor C is connected to the second terminal of the first power switch Q1, the second terminal of the third switch Q3 is connected to the negative input terminal, and the control terminal of the third switch Q3 is connected to the control unit 104.
When the switched reluctance motor operates in a high-speed mode, the control terminal of the first power switch Q1 receives a first PWM control signal output by the control unit 104; when the switched reluctance motor operates in the low-speed mode, the control terminal of the first power switch Q1 receives the second PWM control signal output by the control unit 104; a control terminal of the second switch Q2 and a control terminal of the third switch Q3 receive the level signal output by the control unit 104.
Optionally, the first power switch Q1, the second switch Q2, and the third switch Q3 are MOS transistors, IGBT transistors, or other switching devices.
As shown in fig. 2, the first topology circuit 102 includes an a phase and a C phase, where the C phase is an uncontrolled phase when the a phase is controlled to operate; when the control phase C is operated, the phase A is an uncontrolled phase. Further, as shown in fig. 2, the a-phase and the C-phase share one upper bridge power switch, i.e., the first power switch Q1.
In this embodiment, as shown in fig. 2, the second topology circuit 103 includes: a fourth power switch Q4, a fourth diode D4, a fifth diode D5, a fifth switch Q5, a sixth diode D6, a sixth switch Q6, a third inductor B, and a fourth inductor D.
A cathode of the fourth diode D4 is connected to the first end of the fourth power switch Q4 and to the positive input terminal, an anode of the fourth diode D4 is connected to the first end of the fifth switch Q5 and the first end of the third inductor B, a second end of the fourth power switch Q4 is connected to the second end of the third inductor B and the cathode of the sixth diode D6, a second end of the fifth switch Q5 and an anode of the sixth diode D6 are connected to the negative input terminal, and a control terminal of the fourth power switch Q4 and a control terminal of the fifth switch Q5 are respectively connected to the control unit 104; the cathode of the fifth diode D5 is connected to the positive input terminal, the anode of the fifth diode D5 is connected to the second terminal of the fourth inductor D and the first terminal of the sixth switch Q6, the first terminal of the fourth inductor D is connected to the second terminal of the fourth power switch Q4, the second terminal of the sixth switch Q6 is connected to the negative input terminal, and the control terminal of the sixth switch Q6 is connected to the control unit 104.
When the switched reluctance motor operates in a high-speed mode or the like, the control terminal of the fourth power switch Q4 receives the first PWM control signal output by the control unit 104; when the switched reluctance motor operates in the low-speed mode, the control terminal of the fourth power switch Q4 receives the second PWM control signal output by the control unit 104; a control terminal of the fifth switch Q5 and a control terminal of the sixth switch Q6 receive the level signals output by the control unit 104.
Optionally, the fourth power switch Q4, the fifth switch Q5 and the sixth switch Q6 are MOS transistors.
As shown in fig. 2, the second topology circuit 103 includes a B phase and a D phase, wherein the D phase is an uncontrolled phase when the B phase is controlled to operate; when the control D phase is operated, the B phase is an uncontrolled phase. Further, as shown in fig. 2, the B-phase and the D-phase share one upper bridge power switch, i.e., a fourth power switch Q4.
The tank circuit 101 includes: the energy storage capacitor CE. The first end of the energy storage capacitor CE is connected to the positive input end, and the second end of the energy storage capacitor CE is connected to the negative input end.
In some embodiments, the control unit 104 includes a single chip microcomputer, which may be, for example, STM 32.
Further, the control unit 104 provides the second switch Q2, the third switch Q3, the fifth switch Q5, and the sixth switch Q6 with a single level signal, i.e., a high level or a low level. That is, the control unit 104 controls the second switch Q2, the third switch Q3, the fifth switch Q5, and the sixth switch Q6 to be turned on or off.
Further, in some embodiments, in an asymmetric topology controlled (e.g. 8/6) switched reluctance motor, when the motor is under current chopping control (low speed state) and angular position control (high speed and open phase state), by adding a PWM control signal, when a common upper bridge power device is turned off, the uncontrolled phase generates a large current drop rate, which can prevent the uncontrolled phase from generating a positive feedback effect of current accumulation, thereby ensuring that the uncontrolled phase current does not generate overcurrent, and effectively protecting the device and the motor.
Specifically, when the motor is operated at a high speed, the torque problem of the motor is considered, so that the duty ratio of the added first PWM control signal is not too small, and the insufficient current rise rate is avoided. Generally, when the switched reluctance motor operates in the high speed mode, the duty ratio of the first PWM control signal is greater than or equal to 0.8.
In order to improve the rising capability of the current and reduce the dependence on the precise angle during the low-speed operation, therefore, generally, when the switched reluctance motor operates in the low-speed mode, the duty ratio of the second PWM control signal is changed along with the change of the rotating speed of the switched reluctance motor. Optionally, the duty cycle of the second PWM control signal is 15 times the minimum duty cycle, or the duty cycle of the PWM control signal is greater than 15 times the minimum duty cycle.
The following is illustrated by taking phase A as an example:
let the duty cycle of the first PWM control signal be 95%. The second PWM control signal varies (may be set to 1% to 100%) with the variation of the rotation speed of the switched reluctance motor. Phase C operates (i.e., phase C is the controlled phase).
As shown in fig. 3, it is a schematic current diagram of the motor under high speed control when the first PWM control signal is not added. As is apparent from fig. 3, the uncontrolled phase (phase a) is operated at high speed, and overcurrent is apparently occurred. And fig. 4 is a schematic current diagram of the present invention added with the first PWM control signal. As can be seen from fig. 4, when the first PWM control signal is added, when the first power switch Q1 is at a high level (95%), the current of the a phase rises; when the first power switch Q1 is at low level (5% in percentage), the current of the a phase flows as shown in fig. 7, and the rate of change of the current of the a phase is:
the current drops, and the speed of the current drop is obviously greater than the rising speed, and the current waveform is shown in fig. 4, so that the current spike of the phase A can be effectively avoided, and the motor and the controller can be protected.
As shown in fig. 5, the current diagram of the motor under the low speed control when the second PWM control signal is not added is shown. As is apparent from fig. 5, when the controlled phase (C phase) operates at a low speed, the current ripple is large, the harmonic amplitude is large, and electromagnetic noise is generated. And fig. 6 is a schematic current diagram of the present invention adding a second PWM control signal. As can be seen from fig. 6, after the second PWM control signal is added, the average rising rate of the C-phase current in each PWM period of the second PWM control signal is reduced, so that the target current can be reduced, the current harmonics can be reduced, and the low-speed operation noise of the motor can be effectively reduced.
Referring to fig. 8, a circuit diagram of a second embodiment of a control circuit of a switched reluctance motor according to the present invention is shown.
The embodiment of the present invention provides a low-speed control method, which can be applied to this embodiment. That is, when the switched reluctance motor operates in the high speed mode, the average rising rate of the current of the controlled phase in the first topology circuit 102 or the second topology circuit 103 may be controlled to decrease in each period of the second PWM control signal by the second PWM control signal.
Specifically, as shown in fig. 8, in this embodiment, the first topology circuit 102 includes: a first power switch Q1, a first diode D1, a second diode D2, a second switch D2, a third diode D3, a fourth diode D4, a third power switch Q3, a fourth switch Q4, a first inductor a, and a second inductor C.
A cathode of the first diode D1 is connected to a first end of the first power switch Q1 and connected to the positive input terminal, an anode of the first diode D1 is connected to a first end of the second switch D2 and a first end of the first inductor a, a second end of the first power switch Q1 is connected to a second end of the first inductor a and a cathode of the second diode D2, a second end of the second switch D2 and an anode of the second diode D2 are connected and connected to the negative input terminal, and a control terminal of the first power switch Q1 and a control terminal of the second switch D2 are respectively connected to the control unit 104; a cathode of the third diode D3 and a first end of the third power switch Q3 are connected to the positive input terminal, an anode of the third diode D3 is connected to a first end of the second inductor C and a first end of the fourth switch Q4, a second end of the fourth switch Q4 and an anode of the fourth diode D4 are connected to the negative input terminal, a second end of the third power switch Q3 is connected to a second end of the second inductor C and a cathode of the fourth diode D4, and a control end of the third power switch Q3 and a control end of the fourth switch Q4 are respectively connected to the control unit 104.
When the switched reluctance motor operates in the low speed mode: the control unit 104 outputs a second PWM control signal to the control terminal of the first power switch Q1, and outputs a level signal to the control terminal of the second switch D2; and/or the control unit 104 outputs the second PWM control signal to the control terminal of the third power switch Q3 and outputs a level signal to the control terminal of the fourth switch Q4.
In this embodiment, the second topology circuit 103 includes: a fifth diode D5, a fifth power switch Q5, a sixth switch Q6, a sixth diode, a seventh diode D7, a seventh power switch Q7, an eighth switch Q8, an eighth diode D8, a third inductor B, and a fourth inductor D.
A cathode of the fifth diode D5 is connected to the first end of the fifth power switch Q5 and to the positive input terminal, an anode of the fifth diode D5 is connected to the first end of the sixth switch Q6 and the first end of the third inductor B, a second end of the fifth power switch Q5 is connected to the second end of the third inductor B and the cathode of the sixth diode, a cathode of the sixth diode and a second end of the sixth switch Q6 are connected to the negative input terminal, and a control terminal of the fifth power switch Q5 and a control terminal of the sixth switch Q6 are respectively connected to the control unit 104; a cathode of the seventh diode D7 and a first end of the seventh power switch Q7 are connected to the positive input terminal, an anode of the seventh diode D7 is connected to a first end of the fourth inductor D and a first end of the eighth switch Q8, a second end of the eighth switch Q8 and an anode of the eighth diode D8 are connected to the negative input terminal, a second end of the seventh power switch Q7 is connected to a second end of the fourth inductor D and a cathode of the eighth diode D8, and a control end of the seventh power switch Q7 and a control end of the eighth switch Q8 are respectively connected to the control unit 104.
When the switched reluctance motor operates in the low speed mode: the control unit 104 outputs the second PWM control signal to the control terminal of the seventh power switch Q7, and outputs a level signal to the control terminal of the eighth switch Q8; and/or the control unit 104 outputs the second PWM control signal to the control terminal of the seventh power switch Q7 and outputs a level signal to the control terminal of the eighth switch Q8.
The embodiment of the utility model provides a power switch, switch if be the MOS pipe, then the first end of power switch and switch is the drain electrode of MOS pipe, and the second end is the source electrode of MOS pipe, and the control end is the grid of MOS pipe.
The utility model also discloses a switched reluctance motor, this switched reluctance motor includes the embodiment of the utility model discloses a switched reluctance motor control circuit.
The above embodiments are only for illustrating the technical concept and features of the present invention, and the purpose of the embodiments is to enable people skilled in the art to understand the contents of the present invention and implement the present invention accordingly, which can not limit the protection scope of the present invention. All equivalent changes and modifications made within the scope of the claims of the present invention shall fall within the scope of the claims of the present invention.
Claims (16)
1. A switched reluctance motor control circuit, comprising: the device comprises a first topological circuit and a control unit connected with the first topological circuit;
the control unit is used for outputting a first PWM control signal to a power switch of the first topology circuit when the switched reluctance motor operates in a high-speed mode;
and/or the control unit outputs a second PWM control signal to a power switch of the first topology circuit when the switched reluctance motor operates in a low-speed mode;
the first PWM control signal is used for controlling the current of the uncontrolled phase in the first topological circuit to rise in a high-level interval of the first PWM control signal and to fall in a low-level interval of the first PWM control signal, and the falling rate of the current of the uncontrolled phase in the first topological circuit in the low-level interval is greater than the rising rate of the current in the high-level interval;
the second PWM control signal is used for adjusting the self duty ratio according to the rotating speed of the switched reluctance motor so as to control the average rising rate of the current of the controlled phase in the first topological circuit to be reduced in each period of the second PWM control signal.
2. The switched reluctance motor control circuit of claim 1, further comprising: the second topological circuit is connected with the control unit and arranged in parallel with the first topological circuit;
the control unit is used for outputting a first PWM control signal to a power switch of the second topological circuit when the switched reluctance motor operates in a high-speed mode;
and/or the control unit outputs a second PWM control signal to a power switch of the second topology circuit when the switched reluctance motor operates in a low-speed mode;
the first PWM control signal is used for controlling the current of the uncontrolled phase in the second topological circuit to rise in a high-level interval of the first PWM control signal and to fall in a low-level interval of the first PWM control signal, and the falling rate of the current of the uncontrolled phase in the second topological circuit in the low-level interval is greater than the rising rate of the current in the high-level interval;
the second PWM control signal is used for adjusting the self duty ratio according to the rotating speed of the switched reluctance motor so as to control the average rising rate of the current of the controlled phase in the second topological circuit to be reduced in each period of the second PWM control signal.
3. The switched reluctance motor control circuit of claim 2 wherein the first topology circuit and the second topology circuit are asymmetric topology circuits.
4. The switched reluctance motor control circuit of claim 2, wherein the first topology circuit comprises: the circuit comprises a first power switch, a first diode, a second switch, a third diode, a third switch, a first inductor and a second inductor;
a cathode of the first diode is connected with a first end of the first power switch and connected to a positive input end, an anode of the first diode is connected with a first end of the second switch and a first end of the first inductor, a second end of the first power switch is connected with a second end of the first inductor and a cathode of the third diode, a second end of the second switch and an anode of the third diode are connected and connected to a negative input end, and a control end of the first power switch and a control end of the second switch are respectively connected to the control unit;
the cathode of the second diode is connected to the positive input terminal, the anode of the second diode is connected to the second end of the second inductor and the first end of the third switch, the first end of the second inductor is connected to the second end of the first power switch, the second end of the third switch is connected to the negative input terminal, and the control terminal of the third switch is connected to the control unit.
5. The switched reluctance motor control circuit of claim 4, wherein the control terminal of the first power switch receives the first PWM control signal output by the control unit when the switched reluctance motor operates in a high speed mode; when the switched reluctance motor operates in a low-speed mode, the control end of the first power switch receives a second PWM control signal output by the control unit; and the control end of the second switch and the control end of the third switch receive the level signal output by the control unit.
6. The switched reluctance motor control circuit of claim 4, wherein the first power switch, the second switch and the third switch are MOS transistors or IGBT transistors.
7. The switched reluctance motor control circuit of claim 4, wherein the second topology circuit comprises: the fourth power switch, the fourth diode, the fifth switch, the sixth diode, the sixth switch, the third inductor and the fourth inductor;
a cathode of the fourth diode is connected to the first end of the fourth power switch and to the positive input terminal, an anode of the fourth diode is connected to the first end of the fifth switch and the first end of the third inductor, a second end of the fourth power switch is connected to the second end of the third inductor and the cathode of the sixth diode, a second end of the fifth switch and an anode of the sixth diode are connected and to the negative input terminal, and a control terminal of the fourth power switch and a control terminal of the fifth switch are respectively connected to the control unit;
the cathode of the fifth diode is connected to the positive input terminal, the anode of the fifth diode is connected to the second end of the fourth inductor and the first end of the sixth switch, the first end of the fourth inductor is connected to the second end of the fourth power switch, the second end of the sixth switch is connected to the negative input terminal, and the control terminal of the sixth switch is connected to the control unit.
8. The switched reluctance motor control circuit of claim 7, wherein when the switched reluctance motor operates in a high speed mode, the control terminal of the fourth power switch receives the first PWM control signal output by the control unit; when the switched reluctance motor operates in a low-speed mode, the control end of the fourth power switch receives a second PWM control signal output by the control unit; and the control end of the fifth switch and the control end of the sixth switch receive the level signal output by the control unit.
9. The switched reluctance motor control circuit of claim 7, wherein the fourth power switch, the fifth switch and the sixth switch are MOS transistors or IGBT transistors.
10. The switched reluctance motor control circuit of claim 2, wherein the first topology circuit comprises: the first power switch, the first diode, the second switch, the third diode, the fourth diode, the third power switch, the fourth switch, the first inductor and the second inductor;
a cathode of the first diode is connected with a first end of the first power switch and connected to a positive input end, an anode of the first diode is connected with a first end of the second switch and a first end of the first inductor, a second end of the first power switch is connected with a second end of the first inductor and a cathode of the second diode, a second end of the second switch and an anode of the second diode are connected and connected to a negative input end, and a control end of the first power switch and a control end of the second switch are respectively connected to the control unit;
the cathode of the third diode is connected to the first end of the third power switch and connected to the positive input terminal, the anode of the third diode is connected to the first end of the second inductor and the first end of the fourth switch, the second end of the fourth switch is connected to the anode of the fourth diode and connected to the negative input terminal, the second end of the third power switch is connected to the second end of the second inductor and the cathode of the fourth diode, and the control terminal of the third power switch and the control terminal of the fourth switch are connected to the control unit respectively.
11. The switched reluctance motor control circuit of claim 10, wherein when the switched reluctance motor operates in a low speed mode:
the control unit outputs a second PWM control signal to the control end of the first power switch and outputs a level signal to the control end of the second switch;
and/or the control unit outputs a second PWM control signal to the control end of the third power switch and outputs a level signal to the control end of the fourth switch.
12. The switched reluctance motor control circuit of claim 10, wherein the second topology circuit comprises: a fifth diode, a fifth power switch, a sixth diode, a seventh power switch, an eighth diode, a third inductor, and a fourth inductor;
a cathode of the fifth diode is connected to the first end of the fifth power switch and to the positive input terminal, an anode of the fifth diode is connected to the first end of the sixth switch and the first end of the third inductor, a second end of the fifth power switch is connected to the second end of the third inductor and the cathode of the sixth diode, a cathode of the sixth diode and a second end of the sixth switch are connected to the negative input terminal, and a control terminal of the fifth power switch and a control terminal of the sixth switch are respectively connected to the control unit;
a cathode of the seventh diode is connected to the first end of the seventh power switch and is connected to the positive input terminal, an anode of the seventh diode is connected to the first end of the fourth inductor and the first end of the eighth switch, a second end of the eighth switch is connected to an anode of the eighth diode and is connected to the negative input terminal, a second end of the seventh power switch is connected to the second end of the fourth inductor and the cathode of the eighth diode, and a control terminal of the seventh power switch and a control terminal of the eighth switch are respectively connected to the control unit.
13. The switched reluctance motor control circuit of claim 12, wherein when the switched reluctance motor operates in a low speed mode:
the control unit outputs a second PWM control signal to the control end of the seventh power switch and outputs a level signal to the control end of the eighth switch;
and/or the control unit outputs a second PWM control signal to the control end of the seventh power switch and outputs a level signal to the control end of the eighth switch.
14. The switched reluctance motor control circuit of any one of claims 1 to 9, wherein the duty ratio of the first PWM control signal is greater than or equal to 0.8 when the switched reluctance motor operates in a high speed mode.
15. The switched reluctance motor control circuit of any one of claims 1 to 13, wherein the duty ratio of the second PWM control signal varies with a variation in the rotational speed of the switched reluctance motor when the switched reluctance motor operates in a low speed mode.
16. A switched reluctance machine comprising a switched reluctance machine control circuit according to any one of claims 1 to 15.
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| CN113271051A (en) * | 2021-05-17 | 2021-08-17 | 深圳拓邦股份有限公司 | Switched reluctance motor and control circuit thereof |
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