CN214798924U - Improved generation battery module equalizer circuit - Google Patents
Improved generation battery module equalizer circuit Download PDFInfo
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- CN214798924U CN214798924U CN202120567721.6U CN202120567721U CN214798924U CN 214798924 U CN214798924 U CN 214798924U CN 202120567721 U CN202120567721 U CN 202120567721U CN 214798924 U CN214798924 U CN 214798924U
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Abstract
The utility model discloses an improved battery module equalizing circuit, which comprises a plurality of single batteries B connected in series; the equalization circuit comprises a plurality of equalization loops and a battery front end detection chip; each single battery B is correspondingly connected with one equalizing loop; the battery front end detection chip is connected with a plurality of equalization loops; for each balancing loop, the input end 1 of the balancing loop is respectively connected with the positive end B + of a single battery B, the input end 2 of the balancing loop is connected with the negative end B-of the single battery B, the input end 3 of the balancing loop is connected with one output end of the battery front end detection chip, and the input end 4 of the balancing loop is connected with the other output end of the battery front end detection chip. The utility model discloses an increase external equalization switch and balanced return circuit, reduce the electric current that flows through the inside integrated equalization switch of battery front end detection chip to through the inside integrated equalization switch of battery front end detection chip and balanced return circuit, control switching on and ending of external equalization switch, improved the reliability that the battery front end detected the chip.
Description
Technical Field
The utility model relates to a battery management technology field especially relates to an improved generation battery module equalizer circuit.
Background
In the field of new energy application, lithium batteries are increasingly used in electronic and electrical products, such as electric vehicles, electric bicycles, electric tools, communication base stations, robots, and the like. In order to enable the lithium battery to be used safely and reliably, a Battery Management System (BMS) is required to monitor the use state of the lithium battery and realize protection functions such as overcharge, overdischarge and over-temperature.
In practical applications, a battery module or a battery system formed by connecting a plurality of single batteries in series is generally used to supply power to a load, however, since the performance of the single batteries is not absolutely consistent, a difference in the electric quantity between each single battery may occur, if the difference is serious, the single battery with a lower electric quantity may not be fully charged or always enters an overdischarge state first, and the single battery with a higher electric quantity may always enter an overcharge state first, which not only reduces the cycle life of the battery module, but also may cause a safety accident because the single batteries with a larger difference are frequently overcharged and overdischarged, and therefore, in the battery management system, an equalization circuit is required to reduce the difference between the single batteries or maintain the difference not to increase any more, so as to prolong the cycle life of the battery module as much as possible, the occurrence probability of safety accidents is reduced.
In the existing passive equalization technical scheme, a special battery front-end detection chip and an external equalization resistor are usually adopted to realize equalization of the single batteries. The battery front end detection chip is an integrated detection chip, is mainly used for detecting the voltage and the temperature of a single battery and also has a balancing function; some integrated detection chips only provide a balance control signal to control the on and off of an external balance switch; and the balance switch is integrated in the chip by some integrated detection chips, and the conduction and the cut-off of the balance switch are controlled inside the integrated detection chips.
For a battery front-end detection chip integrating equalization switches inside, the maximum value of the allowed equalization current is about several hundred milliamperes generally, so when the equalization switches inside the chip are conducted, the heat productivity of the battery front-end detection chip is extremely large, the conduction time of each equalization switch needs to be extremely short, the conduction time of each equalization switch is extremely short, the equalization effect is reduced, and the potential failure of the chip can be caused by the excessive heat productivity until the chip is completely failed;
in addition, when the capacity of the battery module is large, the equalization current needs to be increased correspondingly, and then the chip only allows the equalization current of hundreds of milliamperes to pass through due to the limitation of the maximum equalization current allowed in the battery front-end detection chip, so that the equalization effect is reduced certainly.
Therefore, at present, a new technology is urgently needed to be developed, so that the reliability of the battery module equalizing circuit and the equalizing effect on the battery can be improved, and the occurrence probability of safety accidents is reduced.
SUMMERY OF THE UTILITY MODEL
The utility model aims at providing an improved generation battery module equalizer circuit to the technical defect that prior art exists.
Therefore, the utility model provides an improved battery module equalizing circuit, which comprises a plurality of single batteries B connected in series;
the equalization circuit comprises a plurality of equalization loops and a battery front end detection chip;
each single battery B is correspondingly connected with one equalizing loop;
the battery front end detection chip is connected with the plurality of equalization loops;
for each balancing loop, the input end 1 of the balancing loop is respectively connected with the positive terminal B + of a single battery B and is used for receiving the voltage and the current of the single battery B, so that the single battery B1 is balanced;
for each balancing loop, the input end 2 of the balancing loop is connected with the negative end B-of the single battery B and is used for receiving the voltage and the current of the single battery B so as to balance the single battery B;
for each equalization loop, the input end 3 of the equalization loop is connected with one output end of the battery front end detection chip and used for receiving an equalization control signal sent by the battery front end detection chip to the equalization loop, and the equalization control signal is used for controlling the start and stop of the equalization loop;
for each equalization loop, the input end 4 of the equalization loop is connected with the other output end of the battery front-end detection chip and is used for receiving another equalization control signal sent by the battery front-end detection chip to the equalization loop, and the equalization control signal is used for controlling the on and off of the equalization loop.
Preferably, the battery front end detection chip includes a plurality of pairs of output terminals BC;
each pair of output terminals BC specifically includes two output terminals;
each pair of output terminals BC is connected to the input terminal 3 and the input terminal 4 of one equalization loop, respectively, and is configured to send two equalization control signals BC to the equalization loop, and to control the start and stop of the equalization loop corresponding to the single battery B.
Preferably, the equalizing loop correspondingly connected to any one of the unit cells Bm includes: equalizing resistance RB1, equalizing switch QB1, resistance R1-R9, switch tube Q2-Q3, diode D1 and electric capacity C1, wherein:
m is any natural number less than or equal to n and greater than or equal to 1;
for the single batteries B in the battery module, n is the number of the single batteries in the battery module in series connection;
the 1 st pin of the balancing resistor RB1 is used as the input end 1 of a balancing loop correspondingly connected with the single battery Bm and is connected with the positive terminal Bm + of the single battery Bm, and is used for receiving the voltage and the balancing current of the single battery Bm;
the 2 nd pin of the equalizing resistor RB1 is connected with the drain D of the equalizing switch QB 1;
the source S of the balancing switch QB1 is used as the input end 2 of the balancing loop correspondingly connected with the single battery Bm, is connected with the negative electrode end Bm-of the single battery Bm and is used for receiving the voltage and the balancing current of the single battery B1;
the source S of the equalizing switch QB1 is also connected with the cathode of the diode D1;
the grid G of the equalizing switch QB1 is connected with the T3 end;
the T3 end is respectively connected with the 1 st pin of the resistor R9, the drain D of the switch tube Q1 and the drain D of the switch tube Q3;
a port where the 2 nd pin of the resistor R9, the anode of the diode D1, the source S of the switch Q1, the source S of the switch Q2, the 2 nd pin of the capacitor C1, and the 2 nd pin of the resistor R3 intersect after confluence is used as an input end 4 of an equalizing loop correspondingly connected to the battery cell Bm, and is connected with one output end BCm2 of the battery front-end detection chip, and is used for receiving an equalizing control signal BCm2 sent by the battery front-end detection chip to the equalizing loop, and the signal state of the equalizing control signal BCm2 is fixed to a low level;
the 1 st pin of the resistor R8 is used as the input end 1 of the equalizing loop correspondingly connected with the single battery Bm and is connected with the positive terminal Bm + of the single battery Bm, and is used for receiving the voltage and the current of the single battery Bm;
the 2 nd pin of the resistor R8 is connected with the source S of the switch tube Q3;
the grid G of the switching tube Q3 is connected with the 1 st pin of the resistor R7;
the 2 nd pin of the resistor R7 is connected with the drain D of the switch tube Q2;
a gate G of the switching tube Q2, which is respectively connected with the 1 st pin of the resistor R5 and the 1 st pin of the capacitor C1;
the 2 nd pin of the resistor R5 is connected with the T1 end;
a terminal T1 connected to the 2 nd pin of the resistor R1 and the 1 st pin of the resistor R2, respectively;
the 2 nd pin of the resistor R2 is connected with the T2 end;
a terminal T2 connected to the 1 st pin of the resistor R3, the 1 st pin of the resistor R4 and the 2 nd pin of the resistor R6, respectively;
the 1 st pin of the resistor R6 is connected with the grid G of the switch tube Q1;
the 2 nd pin of the resistor R4, which is the input terminal 3 of the balancing loop to which the single battery Bm is correspondingly connected, is connected to the other output terminal BCm1 of the battery front-end detection chip, and receives the balancing control signal BCm1 sent by the battery front-end detection chip.
By the above the technical scheme provided by the utility model it is visible, compare with prior art, the utility model provides an improved generation battery module equalizer circuit, its design science, according to the theory of operation of battery front end detection chip, increase external equalization switch and equalization loop, reduce the electric current that flows through the inside integrated equalization switch of battery front end detection chip to through the inside integrated equalization switch of battery front end detection chip and equalization loop, control switching on and ending of external equalization switch, improved the reliability of battery front end detection chip as integrated chip, great practical significance has.
Drawings
Fig. 1 is a block diagram illustrating an improved equalizing circuit for a battery module according to the present invention;
fig. 2 is the utility model provides an among the improved generation battery module equalizer circuit, to arbitrary one battery cell BmA schematic circuit diagram of an equalization loop provided therein;
fig. 3 is a schematic diagram of the 1 st equalizing loop corresponding to the battery cell B1 in the embodiment of the present invention, i.e. m is 1.
Detailed Description
In order to make the technical means of the present invention easier to understand, the present application will be further described in detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant application and are not limiting of the application. It should be noted that, for convenience of description, only the portions related to the present application are shown in the drawings.
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
Referring to fig. 1 to 3, the present invention provides an improved battery module balancing circuit, wherein the battery module includes a plurality of single batteries B connected in series;
the equalization circuit comprises a plurality of equalization loops 100 and a battery front end detection chip 200;
each of the single batteries B is correspondingly connected to one of the equalizing loops 100.
The battery front end detection chip 200 is connected to the plurality of equalization circuits 100.
In the present invention, in particular, for each equalizing loop 100 (i.e. any equalizing loop 100), the input end 1 is connected to the positive terminal B + of a single battery B, respectively, for receiving the voltage and current of the single battery B, so as to equalize the single battery B1;
for each balancing loop 100, the input end 2 is connected with the negative end B-of the single battery B for receiving the voltage and current of the single battery B, so as to balance the single battery B;
for each equalization loop 100, the input end 3 of the equalization loop is connected to an output end of the battery front-end detection chip 200, and is configured to receive an equalization control signal sent by the battery front-end detection chip 200 to the equalization loop 100, where the equalization control signal is used to control the on and off of the equalization loop 100;
for each equalization loop 100, the input end 4 of the equalization loop 100 is connected to another output end of the battery front-end detection chip 200, and is configured to receive another equalization control signal sent by the battery front-end detection chip 200 to the equalization loop 100, where the equalization control signal is used to control the on and off of the equalization loop 100;
in fig. 1, a battery front end detection chip 200 includes a plurality of pairs (e.g., n pairs) of output terminals BC;
each pair of output terminals BC specifically includes two output terminals;
each pair of output terminals BC is connected to the input terminal 3 and the input terminal 4 of one balancing circuit 100, respectively, and is configured to send two balancing control signals BC to the balancing circuit 100, and is configured to control the on and off of the balancing circuit 100 corresponding to the single battery B.
In the present invention, in fig. 1, the battery module includes n single batteries, and n is a natural number greater than or equal to 1.
In fig. 1, n is the number of the cells in the battery module connected in series for the cells B in the battery module, and there are n balancing circuits 100.
It should be noted that the maximum value of n is determined according to the specification of the battery front end detection chip 200, for example, if the battery front end detection chip 200 can detect 10 strings of batteries at most, the maximum value of n is equal to 10;
the utility model discloses in, the numerical value of n is bigger, and it is lower more to explain the position of battery cell B in battery module, just is close to the negative pole end Bn-of battery module more, otherwise, the position in battery module is higher more, just also is close to the positive terminal B1+ of battery module more.
It should be noted that each single battery B has one equalizing loop 100, that is, there are n single batteries, and there are n equalizing loops 100; therefore, for each single battery B, the battery front-end detection chip 200 has two output terminals (a pair of output terminals) connected to the equalization loop 100 of the single battery B, and is used for controlling the equalization state of the equalization loop 100, including two equalization states of equalization on and equalization off.
It should be noted that the equalization state of each equalization loop 100 has no influence on the equalization state of any other equalization loop 100.
In the present invention, the structural design of each equalization loop 100 is the same, and the following equalization loop 100 is specifically explained by taking the 1 st equalization loop 100 as an example:
in fig. 1, the 1 st equalizing loop 100, the input end 1 of which is connected to the positive terminal B1+ of the battery cell B1, is used for receiving the voltage and current of the battery cell B1 and equalizing the battery cell B1;
the 1 st equalizing loop 100 is connected with the negative end B1-of the single battery B1 at the input end 2, and is used for receiving the voltage and the current of the single battery B1 and equalizing the single battery B1;
the input end 3 of the 1 st equalization loop 100 is connected to the output end BC11 of the battery front end detection chip 200, and is configured to receive an equalization control signal BC11 sent by the battery front end detection chip 200 to the present equalization loop 100, where the equalization control signal BC11 is configured to control the start and stop of the 1 st equalization loop (i.e., the present equalization loop 100);
the input end 4 of the 1 st equalization loop 100 is connected with the other output end BC12 of the battery front end detection chip 200, and is configured to receive another equalization control signal BC12 sent by the battery front end detection chip 200 to the equalization loop 100, where the equalization control signal BC12 is configured to control the start and stop of the 1 st equalization loop;
the battery front end detection chip 200 has an output BC11 connected to the input 3 of the 1 st equalization loop 100, and is configured to send an equalization control signal BC11 to the 1 st equalization loop 100, and is configured to control the start and stop of the 1 st equalization loop 100 corresponding to the battery cell B1;
the output end BC12 of the battery front-end detection chip 200 is connected to the input end 4 of the 1 st equalization loop 100, and is configured to send an equalization control signal BC12 to the 1 st equalization loop 100, and to control the on and off of the 1 st equalization loop 100 corresponding to the battery cell B1.
Similarly, the input end 1 of each of the 2 nd to nth equalizing loops 100 is connected to the positive terminal B + of the corresponding cell B, and is configured to receive the voltage and current of the cell B, and equalize the cell B;
the input ends 2 of the 2 nd to nth equalizing loops 100 are respectively connected with the negative electrode ends B-of the corresponding single batteries B, and are used for receiving the voltage and the current of the single batteries B and equalizing the single batteries B;
the input ends 3 of the 2 nd to nth equalization loops 100 are respectively connected to one output end BCn1 of the battery front end detection chip 200, and are used for sending an equalization control signal BCn1 to the equalization loop 100 by the battery front end detection chip 200, where the equalization control signal is used for controlling the on and off of the equalization loop 100 (i.e., the nth equalization loop);
the input end 4 of each of the 2 nd to nth equalization loops 100 is connected to the other output end BCn2 of the battery front end detection chip 200, and is configured to receive another equalization control signal BCn2 sent by the battery front end detection chip 200 to the present equalization loop 100, where the equalization control signal is used to control the on and off of the present equalization loop 100 (i.e., the nth equalization loop);
in the present invention, it should be noted that the battery front end detection chip 200 is an integrated chip of an internal integrated equalization switch, and can control the on and off of the equalization switch in the inside.
It should be noted that the utility model discloses in, the electric current that flows through the inside balanced switch that integrates of battery front end detection chip 200 is not balanced electric current, and its current value is less than balanced electric current far away, has greatly reduced battery front end detection chip 200's calorific capacity to the failure rate of battery front end detection chip 200 has been reduced.
In the present invention, the operation principle of each equalization loop 100 is the same, and the following equalization loop 100 is specifically explained by taking the 1 st equalization loop 100 as an example:
in the present invention, the output BC12 of the battery front-end detection chip 200 (i.e. the output of the battery front-end detection chip 200 for connecting to the input terminal 4 of the equalization loop 100) is fixed to a low level;
firstly, balance cutoff: when the output BC11 of the battery front-end detecting chip 200 (i.e., the output of the battery front-end detecting chip 200 for connecting to the input terminal 3 of the balancing loop 100) is at a high level, the 1 st balancing loop 100 is in a balanced off state, and the single battery B1 cannot be balanced, i.e., no balancing current flows into the balancing loop 100;
secondly, balanced opening: when the output BC11 of the battery front-end detection chip 200 is at a low level, the 1 st equalizing loop 100 is in an equalizing-on state, and can equalize the battery cell B1, and at this time, an equalizing current flows into the equalizing loop 100;
it should be noted that, when the balancing circuit 100 is in the balancing on state, the currents flowing through the output terminals BC11 and BC12 of the battery front end detection chip 200 are not balancing currents but are much smaller than control currents of the balancing currents, so as to reduce the heat generation amount of the battery front end detection chip 200 to the maximum extent, thereby reducing the failure rate of the battery front end detection chip 200.
Fig. 2 is a schematic diagram of the corresponding mth equalization loop 100 for a cell Bm; fig. 3 is a schematic diagram of the 1 st equalization loop 100 corresponding to the battery cell B1 in the embodiment, i.e. m is 1.
In the present invention, in the concrete implementation, referring to fig. 2, the equalizing loop 100 correspondingly connected to any one of the battery cells Bm includes: equalizing resistance RB1, equalizing switch QB1, resistance R1-R9, switch tube Q2-Q3, diode D1 and electric capacity C1, wherein:
m is any natural number not less than n and not less than 1;
for the single batteries B in the battery module, n is the number of the single batteries in the battery module in series connection;
in the utility model, the 1 st pin of the equalizing resistance RB1 is used as the input terminal 1 of the equalizing loop 100 correspondingly connected with the single battery Bm, and is connected with the positive terminal Bm + of the single battery Bm for receiving the voltage and the equalizing current of the single battery Bm;
the 2 nd pin of the equalizing resistor RB1 is connected with the drain D of the equalizing switch QB 1;
it should be noted that, by adjusting the resistance value of the balancing resistor RB1, the required balancing current is obtained;
the source S of the balancing switch QB1 is used as the input end 2 of the balancing loop 100 correspondingly connected with the single battery Bm, and is connected with the negative end Bm-of the single battery Bm and used for receiving the voltage and the balancing current of the single battery B1;
the source S of the equalizing switch QB1 is also connected with the cathode of the diode D1;
the grid G of the equalizing switch QB1 is connected with the T3 end;
the T3 end is respectively connected with the 1 st pin of the resistor R9, the drain D of the switch tube Q1 and the drain D of the switch tube Q3;
a port where the 2 nd pin of the resistor R9, the anode of the diode D1, the source S of the switch Q1, the source S of the switch Q2, the 2 nd pin of the capacitor C1, and the 2 nd pin of the resistor R3 intersect after confluence is used as an input end 4 of the balancing circuit 100 correspondingly connected to the single battery Bm, and is connected with one output end BCm2 of the battery front-end detection chip 200, and is used for receiving a balancing control signal BCm2 sent by the battery front-end detection chip 200 to the balancing circuit 100, and the signal state of the balancing control signal BCm2 is fixed to a low level;
the 1 st pin of the resistor R8, which is used as the input terminal 1 of the balancing circuit 100 correspondingly connected to the single battery Bm, is connected to the positive terminal Bm + of the single battery Bm for receiving the voltage and current of the single battery Bm;
the 2 nd pin of the resistor R8 is connected with the source S of the switch tube Q3;
the grid G of the switching tube Q3 is connected with the 1 st pin of the resistor R7;
the 2 nd pin of the resistor R7 is connected with the drain D of the switch tube Q2;
a gate G of the switching tube Q2, which is respectively connected with the 1 st pin of the resistor R5 and the 1 st pin of the capacitor C1;
the 2 nd pin of the resistor R5 is connected with the T1 end;
a terminal T1 connected to the 2 nd pin of the resistor R1 and the 1 st pin of the resistor R2, respectively;
the 2 nd pin of the resistor R2 is connected with the T2 end;
a terminal T2 connected to the 1 st pin of the resistor R3, the 1 st pin of the resistor R4 and the 2 nd pin of the resistor R6, respectively;
the 1 st pin of the resistor R6 is connected with the grid G of the switch tube Q1;
a pin 2 of the resistor R4, which is used as the input terminal 3 of the balancing circuit 100 correspondingly connected to the battery cell Bm, is connected to another output terminal BCm1 of the battery front-end detecting chip 200, and is configured to receive the balancing control signal BCm1 sent by the battery front-end detecting chip 200, where the signal state of the balancing control signal BCm1 includes a high level and a low level;
referring to fig. 2 and 3, the operation principle of the equalizing loop 100 of each cell will be described by taking the cell B1 as an example, specifically as follows:
since the output terminal BC12 of the battery front end detecting chip 200 is connected to the negative terminal B1-of the battery cell B1 through the diode D1, the equalization start signal BC12 is fixed to the low level.
Firstly, balance cutoff: when the equalization control signal BC11 output by the output end BC11 of the battery front-end detection chip 200 is at a high level, the T1 end and the T2 end both maintain the high level after being divided by the resistors R1 to R3, the high-level T2 firstly turns on the switching tube Q1, and then under the delay action of the capacitor C1, the high-level T1 turns on the switching tubes Q2 and Q3; the turned-on switch tube Q1 enables the end T3 to be at a low level, so that the equalizing switch QB1 is turned off, and at the moment, no equalizing current exists in the equalizing resistor RB1 and the equalizing switch QB1, and the single battery B1 cannot be equalized;
when the output BC11 of the battery front-end detection chip 200 is at the high level, it indicates that the equalization switch integrated inside the battery front-end detection chip 200 is in the off state.
Secondly, balanced opening: when the balance control signal BC11 output by the output end BC11 of the battery front-end detection chip 200 is at a low level, at this time, the BC11 end and the BC12 end are switched on inside the battery front-end detection chip 200, and the T2 end is pulled down to a low level by the resistor R4 connected in parallel, so that the switching tube Q1 is switched from on to off; however, the terminal T1 is still kept at a high level through the voltage dividing action of the resistor R1, the resistor R2 and the resistor R4, the switching tubes Q2 and Q3 are kept on, and the terminal T3 is changed from a low level to a high level through the voltage dividing action of the resistor R8 and the resistor R9, so that the equalizing switch QB1 is turned on, and at this time, an equalizing current flows through the equalizing resistor RB1 and the equalizing switch QB1, and equalization of the battery cell B1 is started;
it should be noted that when the output BC11 of the battery front-end detection chip 200 is at a low level, it indicates that the equalization switch integrated inside the battery front-end detection chip 200 is in a conducting state;
it should be noted that when the output terminal BC11 of the battery front-end detection chip 200 is at a low level, the current flowing through the output terminal BC11 is not an equalizing current, and the current value is much smaller than the value of the equalizing current, so that the heat generation amount of the battery front-end detection chip 200 is greatly reduced, and the failure rate of the battery front-end detection chip 200 is reduced;
it should be noted that, by adjusting the sizes of the resistor R1, the resistor R2, and the resistor R4, the current value of the output BC11 flowing through the battery front end detection chip 200 is obtained, so as to ensure that the battery front end detection chip 200 can normally operate, and the range of the current value can be obtained from the specification of the battery front end detection chip 200;
it should be noted that the resistance of the resistor R4 is much smaller than that of the resistor R3, so as to ensure that the T2 can reliably cut off the switch Q1.
In the present invention, it should be noted that, in the implementation, the battery front end detecting chip 200 can be applied to the currently commonly used brand, series and model in the BMS technical solution, such as the MC33771 battery controller integrated circuit chip of NXP (engzhipu). To the utility model discloses, the model and inside theory of operation, the control logic of battery front end detection chip do not are in the utility model discloses in the protection range.
Compared with the prior art, the utility model provides an improved generation battery module equalizer circuit has following beneficial effect:
1. the utility model controls the on and off of the external balance switch through the balance switch integrated in the battery front end detection chip, which can flexibly adjust the balance current, improve the balance effect, greatly reduce the heat productivity of the chip and improve the reliability of the balance function;
2. for the technical scheme of the utility model, the hardware circuit design is scientific, the electronic components are of universal application models, the model selection is easy, and the components are low in price;
3. because the utility model discloses a hardware circuit consumption is lower, so can adopt the surface mounted type miniwatt electronic components, therefore circuit board occupation space is little, has greatly reduced material cost. Therefore, the technical scheme of the utility model, very strong practical value and market spreading value have.
To sum up, compare with prior art, the utility model provides a pair of improved generation battery module equalizer circuit, its design science, according to the theory of operation of battery front end detection chip, increase external equalization switch and balanced return circuit, reduce the electric current that flows through the inside integrated equalization switch of battery front end detection chip, and through the inside integrated equalization switch of battery front end detection chip and balanced return circuit, control switching on and ending of external equalization switch, improved the reliability as integrated chip's battery front end detection chip, great practical significance has.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (3)
1. An improved battery module equalizing circuit is characterized by comprising a plurality of single batteries B connected in series;
the equalization circuit comprises a plurality of equalization loops (100) and a battery front end detection chip (200);
each single battery B is correspondingly connected with one equalizing loop (100) respectively;
the battery front end detection chip (200) is connected with the plurality of equalization loops (100);
for each equalizing loop (100), the input end 1 of each equalizing loop is respectively connected with the positive terminal B + of a single battery B and is used for receiving the voltage and the current of the single battery B so as to equalize the single battery B1;
for each balancing loop (100), the input end 2 is connected with the negative end B-of the single battery B and is used for receiving the voltage and the current of the single battery B so as to balance the single battery B;
for each equalization loop (100), the input end 3 of the equalization loop is connected with one output end of the battery front end detection chip (200) and is used for receiving an equalization control signal sent by the battery front end detection chip (200) to the equalization loop (100), and the equalization control signal is used for controlling the on and off of the equalization loop (100);
for each equalization loop (100), the input end 4 of the equalization loop is connected with another output end of the battery front end detection chip (200) and is used for receiving another equalization control signal sent by the battery front end detection chip (200) to the equalization loop (100), and the equalization control signal is used for controlling the on and off of the equalization loop (100).
2. The improved battery module equalization circuit of claim 1, wherein the battery front-end detection chip (200) comprises a plurality of pairs of output terminals BC;
each pair of output terminals BC specifically includes two output terminals;
each pair of output terminals BC is connected to an input terminal 3 and an input terminal 4 of an equalization loop (100), respectively, and is configured to send two equalization control signals BC to the equalization loop (100) for controlling the on and off of the equalization loop (100) corresponding to the single battery B.
3. The improved battery module equalizing circuit according to claim 1 or 2, wherein the equalizing circuit (100) connected with any one of the single batteries Bm comprises: equalizing resistance RB1, equalizing switch QB1, resistance R1-R9, switch tube Q2-Q3, diode D1 and electric capacity C1, wherein:
m is any natural number less than or equal to n and greater than or equal to 1;
for the single batteries B in the battery module, n is the number of the single batteries in the battery module in series connection;
the 1 st pin of the balancing resistor RB1 is used as the input end 1 of a balancing loop (100) correspondingly connected with the single battery Bm and is connected with the positive terminal Bm + of the single battery Bm and used for receiving the voltage and the balancing current of the single battery Bm;
the 2 nd pin of the equalizing resistor RB1 is connected with the drain D of the equalizing switch QB 1;
the source S of the balancing switch QB1 is used as the input end 2 of the balancing loop (100) correspondingly connected with the single battery Bm, and is connected with the negative electrode end Bm-of the single battery Bm and used for receiving the voltage and the balancing current of the single battery B1;
the source S of the equalizing switch QB1 is also connected with the cathode of the diode D1;
the grid G of the equalizing switch QB1 is connected with the T3 end;
the T3 end is respectively connected with the 1 st pin of the resistor R9, the drain D of the switch tube Q1 and the drain D of the switch tube Q3;
the port of the 2 nd pin of the resistor R9, the anode of the diode D1, the source S of the switch tube Q1, the source S of the switch tube Q2, the 2 nd pin of the capacitor C1 and the 2 nd pin of the resistor R3 after confluence intersection is used as the input end 4 of the equalizing loop (100) correspondingly connected with the single battery Bm, one output end BCm2 connected with the battery front end detection chip (200) and used for receiving an equalizing control signal BCm2 sent by the battery front end detection chip (200) to the equalizing loop (100), and the signal state of the equalizing control signal BCm2 is fixed to be low level;
the 1 st pin of the resistor R8 is used as the input end 1 of the balancing loop (100) correspondingly connected with the single battery Bm, and is connected with the positive terminal Bm + of the single battery Bm and used for receiving the voltage and the current of the single battery Bm;
the 2 nd pin of the resistor R8 is connected with the source S of the switch tube Q3;
the grid G of the switching tube Q3 is connected with the 1 st pin of the resistor R7;
the 2 nd pin of the resistor R7 is connected with the drain D of the switch tube Q2;
a gate G of the switching tube Q2, which is respectively connected with the 1 st pin of the resistor R5 and the 1 st pin of the capacitor C1;
the 2 nd pin of the resistor R5 is connected with the T1 end;
a terminal T1 connected to the 2 nd pin of the resistor R1 and the 1 st pin of the resistor R2, respectively;
the 2 nd pin of the resistor R2 is connected with the T2 end;
a terminal T2 connected to the 1 st pin of the resistor R3, the 1 st pin of the resistor R4 and the 2 nd pin of the resistor R6, respectively;
the 1 st pin of the resistor R6 is connected with the grid G of the switch tube Q1;
the 2 nd pin of the resistor R4, which is the input terminal 3 of the balancing loop (100) to which the single battery Bm is correspondingly connected, is connected to the other output terminal BCm1 of the battery front-end detection chip (200) to receive the balancing control signal BCm1 sent by the battery front-end detection chip (200).
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| Application Number | Priority Date | Filing Date | Title |
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| CN202120567721.6U CN214798924U (en) | 2021-03-19 | 2021-03-19 | Improved generation battery module equalizer circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120567721.6U CN214798924U (en) | 2021-03-19 | 2021-03-19 | Improved generation battery module equalizer circuit |
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| CN214798924U true CN214798924U (en) | 2021-11-19 |
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| CN202120567721.6U Active CN214798924U (en) | 2021-03-19 | 2021-03-19 | Improved generation battery module equalizer circuit |
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