CN214756295U - Circuit for preventing communication bus system from power-off mistakenly - Google Patents

Abstract

The utility model discloses a circuit for preventing communication bus system from power-off by mistake comprises a main board and a daughter board, wherein the main board communicates with the daughter board through a communication bus; the daughter board is provided with a switch signal module which is used for starting or closing the daughter board; the switch signal module is connected with the switch signal detection circuit of the daughter board and the processor of the daughter board sequentially through level signals; and a self-locking signal module for power-on enabling is arranged in the daughter board and is respectively connected with the switch signal detection circuit of the daughter board and the level signal of the processor of the daughter board. The utility model discloses an adopt original bus communication between mainboard and each daughter board, the switching signal detection circuitry of daughter board is except receiving outside switching signal enable, still receives the enabling signal control of this daughter board self, and this 2 way enabling signal is for the relation side by side, and the purpose that enables this daughter board just can be reached to wherein at least 1 way signal is effective.

Description

Circuit for preventing communication bus system from power-off mistakenly

Technical Field

The utility model relates to a communication bus system technical field, concretely relates to prevent circuit that communication bus system mistake was gone down to electricity.

Background

In current communication bus systems, there are a variety of distributed daughter boards. And electrifying the system to enter a working state through an external switch signal. In the working process of the system, the external switch signal may introduce false operation interference, so that a fault phenomenon that one or more daughter boards are powered off and stop working occurs in the whole system. The abnormal phenomenon is not allowed in some occasions with high requirements on real-time performance and reliability. Specifically, in the existing communication bus technology, the main board and each daughter board are connected through only a plurality of communication lines, and serial differential signals are sent. The main board and the sub board transmit and receive communication data through the communication bus. The power-on and power-off states of the daughter board are controlled by external switch signals. If the switching signal is disturbed, the daughter board is powered off by mistake and stops working. This operation has its drawbacks because, after the daughter board is powered down, it can cause the system to fail in its functioning, either wholly or partially, further causing unpredictable risks and losses.

Therefore, a new circuit for preventing the communication bus system from being powered off by mistake needs to be designed, so that the misoperation can be identified when the daughter board malfunctions, and the effect of continuing stable and reliable work is achieved.

SUMMERY OF THE UTILITY MODEL

The utility model provides a circuit for prevent communication bus system mistake outage through increase self-locking circuit in communication bus system, avoids switching signal's malfunction.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

a circuit for preventing a communication bus system from being powered off by mistake comprises a main board and a sub-board, wherein the main board is communicated with the sub-board through a communication bus; the daughter board is provided with a switch signal module which is used for starting or closing the daughter board; the switch signal module is connected with a switch signal detection circuit of the daughter board and a processor of the daughter board in sequence through level signals;

and a self-locking signal module for power-on enabling is further arranged inside the daughter board and is respectively connected with the switch signal detection circuit of the daughter board and the level signal of the processor of the daughter board.

Furthermore, the number of the daughter boards is N, N is a natural number larger than 1, and the main board is communicated with the N daughter boards through a communication bus respectively.

Furthermore, the self-locking signal module comprises three parts, wherein the first part is an external switching signal enabling circuit and comprises an external input signal, a pull-up resistor R4 and an NPN triode Q1;

the second part is a power supply module circuit which is used for converting a 24V power supply into a VCC power supply and supplying power to the daughter board and the processor circuit;

the third part is a power-on enabling circuit from the processor, which comprises an enabling signal from the processor, a transistor Q2;

the external switch signal is connected to the base electrode of the triode and connected to the processor pin of the daughter board; the emitter of the triode Q1 is connected to the ground wire; the collector of the triode Q1 is connected with one end of a pull-up resistor R4, the collector of the triode Q2 and an/EN enabling pin of the power supply module; the other end of the pull-up resistor R4 is connected to a 24V power supply; the emitter of the triode Q2 is connected to the ground wire; the base of the triode Q2 is connected to the processor pin of the daughter board, and the pin outputs a power-on enabling signal, namely a self-locking signal; the input end of the power supply module is connected to a 24V power supply, the output end of the power supply module is connected to a VCC power supply of the daughter board, and the ground wire end of the power supply module is connected to a ground wire of the power supply.

According to the above technical scheme, the utility model discloses a prevent circuit that communication bus system mistake was downloaded electricity adopts original bus communication through the signal connection between mainboard and each daughter board, and the switching signal detection circuitry of daughter board still receives the enable signal control of this daughter board self except receiving outside switching signal enable. The 2 enabling signals are in parallel relation, and at least 1 of the 2 enabling signals is effective, so that the purpose of enabling the local board can be achieved.

The utility model discloses can discern the mistake outage phenomenon of appearance to the daughter board still can continue normal work, what make among the bus system daughter board can be stable is in operating condition.

Drawings

Fig. 1 is a schematic diagram of the circuit structure of the present invention;

fig. 2 is a diagram of the self-locking circuit structure of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention.

As shown in fig. 1, the circuit for preventing a communication bus system from being powered down by mistake according to this embodiment includes:

the whole system comprises a switch signal shared by a host, a daughter board (the 1 st block), a daughter board (the 2 nd block) … daughter board (the N th block), a communication bus and the N daughter boards, wherein a self-locking signal for power-on enabling is arranged in each daughter board;

wherein, as shown in fig. 2, the self-locking circuit is described as follows:

the self-locking circuit consists of three parts; the first part is an external switching signal enabling circuit and comprises an external input signal, a pull-up resistor R4 and an NPN triode Q1. The second part is a power module circuit, whose function is to convert the 24V power supply to a VCC power supply (e.g., 5V, 3.3V, etc.) for providing power to the daughter board's processor and other circuits. The third part is a power-on enabling circuit from the processor, which includes an enabling signal from the processor, and an NPN transistor Q2.

The connection relation between the components of the self-locking circuit is as follows:

the external switch signal is connected to the base electrode of the triode and connected to the processor pin of the daughter board; the emitter of the triode Q1 is connected to the ground wire; the collector of the triode Q1 is connected with one end of a pull-up resistor R4, the collector of the triode Q2 and an/EN enabling pin of the power supply module; the other end of the pull-up resistor R4 is connected to a 24V power supply; the emitter of the triode Q2 is connected to the ground wire; the base of the transistor Q2 is connected to the processor pin of the daughter board (which outputs a power-on enable signal, i.e., a self-locking signal); the input end of the power supply module is connected to a 24V power supply, the output end of the power supply module is connected to a VCC power supply of the daughter board, and the ground wire end of the power supply module is connected to a ground wire of the power supply.

The working process of the self-locking circuit is as follows:

when the system is in a shutdown state, the output power VCC of the power module is 0V, and thus, circuits such as the processor of the daughter board at the next stage are in a power-off shutdown state.

② when the external switch signal is effective (high level), the triode Q1 is conducted, the collector voltage of Q1 is changed from 24V to 0V. the/EN pin of the power module is also pulled down to 0V, and the/EN pin is at an active level (low level), so that the power module enters an operating state to provide VCC power to circuits such as a processor of a daughter board at a next stage. The processor and other circuits of the daughter board of the next stage enter an operating state.

And thirdly, after the processor and other circuits of the daughter board enter a working state, outputting a power-on enabling signal (a self-locking signal and high level effective) to the base electrode of the triode Q2, and when the Q2 enters a conducting state, pulling down the/EN pin of the power module to be low level, so that the power module enters the working state.

And fourthly, the external power-on enabling signal and the power-on enabling signal output by the processor of the daughter board are in parallel relation. Among the two, the power module enters the working state as long as one path of signal is effective (high level state).

After that, when the external switch signal is temporarily or permanently disappeared due to the malfunction or interference, the power module is still in the working state because the enable signal output by the processor of the daughter board still exists, and the power module can normally provide power to the circuits such as the processor of the next-level daughter board, so as to ensure that the circuits can still normally work.

And sixthly, in the working process of circuits such as a processor of the daughter board and the like, the processor can always detect the state of the external switch signal. If the signal is detected to be high, the processor does not perform any processing. If the signal is detected to be low level, the processor can communicate with the mainboard through the communication bus to determine whether the daughter board needs to be powered off or not. If the host computer communication response shows that the power is not turned off, the processor of the daughter board does not turn off the enabling signal, the daughter board can recognize that the external switch signal has false action, and the daughter board still needs to be in a working state. If the host communication response shows that the power needs to be shut down, the processor of the daughter board closes the enabling signal after relevant processing, and then the daughter board enters a shutdown state.

In summary, the main board of the present embodiment can communicate with all the sub-boards through the communication bus; the switching signal (high level) represents starting, and all the daughter boards can be started and enter a working state; the switch signal (low) represents a shutdown, which all daughterboards can detect.

When this scheme of adoption, the concrete upper and lower electrician work flow of daughter board is as follows:

(1) after the daughter board detects that the external switch signal is effective, the daughter board executes power-on operation;

(2) after the daughter board enters the power-on state, sending 1 path of enabling signals to a switch signal detection port of the daughter board, and enabling the daughter board to be in the power-on state;

(3) when the daughter board detects that an external switch signal is effective for shutdown, the daughter board sends an inquiry about whether shutdown is needed to the main board through bus communication, and if the main board responds to the signal to display that shutdown is needed, the daughter board enters a shutdown process; if the main board responds to the signal and shows that the main board does not need to be shut down, the shutdown signal is a false action, and the sub-board still works normally without being shut down;

by last, the utility model discloses a prevent circuit that communication bus system mistake was downloaded electricity, through adopting original bus communication between mainboard and each daughter board, the switching signal detection circuitry of daughter board still receives the enable signal control of this daughter board self except receiving the enable of external switch signal. The 2 enabling signals are in parallel relation, and at least 1 of the 2 enabling signals is effective, so that the purpose of enabling the local board can be achieved. The utility model discloses can discern the mistake electricity phenomenon of going down that appears to when external switching signal has the maloperation or disturbs, the daughter board still can continue normal work, what make among the bus system daughter board can be stable is in operating condition.

The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims (3)

1. A circuit for preventing a communication bus system from being powered off by mistake comprises a main board and a sub-board, wherein the main board is communicated with the sub-board through a communication bus; the daughter board is provided with a switch signal module which is used for starting or closing the daughter board; the switch signal module is connected with the switch signal detection circuit of the daughter board and the processor of the daughter board through level signals;

the method is characterized in that:

and a self-locking signal module for power-on enabling is further arranged inside the daughter board and is respectively connected with the switch signal detection circuit of the daughter board and the level signal of the processor of the daughter board.

2. The circuit for preventing a communications bus system from being powered down erroneously as set forth in claim 1, wherein: the daughter boards are N, N is a natural number larger than 1, and the main board is communicated with the N daughter boards through a communication bus respectively.

3. The circuit for preventing a communications bus system from being powered down erroneously as set forth in claim 1, wherein:

the self-locking signal module comprises three parts, wherein the first part is an external switch signal enabling circuit and comprises an external input signal, a pull-up resistor R4 and an NPN triode Q1;

the second part is a power supply module circuit which is used for converting a 24V power supply into a VCC power supply and supplying power to the daughter board and the processor circuit;

the third part is a power-on enabling circuit from the processor, which comprises an enabling signal from the processor, a transistor Q2;

the external switch signal is connected to the base electrode of the triode and connected to the processor pin of the daughter board; the emitter of the triode Q1 is connected to the ground wire; the collector of the triode Q1 is connected with one end of a pull-up resistor R4, the collector of the triode Q2 and an/EN enabling pin of the power supply module; the other end of the pull-up resistor R4 is connected to a 24V power supply; the emitter of the triode Q2 is connected to the ground wire; the base of the triode Q2 is connected to the processor pin of the daughter board, and the pin outputs a power-on enabling signal, namely a self-locking signal; the input end of the power supply module is connected to a 24V power supply, the output end of the power supply module is connected to a VCC power supply of the daughter board, and the ground wire end of the power supply module is connected to a ground wire of the power supply.

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