CN214727578U

CN214727578U - Communication drive control circuit board

Info

Publication number: CN214727578U
Application number: CN202120350142.6U
Authority: CN
Inventors: 樊荣; 高昊晖; 阳文敏; 柴志雷; 缪永杰; 赵海旭; 叶均超; 徐聪; 王腾
Original assignee: Jiangnan University
Current assignee: High-volume Industrial Intelligent Technology (Wuxi) Co.,Ltd.
Priority date: 2021-02-07
Filing date: 2021-02-07
Publication date: 2021-11-16
Anticipated expiration: 2031-02-07

Abstract

The utility model relates to a communication drive control circuit board, which comprises a mainboard, wherein the mainboard is provided with a drive chip, an expansion processing platform and an external expansion interface; the expansion processing platform comprises a dual-core ARM processor and an FPGA architecture; the peripheral expansion interface comprises a kilomega network interface, an SD card interface, a serial peripheral equipment interface, a JTAG interface and an encoder interface; the dual-core ARM processor is connected with the gigabit network port, the SD card interface and the serial peripheral equipment interface; the FPGA framework is connected with the JTAG interface and the encoder interface; the dual-core ARM processor and the FPGA framework are in communication connection through an on-chip bus; the FPGA framework is electrically connected with the driving chip; the drive chip is electrically connected with the printing nozzle of the printer, can integrate a communication mainboard and an ink-jet control panel in the traditional printing equipment into an extended processing platform, does not need the mainboard to distribute and transmit printing data to the ink-jet control panel, and has higher operation efficiency.

Description

Communication drive control circuit board

Technical Field

The utility model belongs to the technical field of the circuit board technique and specifically relates to indicate a communication drive control circuit board.

Background

In order to control an inkjet printing head to print in a conventional printing apparatus, a communication motherboard and a control motherboard connected to the communication motherboard are generally required to be configured. In the printing operation process, the communication mainboard needs to distribute and transmit printing data to the ink jet control board, the process is tedious and time-consuming, and the interfaces configured in the general communication mainboard are limited, so that the number of the control boards connected with the communication mainboard is limited.

Therefore, it is necessary to design a new communication driving control circuit board so that it can break the limitation of the number of control boards connected to the communication main board.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model is to provide a communication drive control circuit board, it has cancelled the system's restriction that traditional printing control comprises communication mainboard and inkjet control board. It can be integrated into an expansion processing platform with the communication mainboard and the inkjet control panel among the traditional printing apparatus, does not need the mainboard distribution to transmit print data to the inkjet control panel, and the operating efficiency is higher.

In order to solve the technical problem, the utility model provides a communication drive control circuit board, which comprises a mainboard, wherein the mainboard is provided with a drive chip, an expansion processing platform and an external expansion interface; the expansion processing platform comprises a dual-core ARM processor and an FPGA architecture; the peripheral expansion interface comprises a kilomega network interface, an SD card interface, a serial peripheral equipment interface, a JTAG interface and an encoder interface; the dual-core ARM processor is connected with the gigabit network port, the SD card interface and the serial peripheral equipment interface; the FPGA framework is connected with the JTAG interface and the encoder interface; the dual-core ARM processor and the FPGA framework are in communication connection through an on-chip bus; the FPGA framework is electrically connected with the driving chip; the driving chip is electrically connected with a printing nozzle of the printer to control the printing nozzle to print.

Preferably, the dual-core ARM processor and the FPGA architecture are integrated on an extended processing platform, and the extended processing platform is an extended processing platform based on ZYNQ 7020.

Preferably, the main board is further provided with a FLASH chip and a plurality of memory chips; the memory chip and the FLASH chip are both connected with the FPGA framework.

Preferably, the memory chips are DDR3 chips, and the number of DDR3 chips is two.

Preferably, the on-chip bus is an AXI bus based on the ARM AMBA3.0 protocol.

Preferably, the communication drive control circuit board further comprises a power supply platform arranged on the mainboard; the power supply platform comprises a power interface, a fuse and a switch circuit; the power interface is electrically connected with the fuse and the switch circuit, and the power interface is electrically connected with the expansion processing platform.

Preferably, the communication drive control circuit board further includes a driving circuit, the driving chip is electrically connected to the driving circuit, and the driving circuit is electrically connected to a print head of the printer to control the print head to print.

Preferably, the SD card interface is located on one side of the motherboard; an SD card is inserted in the SD card interface, and the edge of the SD card does not exceed the edge of the mainboard.

Preferably, the communication drive control circuit board is characterized by comprising a bottom board and a protective cover matched with the bottom board; the mainboard sets up on the bottom plate, a plurality of louvres have been seted up on the bottom plate.

Preferably, the gigabit network port, the memory interface, the serial peripheral interface, the JTAG interface and the encoder interface are all soldered to the motherboard.

Compared with the prior art, the technical scheme of the utility model have following advantage:

the utility model integrates the dual-core ARM processor and the FPGA framework on the expansion processing platform, and the dual-core ARM processor and the FPGA framework are connected through the communication of an on-chip bus; a spray head state control program running in the dual-core ARM processor can be directly communicated with the FPGA framework. When the FPGA framework receives the signal, the printing nozzle can be directly controlled to print. The system limitation of the traditional printing control which consists of a communication mainboard and an ink jet control board is eliminated. It can be integrated into an expansion processing platform with the communication mainboard and the inkjet control panel among the traditional printing apparatus, does not need the mainboard distribution to transmit print data to the inkjet control panel, and the operating efficiency is higher.

Drawings

In order to make the content of the present invention more clearly understood, the present invention will be described in further detail with reference to the following embodiments of the present invention, in conjunction with the accompanying drawings, wherein:

fig. 1 is a schematic structural diagram of the communication drive control circuit board of the present invention.

Detailed Description

The present invention is further described with reference to the following drawings and specific embodiments so that those skilled in the art can better understand the present invention and can implement the present invention, but the embodiments are not to be construed as limiting the present invention.

Referring to fig. 1, the utility model discloses a communication drive control circuit board for driving spray head is printed in inkjet in the printing apparatus, include:

the system comprises a mainboard, a power interface arranged on the mainboard and an expanded processing platform.

Specifically, the power interface is connected with a 5V power supply, the power interface is further connected with a fuse and a switch circuit, and the 5V power supply supplies power for the expanded processing platform. The extended processing platform takes an ARM processor and an FPGA framework as cores; and a network communication program with the running speed of 1000Mbps and a printer nozzle state control program in the ARM processor. The ARM processor is in communication connection with the FPGA framework through an on-chip bus, preferably, the on-chip bus is an AXI bus based on an ARM AMBA3.0 protocol, and the ARM AMBA3.0 FPGA framework has the advantages of being high in performance, high in bandwidth, low in delay and the like, so that delay in data transmission between the ARM processor and the FPGA framework is reduced, and the work efficiency is higher.

Preferably, the ARM processor and the FPGA framework are integrated on an expanded processing platform, so that the design of a circuit board is greatly simplified, the expanded processing platform is based on ZYNQ 7020, the FPGA and the ARM processor are integrated on one chip, and high performance, high integration level and low power consumption are realized.

Specifically, the ARM processor is dominant in the expanded processing platform, the FPGA framework serves as a programmable peripheral of the ARM processor, and a spray head state control program running in the dual-core ARM processor can directly communicate with the FPGA framework through an on-chip bus. When the FPGA framework receives a signal of moving of a printing stock in the printing equipment, the printing spray head can be directly controlled to print. Through the arrangement of the integrated expansion processing platform, a main board is not required to distribute and transmit printing data to the ink jet control panel, and the operation efficiency is higher.

The ARM processor is connected with various peripheral expansion interfaces, and the expansion interfaces comprise a kilomega network interface, an SD card interface and a serial peripheral interface. The gigabit network port, the SD card interface and the serial peripheral interface are all welded on the mainboard. The FPGA architecture is provided with a plurality of peripheral expansion interfaces, the peripheral interfaces can be programmed into different peripheral interfaces according to actual requirements, and the peripheral interfaces comprise a JTAG interface, an encoder interface, a driving interface and the like. The driving interface is connected with a driving chip, the driving chip is connected with a driving circuit, and the driving circuit is electrically connected with an ink-jet printing nozzle of the printer to control the ink-jet printing nozzle to print.

Preferably, the main board is further provided with a FLASH chip and a plurality of memory chips, the memory chips are preferably DDR3 chips, and two DDR3 chips are provided, so that power consumption and heat generation can be reduced on the basis of controlling cost by adopting the DDR3 chips, the universality and compatibility are good, and the working frequency is high. The FLASH chip and the DDRS chip are arranged on the main board and are positioned close to the FPGA framework. The FLASH chip configures the files in the FLASH into the FPGA through a self-guiding program, so that the FPGA works to realize corresponding functions.

Furthermore, the SD card is inserted into the SD card interface, the SD card interface is located at the edge of the mainboard, and after the SD card is inserted into the SD card interface, the edge of the SD card does not exceed the edge of the mainboard, so that the design of the mainboard is simpler and has better space utilization rate.

Preferably, the communication drive control circuit board further includes a bottom plate and a protective cover cooperating with the bottom plate. The mainboard is arranged on the bottom plate, and a plurality of radiating holes for radiating are formed in the bottom plate.

The working principle is as follows: a dual-core ARM processor and an FPGA framework are integrated on an extended processing platform, and the extended processing platform is preferably an extended processing platform based on ZYNQ 7020. The FPGA architecture is used as a programmable peripheral of the ARM processor, and a spray head state control program running in the dual-core ARM processor can directly communicate with the FPGA architecture through an on-chip bus. When the FPGA framework receives a signal of moving of a printing stock in the printing equipment, the printing nozzle is directly controlled to print through the driving chip.

It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious changes and modifications can be made without departing from the scope of the invention.

Claims

1. A communication drive control circuit board, comprising:

the system comprises a main board, a plurality of processing units and a plurality of processing units, wherein the main board is provided with a driving chip, an expansion processing platform and an external expansion interface;

the expansion processing platform comprises a dual-core ARM processor and an FPGA architecture; the peripheral expansion interface comprises a kilomega network interface, an SD card interface, a serial peripheral equipment interface, a JTAG interface and an encoder interface; the dual-core ARM processor is connected with the gigabit network port, the SD card interface and the serial peripheral equipment interface; the FPGA framework is connected with the JTAG interface and the encoder interface;

the dual-core ARM processor and the FPGA framework are in communication connection through an on-chip bus;

the FPGA framework is electrically connected with the driving chip; the driving chip is electrically connected with a printing nozzle of the printer to control the printing nozzle to print.

2. The communication drive control circuit board of claim 1, wherein the dual-core ARM processor and the FPGA architecture are integrated on an extended processing platform, and the extended processing platform is an extended processing platform based on ZYNQ 7020.

3. The communication drive control circuit board according to claim 1, wherein a FLASH chip and a plurality of memory chips are further disposed on the main board; the memory chip and the FLASH chip are both connected with the FPGA framework.

4. The communication drive control circuit board of claim 3, wherein the memory chips are DDR3 chips, and the number of DDR3 chips is two.

5. The communication drive control circuit board of claim 1, wherein the on-chip bus is an AXI bus based on ARM AMBA3.0 protocol.

6. The communication drive control circuit board of claim 1, further comprising a power supply platform disposed on the motherboard; the power supply platform comprises a power interface, a fuse and a switch circuit; the power interface is electrically connected with the fuse and the switch circuit, and the power interface is electrically connected with the expansion processing platform.

7. The circuit board according to claim 1, further comprising a driving circuit, wherein the driving chip is electrically connected to the driving circuit, and the driving circuit is electrically connected to a print head of a printer to control the print head to print.

8. The circuit board according to claim 1, wherein the SD card interface is located on one side of the motherboard; an SD card is inserted in the SD card interface, and the edge of the SD card does not exceed the edge of the mainboard.

9. The communication drive control circuit board of claim 8, comprising a base plate and a protective cover cooperating with the base plate; the mainboard sets up on the bottom plate, a plurality of louvres have been seted up on the bottom plate.

10. The communications driver control circuit board of claim 9, wherein the gigabit port, the memory interface, the serial peripheral interface, the JTAG interface, and the encoder interface are all soldered to the motherboard.