CN214626947U

CN214626947U - Low-time-delay high-speed CAN relay circuit

Info

Publication number: CN214626947U
Application number: CN202121076013.9U
Authority: CN
Inventors: 魏勇; 吕康
Original assignee: Beijing Zhonghong Taike Technology Co ltd
Current assignee: Beijing Zhonghong Taike Technology Co ltd
Priority date: 2021-05-19
Filing date: 2021-05-19
Publication date: 2021-11-05
Anticipated expiration: 2031-05-19

Abstract

The utility model relates to a CAN relay circuit of low time delay high speed, including two CAN bus structures, every CAN bus structure includes CAN transceiver and gate circuit, the CAN transceiver includes Tx sends pin and Rx and receives the pin; the gate circuit is connected with the Rx receiving pin, and a Tx transmitting pin of any CAN transceiver is connected with the gate circuit of another CAN bus. This scheme utilizes the receiving and dispatching signal characteristic of CAN transceiver, and when CAN transceiver Tx pin sent data, through OR gate and AND gate circuit, block on the data that Rx pin received sent the CAN bus once more, avoided the data storm on the bus, make CAN realize the sending and receiving of no time delay between two CAN bus structures, expanded the area load capacity of CAN bus, improve communication efficiency, still reduced the cost simultaneously.

Description

Low-time-delay high-speed CAN relay circuit

Technical Field

The utility model belongs to the technical field of signal transmission circuit, in particular to low time delay high speed CAN relay circuit.

Background

At present, in industrial production, a plurality of control signals are transmitted by using a CAN bus, the CAN bus has the advantages of strong real-time performance, long transmission distance, strong anti-electromagnetic interference capability, low cost and the like, and simultaneously has priority and arbitration functions, and a plurality of control modules are hung on a CAN-bus through a CAN controller to form a multi-host local network. But due to the impedance matching of the CAN bus, the number of the carrying nodes of the CAN bus is limited to about 120. For densely arranged application scenes, great trouble is caused. The common solution is to add a CAN repeater, which generally needs to be programmed to forward data, so as to reduce the rate of CAN bus communication and have higher time delay.

SUMMERY OF THE UTILITY MODEL

In order to solve the technical problem, the utility model provides an it takes load capacity, improves communication efficiency's low time delay high speed CAN relay circuit to have extended the CAN bus.

The utility model discloses specific technical scheme as follows:

a low-delay high-speed CAN relay circuit comprises two CAN bus structures, wherein each CAN bus structure comprises a CAN transceiver and a gate circuit, and the CAN transceiver comprises a Tx transmitting pin and an Rx receiving pin; the gate circuit is connected with the Rx receiving pin, and a Tx transmitting pin of any CAN transceiver is connected with the gate circuit of another CAN bus.

Furthermore, a CANH port, a CANL port and a level shifter are arranged in the CAN transceiver, one side of the level shifter is connected with the CANH port and the CANL port, and the other side of the level shifter is connected with the Tx transmitting pin and the Rx receiving pin.

Furthermore, signals enter the CAN transceivers from a CANH port and a CANL port in one CAN bus structure, then are transmitted to an Rx receiving pin through a level shifter, are output to a gate circuit by the Rx receiving pin, and then are transmitted to a Tx transmitting pin of another CAN transceiver, and the Tx transmitting pin receiving the signals transmits the signals into the level shifter, and then the CANH port and the CANL port output the signals.

Further, after the Tx transmitting pin receives a signal of another CAN bus structure, the signal also enters the gate circuit through the Rx receiving pin of the same CAN transceiver.

Furthermore, a power conversion module is integrated, the power conversion module is a wide-voltage input DC/DC power conversion module, and the power conversion module is respectively connected to the two CAN transceivers; the parallel extension of the power supply and the CAN bus is realized, and the power supply problem of each CAN node device is solved.

Still further, the gate circuit comprises an and gate circuit and an or gate circuit which are connected, and the signal entering the gate circuit from the Tx transmitting pin of the same CAN transceiver through the Rx receiving pin stops transmission.

Preferably, the CAN bus further comprises a photoelectric isolation module, wherein the photoelectric isolation module is connected with the CAN transceiver to enhance the anti-interference capability of the CAN bus.

The CAN bus structure has the advantages that the transmitting and receiving characteristics of the CAN transceiver are utilized, when the Tx pin of the CAN transceiver transmits data, the data received by the Rx pin is blocked from being transmitted to the CAN bus again through the OR gate and the AND gate circuit, so that data storm on the bus is avoided, time-delay-free transmitting and receiving CAN be realized between two CAN bus structures, the load carrying capacity of the CAN bus is expanded, the communication efficiency is improved, and the cost is reduced.

Drawings

Fig. 1 is a schematic diagram of a structure of a CAN relay circuit according to the present invention;

fig. 2 is a schematic connection diagram of the power conversion module of the present invention;

FIG. 3 is a circuit diagram of a CAN bus A according to the present invention;

fig. 4 is a circuit connection diagram of a CAN bus B of the present invention;

fig. 5 is a circuit diagram of the interface J1 according to the present invention.

Description of reference numerals: 1. the system comprises a CAN bus structure, 2, a CAN transceiver, 21, a level converter, 3, a gate circuit, 4, a power conversion module, 5 and a photoelectric isolation module.

Detailed Description

The low-latency high-speed CAN relay circuit of the present invention will be described in detail with reference to the accompanying drawings and the following embodiments.

Examples

As shown in fig. 1, the CAN relay circuit with low time delay and high speed includes two CAN bus structures 1, where the two CAN bus structures include a bus a and a bus B, each CAN bus structure 1 includes a CAN transceiver 2 and a gate circuit 3, and the CAN transceiver 2 includes a Tx transmit pin and an Rx receive pin; the gate circuit 3 is connected with the Rx receiving pin, and a Tx transmitting pin of any one of the CAN transceivers 2 is connected to a gate circuit of another CAN bus. A CANH port, a CANL port and a level shifter 21 are arranged in the CAN transceiver 2, one side of the level shifter 21 is connected with the CANH port and the CANL port, and the other side of the level shifter 21 is connected with the Tx transmitting pin and the Rx receiving pin.

A power conversion module 4 is further integrated, the power conversion module 4 is a wide voltage input DC/DC power conversion module, and the power conversion module 4 is respectively connected to the two CAN transceivers; the parallel extension of the power supply and the CAN bus is realized, and the power supply problem of each CAN node device is solved.

Still further, the gate circuit 3 is composed of an and circuit and an or gate circuit connected with each other, and the signal entering the and gate circuit 3 from the Tx transmitting pin of the same CAN transceiver 2 through the Rx receiving pin stops transmission.

Further referring to fig. 1, the signal transmission direction is shown in the figure, signals enter the CAN transceiver 2 from a CANH port and a CANL port in one CAN bus structure 1, then are transmitted into an Rx receiving pin through a level shifter 21, and are output to a gate circuit 3 through the Rx receiving pin, and then are transmitted to a Tx transmitting pin of another CAN transceiver 2, and the Tx transmitting pin receiving the signals transmits the signals into the level shifter 21, and then outputs the signals through the CANH port and the CANL port; after the Tx transmitting pin receives a signal of another CAN bus structure 1, the signal also enters the gate circuit 3 through the Rx receiving pin of the same CAN transceiver 2, and the transmission mode of the signal from the bus a to the bus B is the same as that of the signal from the bus B to the bus a.

Preferably, in order to improve the anti-interference capability of the CAN bus, a photoelectric isolation module 5 CAN be further arranged, the photoelectric isolation module 5 is connected with the CAN transceiver, and the anti-interference capability of the whole CAN bus CAN be effectively improved by utilizing the characteristics of the photoelectric isolation module.

Referring to fig. 2, the power conversion module 4 selects a 50mA synchronous buck converter U1 with model number TPS54062, low quiescent current (IQ) and 4.7V to 60V input, the buck converter U1 is a wide voltage input DC/DC power conversion module, and the buck converter U1 is provided with a plurality of ports for receiving digital DGND; the circuit board is also connected with a J1 interface.

Referring to fig. 3 and 4, the circuit diagrams of two CAN bus structures are shown, fig. 3 is a circuit diagram of a bus a and a bus B of fig. 4, the CAN transceivers 2 of the two CAN bus structures 1 both adopt a CAN transceiver with the model number of SN65HVD230, and the CAN bus CAN realize high-reliability serial communication with higher communication rate and good electromagnetic interference resistance, so that the CAN bus has extremely high application value in practical application. However, with the continuous development of the integration technology, in order to save power consumption and reduce the circuit size, the logic levels of some new CAN bus controllers all adopt LVTTL, which requires a bus transceiver adapted to the LVTTL; the SN65HVD230 circuit solves the problem very well, CAN transceivers of U2 and U3 are connected with an AND gate circuit T1, T2 and OR gate circuits T3 and T4, the AND gate circuit adopts an AND gate chip with the model SN74LVC1G00, the OR gate circuit adopts an OR gate chip with the model U7SH32, and the CAN bus structures 1 are provided with digital ground terminals, so that the CAN bus structures 1 are connected with a power supply conversion module 4.

According to the embodiment, the transmitting and receiving signal characteristics of the CAN transceiver are utilized, when the Tx pin of the CAN transceiver transmits data, the data received by the Rx pin is blocked to be transmitted to the CAN bus again through the OR gate and the AND gate circuit, so that data storm on the bus is avoided, non-delay transmitting and receiving CAN be realized between two CAN bus structures, the load carrying capacity of the CAN bus is expanded, the communication efficiency is improved, and meanwhile, the cost is reduced.

The above-mentioned embodiments are merely preferred embodiments of the present invention, and not intended to limit the scope of the present invention, and all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention, and all the modifications and improvements made by those skilled in the art to the technical solution of the present invention without departing from the concept of the present invention shall fall within the protection scope defined by the claims of the present invention.

Claims

1. A low-delay high-speed CAN relay circuit is characterized in that: the CAN bus structure comprises two CAN bus structures (1), wherein each CAN bus structure (1) comprises a CAN transceiver (2) and a gate circuit (3), and the CAN transceiver (2) comprises a Tx sending pin and an Rx receiving pin;

the gate circuit (3) is connected with the Rx receiving pin, and the Tx transmitting pin of any CAN transceiver (2) is connected with the gate circuit (3) of the other CAN bus.

2. The CAN relay circuit of claim 1, wherein: a CANH port, a CANL port and a level converter (21) are arranged in the CAN transceiver (2), one side of the level converter (21) is connected with the CANH port and the CANL port, and the other side of the level converter is connected with the Tx sending pin and the Rx receiving pin.

3. The CAN relay circuit of claim 2, wherein: signals enter the CAN transceiver (2) from a CANH port and a CANL port in one CAN bus structure (1), are transmitted to an Rx receiving pin through a level shifter (21), are output to a gate circuit (3) through the Rx receiving pin, are transmitted to a Tx sending pin of the other CAN transceiver (2), and are transmitted to the level shifter (21) through the Tx sending pin of the received signals and are output through the CANH port and the CANL port.

4. The CAN relay circuit of claim 3, wherein: after the Tx sending pin receives a signal of another CAN bus structure (1), the signal enters the gate circuit (3) through an Rx receiving pin of the same CAN transceiver (2).

5. The CAN relay circuit of claim 1, wherein: the power supply conversion module (4) is further integrated, the power supply conversion module (4) is a wide-voltage-input DC/DC power supply conversion module, and the power supply conversion module (4) is connected to the two CAN transceivers (2) respectively.

6. The CAN relay circuit of claim 1, wherein: the gate circuit (3) comprises an AND gate circuit and an OR gate circuit which are connected, and the signal entering the gate circuit (3) from a Tx sending pin of the same CAN transceiver (2) through an Rx receiving pin stops transmission.

7. The CAN relay circuit of claim 1, wherein: the CAN transceiver also comprises a photoelectric isolation module (5), wherein the photoelectric isolation module (5) is connected with the CAN transceiver (2).