CN214625028U

CN214625028U - Chip packaging structure with graphene layer

Info

Publication number: CN214625028U
Application number: CN202120763966.6U
Authority: CN
Inventors: 艾育林
Original assignee: Jiangxi Wannianxin Microelectronics Co Ltd
Current assignee: Jiangxi Wannianxin Microelectronics Co Ltd
Priority date: 2021-04-13
Filing date: 2021-04-13
Publication date: 2021-11-05
Anticipated expiration: 2031-04-13

Abstract

The utility model belongs to the technical field of the chip technique and specifically relates to a chip packaging structure with graphite alkene layer, including encapsulation end box, the corner at encapsulation end box top is provided with spacing post, encapsulation end box is connected with the encapsulation lid through spacing post, the internal structure size of encapsulation end box and encapsulation lid sets up with the external structure size of chip is corresponding, the corner of encapsulation lid bottom and the position department of corresponding spacing post have seted up spacing hole, the internal structure size of spacing hole sets up with the external structure size of spacing post is corresponding, the inside homogeneous phase correspondence of encapsulation end box and encapsulation lid is provided with graphite alkene layer, the multiunit through-hole has been seted up to the both sides homogeneous phase correspondence around the encapsulation lid, the top of encapsulation lid evenly is provided with a plurality of radiating blocks, compares with current chip packaging structure, the utility model discloses a design can improve chip packaging structure's whole thermal diffusivity, Economy and practicality.

Description

Chip packaging structure with graphene layer

Technical Field

The utility model relates to a chip technology field specifically is a chip packaging structure with graphite alkene layer.

Background

Chips, also known as microcircuits, microchips, integrated circuits. The chip packaging structure is a novel chip packaging structure with a graphene layer, and has the advantages that the whole heat dissipation, the economy and the practicability are generally low, the improvement of the existing chip packaging structure is realized, a novel chip packaging structure with the graphene layer is designed to change the technical defects, the practicability of the whole chip packaging structure is improved, and the practicability is very important.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a chip package structure with graphite alkene layer to solve the problem that proposes in the above-mentioned background art.

In order to achieve the above object, the utility model provides a following technical scheme:

the utility model provides a chip package structure with graphite alkene layer, includes the encapsulation end box, the corner at encapsulation end box top is provided with spacing post, the encapsulation end box is connected with the encapsulation lid through spacing post, the inside homogeneous phase of encapsulation end box and encapsulation lid corresponds and is provided with graphite alkene layer, the multiunit through-hole has been seted up to both sides homogeneous phase correspondence around the encapsulation lid, the top of encapsulation lid evenly is provided with a plurality of radiating blocks.

As the utility model discloses preferred scheme, the internal structure size of box and encapsulation lid at the bottom of the encapsulation sets up with the external structure size of chip is corresponding.

As the utility model discloses preferred scheme, the position department of the corner of encapsulation box cover bottom and corresponding spacing post has seted up spacing hole, the inner structure size in spacing hole and the corresponding setting of outer structure size of spacing post.

As the utility model discloses preferred scheme, the corresponding setting of the outer structure size and the quantity of the inner structure size and the quantity of quantity and chip connection leg of through-hole.

As the utility model discloses preferred scheme, encapsulation lid and radiating block are integral type structural design.

As the utility model discloses preferred scheme, the radiating block is four prismatic table structural design, just box, encapsulation lid and radiating block are the heat conduction material preparation at the bottom of the encapsulation.

Compared with the prior art, the beneficial effects of the utility model are that:

in the utility model, through the design of the chip packaging structure with the graphene layer, the packaging bottom box and the packaging box cover can play an all-round protection role for the chip, and the packaging bottom box, the packaging box cover and the radiating block are made of heat conducting materials, and the graphene layer inside the packaging bottom box and the packaging box cover is matched to greatly improve the radiating performance of the packaging structure, so that the service life of the chip can not be influenced while the chip is protected, and the chip can normally run, and the phenomenon of unsmooth running caused by poor radiating can not occur, and the radiating block is designed into a quadrangular frustum structure, so that the contact surface between the radiating block and the outside is greatly increased, the radiating effect is better, and the radiating block can increase the anti-impact capacity of the packaging box cover, so that the packaging box cover is not easy to deform even being impacted by the outside, thereby playing a good protection role for the internal chip, the whole heat dissipation, the economy and the practicality are higher.

Drawings

FIG. 1 is a schematic view of the overall three-dimensional structure of the present invention;

FIG. 2 is a schematic view of the three-dimensional structure of the packaging structure of the present invention;

fig. 3 is a schematic view of the three-dimensional structure of the bottom case of the present invention.

In the figure: 1-packaging bottom box, 2-limiting column, 3-packaging box cover, 4-graphene layer, 5-through hole and 6-radiating block.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by a person of ordinary skill in the art without creative work belong to the scope of the present invention based on the embodiments of the present invention.

In order to facilitate understanding of the invention, a number of embodiments of the invention will be described more fully hereinafter with reference to the accompanying drawings, in which, however, the invention may be embodied in many different forms and is not limited to the embodiments described herein, but rather these embodiments are provided so as to render the disclosure more thorough and complete.

It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present, that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present, and that the terms "vertical", "horizontal", "left", "right" and the like are used herein for descriptive purposes only.

Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs, and the terms used herein in the specification of the present invention are for the purpose of describing particular embodiments only and are not intended to limit the present invention, and the term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.

Referring to fig. 1-3, the present invention provides a technical solution:

in the embodiment, please refer to fig. 1, 2 and 3, a chip package structure with a graphene layer comprises a package bottom case 1, a limiting post 2 is disposed at a corner of the top of the package bottom case 1, the package bottom case 1 is connected to a package cover 3 through the limiting post 2, the internal structures of the package bottom case 1 and the package cover 3 are disposed corresponding to the external structure of a chip, a limiting hole is disposed at the corner of the bottom of the package cover 3 and corresponding to the limiting post 2, the internal structure of the limiting hole is disposed corresponding to the external structure of the limiting post 2, the graphene layer 4 is disposed correspondingly inside the package bottom case 1 and the package cover 3, a plurality of sets of through holes 5 are disposed correspondingly at the front and rear sides of the package cover 3, the internal structure and number of the through holes 5 are disposed corresponding to the external structure and number of the chip connecting legs, a plurality of heat dissipation blocks 6 are uniformly disposed at the top of the package cover 3, the packaging box cover 3 and the heat dissipation block 6 are designed into an integral structure, the heat dissipation block 6 is designed into a quadrangular frustum pyramid structure, the packaging bottom box 1, the packaging box cover 3 and the heat dissipation block 6 are made of heat conduction materials, through the design of a chip packaging structure with graphene layers, the chip can be protected in an all-round way by using the packaging bottom box 1 and the packaging box cover 3, the packaging bottom box 1, the packaging box cover 3 and the heat dissipation block 6 are made of heat conduction materials, the heat dissipation performance of the packaging structure can be greatly improved by matching the graphene layers 4 in the packaging bottom box 1 and the packaging box cover 3, the service life of the chip can not be influenced when the chip is protected, the chip can normally run, the phenomenon that the heat dissipation block is blocked due to poor heat dissipation can not occur, the heat dissipation block 6 is designed into a quadrangular frustum pyramid structure, the contact surface between the heat dissipation block 6 and the outside is greatly increased, the heat dissipation effect is better, simultaneously the radiating block 6 can increase the anti striking ability of encapsulation lid 3 for even encapsulation lid 3 receives external striking also difficult emergence and warp, thereby plays fine guard action to inside chip, and whole thermal diffusivity, economic nature and practicality are higher.

The utility model discloses work flow: through the design of the chip packaging structure with the graphene layer, the packaging bottom box 1 and the packaging box cover 3 can play an all-round protection role on the chip, meanwhile, the packaging bottom box 1, the packaging box cover 3 and the radiating block 6 are made of heat conducting materials, the radiating performance of the packaging structure can be greatly improved by matching the graphene layer 4 inside the packaging bottom box 1 and the packaging box cover 3, the service life of the chip can not be influenced while the chip is protected, meanwhile, the chip can normally run, the phenomenon that the operation is blocked due to poor radiating can not occur, the radiating block 6 is of a quadrangular frustum structure, the contact surface between the radiating block 6 and the outside is greatly increased, the radiating effect is better, meanwhile, the radiating block 6 can increase the impact resistance of the packaging box cover 3, the packaging box cover 3 is not easy to deform even being impacted by the outside, and thereby playing a good protection role on the internal chip, compare with current chip package structure, the utility model discloses a design can improve chip package structure's whole thermal diffusivity, economic nature and practicality.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims

1. A chip packaging structure with a graphene layer comprises a packaging bottom box (1), and is characterized in that: the corner at encapsulation end box (1) top is provided with spacing post (2), encapsulation end box (1) is connected with encapsulation lid (3) through spacing post (2), the inside homogeneous phase of encapsulation end box (1) and encapsulation lid (3) corresponds and is provided with graphite alkene layer (4), multiunit through-hole (5) have been seted up to both sides homogeneous phase correspondence around encapsulation lid (3), the top of encapsulation lid (3) evenly is provided with a plurality of radiating blocks (6).

2. The chip package structure with graphene layer according to claim 1, wherein: the size of the internal structures of the packaging bottom box (1) and the packaging box cover (3) is corresponding to the size of the external structure of the chip.

3. The chip package structure with graphene layer according to claim 1, wherein: the packaging box is characterized in that a limiting hole is formed in the corner of the bottom of the packaging box cover (3) and in the position of the corresponding limiting column (2), and the size of the inner structure of the limiting hole corresponds to the size of the outer structure of the limiting column (2).

4. The chip package structure with graphene layer according to claim 1, wherein: the size and the number of the internal structure of the through holes (5) correspond to the size and the number of the external structure of the chip connecting legs.

5. The chip package structure with graphene layer according to claim 1, wherein: the packaging box cover (3) and the heat dissipation block (6) are designed into an integrated structure.

6. The chip package structure with graphene layer according to claim 1, wherein: the radiating block (6) is designed into a quadrangular frustum pyramid structure, and the packaging bottom box (1), the packaging box cover (3) and the radiating block (6) are made of heat-conducting materials.