CN214622953U

CN214622953U - Relay self-checking circuit and relay system of grid-connected inverter

Info

Publication number: CN214622953U
Application number: CN202120627102.1U
Authority: CN
Inventors: 金海燕; 卢盈; 吴生闻
Original assignee: Aishiwei New Energy Technology Yangzhong Co ltd
Current assignee: Aishiwei New Energy Technology Yangzhong Co ltd
Priority date: 2021-03-26
Filing date: 2021-03-26
Publication date: 2021-11-05
Anticipated expiration: 2031-03-26

Abstract

The utility model discloses a relay self-checking circuit and grid-connected inverter's relay system. A self-checking circuit of a relay for detecting whether a driving circuit of the relay is abnormal, the self-checking circuit comprising: the detection terminal is used for detecting a second end of the coil of the relay, and the coil of the relay is also provided with a first end used for connecting working voltage; one input end of the comparison circuit is electrically connected to the detection terminal, and the other input end of the comparison circuit is connected to a first power supply voltage; and the self-checking signal output terminal is electrically connected to the output end of the comparison circuit. The utility model discloses can confirm whether relay drive circuit is normal, improve the self-checking accuracy.

Description

Relay self-checking circuit and relay system of grid-connected inverter

Technical Field

The utility model relates to a relay self-checking circuit and grid-connected inverter's relay system.

Background

The relay is one of important components of an inverter such as a photovoltaic grid-connected inverter, and when the relay operates, a voltage needs to be applied to a driving coil of the relay to close the relay. Conventionally, a relay drive circuit generally applies a voltage to a drive coil of a relay to control the relay operation. Fig. 1 shows a relay system of a present grid-connected inverter. From the requirement of safety regulations, the relay needs to be capable of self-checking, the relay self-checking of the current inverter is performed on the assumption that a driving circuit works normally, but if the driving circuit of the relay is abnormal, misjudgment can be caused, and the purpose of self-checking of the relay cannot be achieved.

SUMMERY OF THE UTILITY MODEL

To at least one among the above-mentioned problem, the utility model aims at providing a self-checking circuit of relay can confirm whether relay drive circuit is normal, improves the self-checking accuracy.

Another object of the utility model is to provide an adopt above-mentioned relay self-checking circuit's grid-connected inverter's relay system.

According to the utility model discloses an aspect, a self-checking circuit of relay for detect whether the drive circuit of relay is unusual, the self-checking circuit includes:

the detection terminal is used for detecting a second end of the coil of the relay, and the coil of the relay is also provided with a first end used for connecting working voltage;

one input end of the comparison circuit is electrically connected to the detection terminal, and the other input end of the comparison circuit is connected to a first power supply voltage; and

and the self-checking signal output terminal is electrically connected to the output end of the comparison circuit.

Preferably, the comparison circuit includes a first comparator and a second comparator, and the detection terminal is connected to an inverting input terminal of the first comparator; the positive phase input end of the first comparator is connected with a first power supply; the output end of the first comparator is connected to the positive phase input end of the second comparator; and the inverting input end of the second comparator is grounded, and the output end of the second comparator is connected to the self-checking signal output terminal.

More preferably, the output terminal of the first comparator is connected to the non-inverting input terminal of the second comparator through a resistor.

More preferably, the output terminal of the second comparator is connected to the self-test signal output terminal through a resistor.

More preferably, the negative electrode of the first power supply is grounded, the positive electrode of the first power supply is grounded after being connected in series with the resistor R23, the positive electrode of the first power supply is connected to the non-inverting input terminal of the first comparator through the resistor R23, the self-checking circuit further includes a resistor R24, one end of the resistor R24 is connected to the positive electrode of the first power supply, and the other end of the resistor R24 is connected to the middle point between the detection terminal and the inverting input terminal of the first comparator; and/or the negative pole of the first power supply is grounded, the positive pole of the first power supply is grounded after being connected with the resistor R25 in series, and the positive pole of the first power supply is connected to the inverting input end of the second comparator through the resistor R25.

More preferably, the self-test circuit further includes a resistor R26 and a capacitor C21, one end of the resistor R26 is connected to the positive electrode of the first power supply, the other end of the resistor R26 is connected to one end of the capacitor C21, and the other end of the capacitor C21 is grounded.

Preferably, the self-test circuit further comprises a diode, a cathode of the diode is connected to the detection terminal, and an anode of the diode is connected to the input end of the comparison circuit.

Preferably, the self-checking circuit further comprises a second power supply and a resistor, wherein the anode of the second power supply is connected to one end of the resistor, and the cathode of the second power supply is grounded; the other end of the resistor is connected to the self-test signal output terminal.

According to a second aspect of the present invention, a relay system of a grid-connected inverter, includes a relay connected in series between an inverter side and a grid side, the relay being driven by a driving circuit, the relay system further including a self-checking circuit for detecting whether the driving circuit is abnormal, the self-checking circuit employing the above-mentioned self-checking circuit;

the driving circuit comprises a control signal input terminal, a first switching tube circuit, a second switching tube circuit, a third switching tube circuit and a power supply terminal for supplying power to a coil of the relay;

the power supply terminal can be electrically connected to a first end of the relay coil;

the control end of the first switching tube circuit is electrically connected to the control signal input terminal, one end of the action end of the first switching tube circuit can be electrically connected to the second end of the relay coil, and the other end of the action end of the first switching tube circuit is grounded;

the control end of the second switching tube circuit is electrically connected to the control signal input terminal, one end of the action end of the second switching tube circuit is electrically connected to the control end of the third switching tube circuit, and the other end of the action end of the second switching tube circuit is grounded;

one end of the action end of the third switching tube circuit is electrically connected to the power supply terminal and the middle point of the first end of the relay coil, and the other end of the action end of the third switching tube circuit is electrically connected to the second end of the relay coil;

the driving circuit further comprises a time delay circuit and a first diode, wherein the time delay circuit is used for enabling the second switching tube circuit to be conducted after the first switching tube circuit is conducted for a delay time, and the first diode is used for enabling the second switching tube circuit to be conducted when the first switching tube circuit is turned off.

Preferably, the first switching tube circuit includes an NPN transistor, a base of the NPN transistor is electrically connected to the control signal input terminal, a collector of the NPN transistor is electrically connected to the second end of the relay coil, and an emitter of the NPN transistor is grounded;

the third switching tube circuit comprises a PNP type triode, wherein the base electrode of the PNP type triode is electrically connected with the control signal input terminal, the collector electrode of the PNP type triode is electrically connected with the power supply terminal and the middle point of the first end of the relay coil, and the emitter electrode of the PNP type triode is electrically connected with the second end of the relay coil.

More preferably, a second diode is connected between an emitter of the PNP transistor and the second end of the relay coil.

More preferably, the driving circuit further comprises a third diode and a zener diode, and the third diode and the zener diode are connected in series and then connected in parallel between the collector and the base of the PNP type triode in an inverse manner.

Preferably, the second switch tube circuit includes a field effect transistor, a gate (i.e., the control terminal) of the field effect transistor is electrically connected to the control signal input terminal, a source (i.e., the other end of the operation terminal) of the field effect transistor is grounded, and a drain (i.e., the one end of the operation terminal) of the field effect transistor is electrically connected to the control terminal of the third switch tube circuit.

Preferably, a first resistor is connected between the control end of the third switching tube circuit and one end of the control end of the second switching tube circuit.

Preferably, a second resistor is connected between the control signal input terminal and the control end of the second switching tube circuit.

Preferably, the delay circuit includes a first capacitor and a third resistor, the first capacitor and the third resistor are connected in parallel to form a parallel branch, one end of the parallel branch is electrically connected to the middle point of the first diode and the control end of the first switch tube circuit, and the other end of the parallel branch is electrically grounded.

Preferably, the anode of the first diode is electrically connected to the control signal input terminal, and the cathode of the first diode is electrically connected to the control end of the second switching tube circuit.

Preferably, the driving circuit further comprises a second capacitor electrically connected between the power terminal and ground.

Specifically, the voltage connected to the power supply terminal is 12V.

Preferably, the control signal input terminal is connected to a PWM control port of a DSP chip of the grid-connected inverter.

According to a second aspect of the present invention, a driving method of a relay, which employs the driving circuit described above, includes the steps of:

initially, in a set maintaining time, enabling the control signal output terminal to input a control signal with a first duty ratio so as to enable the relay to work normally;

when the relay works normally, the control signal terminal outputs a control signal with a second duty ratio, and the second duty ratio is smaller than the first duty ratio; and/or

And when the relay works normally and the ambient temperature near the relay is lower than the set temperature, the control signal terminal outputs a control signal with a third duty ratio, and the third duty ratio is smaller than the second duty ratio.

Preferably, the first duty cycle is 100%, the second duty cycle is 50%, and the third duty cycle is 35%.

Preferably, the maintenance time is 100 ms.

Specifically, when the relay performs a closing action, the duty ratio of the PWM control signal is set to 100% within a set holding time (the first 100ms) so that the action voltage of the relay meets the specification requirement; when the relay works normally, the duty ratio of the control signal is set to be about 50%, and the holding voltage is a first voltage smaller than the action voltage; when the environment temperature of the relay accessories is detected to be lower than the set value, the duty ratio of the control signal is set to be 35% according to the specification requirement, and the voltage is kept to be a second voltage which is smaller than the first voltage.

The utility model adopts the above scheme, compare prior art and have following advantage:

the utility model discloses a relay self-checking circuit and grid-connected inverter's relay system, the at utmost satisfies the ann rule requirement, can detect out that it is that relay drive circuit is unusual or the relay body is unusual. When the relay driving circuit is found to be abnormal by self-checking, the inverter can not detect the relay any more, and hidden danger is avoided.

Drawings

In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a circuit diagram of a relay system of a conventional grid-connected inverter;

fig. 2 is a circuit diagram of a relay system of a grid-connected inverter according to an embodiment of the present invention;

fig. 3 is a circuit diagram of a driving circuit of a relay according to an embodiment of the present invention;

fig. 4 is a circuit diagram of a self-checking circuit of the relay driving circuit according to the embodiment of the present invention.

100. A drive circuit; 101. a control signal input terminal; 102. a power supply terminal; 103. a first switching tube circuit; 104. a second switching tube circuit; 105. a third switching tube circuit; 106. a delay circuit;

200. a drive circuit;

300. a coil;

400. a self-checking circuit; 401. a detection terminal; 402. a first power supply; 403. a second power supply; 404. and the signal terminal is self-tested.

Detailed Description

The following detailed description of the preferred embodiments of the invention, taken in conjunction with the accompanying drawings, enables the advantages and features of the invention to be more readily understood by those skilled in the art. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. Furthermore, the technical features mentioned in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

As used in this specification and the appended claims, the terms "comprises" and "comprising" are intended to only encompass the explicitly identified steps and elements, which do not constitute an exclusive list, and that a method or apparatus may include other steps or elements. As used herein, the term "and/or" includes any combination of one or more of the associated listed items.

It will be further understood that the terms "first," "second," and the like are used to describe various information and that such information should not be limited by these terms. These terms are only used to distinguish one type of information from another and do not denote a particular order or importance. Indeed, the terms "first," "second," and the like are fully interchangeable. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present disclosure.

According to an embodiment of the utility model, a relay system of photovoltaic grid-connected inverter is shown in fig. 2. Referring to fig. 2, the relay system includes a main relay RY1 and an auxiliary relay RY2 connected in series between an inverter side and a grid side; specifically, a main relay RY1 and an auxiliary relay RY2 which are connected in series with each other are respectively arranged on a live wire and a zero wire between the inverter side and the power grid side. The main relay RY1 has a drive circuit 100 that supplies voltage to the coil 300 of the main relay RY1, and is driven to operate (e.g., close) by the drive circuit 100; the sub-relay RY2 has a drive circuit 200 that supplies voltage to the coil 300 of the sub-relay RY2, and is driven to operate (e.g., close) by the drive circuit 200.

The embodiment also provides a specific relay driving circuit, which can be applied to the relay system of the photovoltaic grid-connected inverter to drive the main relay RY1 and the auxiliary relay RY 2. The drive circuit 100 of the main relay RY1 is the same as the drive circuit 200 of the sub relay RY2, the drive circuit 100 of the main relay RY1 is described in detail below, and the drive circuit 200 of the sub relay RY2 is similar to the same, and therefore, the description thereof is omitted. Referring to fig. 3, the driving circuit 100 of the main relay RY1 includes a control signal input terminal 101, a first switching tube circuit 103, a second switching tube circuit 104, a third switching tube circuit 105, and a power supply terminal 102 for supplying power to the coil 300 of the relay.

The control signal input terminal 101 can be electrically connected to the control unit to receive the control signal M _ release from the control unit. The control signal input terminal 101 can be electrically connected to a PWM control port of a DSP chip of the photovoltaic grid-connected inverter, and different duty ratios can be output through the control port; the voltage of the coil 300 of the relay RY1 is changed according to the duty ratio, and thus different voltages are generated in the relay coil 300.

The power terminal 102 is electrically connected to a first end of the relay coil 300. The power supply terminals 102 are used for inputting operating power to the coil 300, and the number of the power supply terminals 102 in this embodiment is one and 12V is applied.

The control end of the first switching tube circuit 103 is electrically connected to the control signal input terminal 101 so as to be controlled by the control signal M _ RELAY, one end of the operation end of the first switching tube circuit 103 can be electrically connected to the second end of the RELAY coil 300, and the other end of the operation end of the first switching tube circuit 103 is grounded. Specifically, in the present embodiment, the first switch tube circuit 103 includes an NPN transistor Q1, a base (i.e., the control terminal) of the NPN transistor Q1 is electrically connected to the control signal input terminal 101, a collector (i.e., one end of the operation terminal) is electrically connected to the second terminal of the relay coil 300, and an emitter (i.e., the other end of the operation terminal) is grounded.

The control terminal of the second switching tube circuit 104 is electrically connected to the control signal input terminal 101, one end of the operation terminal of the second switching tube circuit 104 is electrically connected to the control terminal of the third switching tube circuit 105, and the other end of the operation terminal of the second switching tube circuit 104 is grounded. Specifically, in the present embodiment, the second switch circuit 104 includes a fet Q2, the gate (i.e., the control terminal) of the fet Q2 is electrically connected to the control signal input terminal 101, the source (i.e., the other end of the active terminal) is grounded, and the drain (i.e., the one end of the active terminal) is electrically connected to the control terminal of the third switch circuit 105.

One end of the operating end of the third switching tube circuit 105 is electrically connected to the power terminal 102 and the middle point of the relay coil 300, and the other end of the operating end of the third switching tube circuit 105 is electrically connected to the second end of the relay coil 300. Specifically, in the present embodiment, the third switching transistor circuit 105 includes a PNP transistor Q3, a base (i.e., the control terminal) of the PNP transistor Q3 is electrically connected to the drain of the fet Q2, a collector (i.e., the end of the operation terminal) is electrically connected to the power terminal 102 and the middle point of the relay coil 300, and an emitter (i.e., the other end of the operation terminal) is electrically connected to the second terminal of the relay coil 300.

The driving circuit 100 further includes a delay circuit 106 for turning on the second switching tube circuit 104 after the first switching tube circuit 103 is turned on for a delay time, and a first diode D1 for turning on the third switching tube circuit 105 when the first switching tube circuit 103 is turned off. The first diode D1 is located between the control signal input terminal 101 and the gate of the fet Q2, and has an anode electrically connected to the control signal input terminal 101 and a cathode electrically connected to the gate of the fet Q2. The first diode D1 keeps the second switch tube circuit 104 on after the first switch tube circuit 103 is turned off, forming a relay off loop. The delay circuit 106 specifically includes a first capacitor C1 and a third resistor R3, the first capacitor C1 and the third resistor R3 are connected in parallel to form a parallel branch, one end of the parallel branch is electrically connected to the middle point of the first diode D1 and the control end of the first switching tube circuit 103, and the other end of the parallel branch is electrically grounded. A delay is set for driving the second switching tube circuit 104, so that the second switching tube circuit 104 is turned on after the first switching tube circuit 103 is turned on for a period of time (specifically 5 μ s), and the second switching tube circuit 104 provides a turn-off loop without affecting the turn-on loop.

A second diode D2 is connected between the second terminal of the relay coil 300 and the emitter of the PNP transistor Q3. Specifically, the anode of the second diode D2 is electrically connected to the second end of the relay coil 300, and the cathode is electrically connected to the emitter of the PNP transistor Q3. The second diode D2 provides a freewheeling path for the reverse relay coil voltage, coil current, and protects the relay coil voltage from exceeding specification requirements.

The driving circuit 100 further includes a third diode D3 and a zener diode ZD1, wherein the third diode D3 and the zener diode ZD1 are connected in series and then connected in reverse parallel between the collector and the base of the PNP transistor Q3. When the voltage of the coil of the relay is reversed, a follow current loop is provided through a second diode D2 and a voltage stabilizing diode ZD1, the voltage of the coil is clamped to +12V of the power supply voltage, and the voltage of the coil of the relay is protected from exceeding the specification requirement; the third diode D3 can accelerate the conduction of the PNP transistor Q3.

A first resistor R1 is connected between the control terminal of the third switching transistor circuit 105 and the control terminal of the second switching transistor circuit 104. Specifically, the first resistor R1 is electrically connected in series between the drain of the fet Q2 and the base of the PNP transistor Q3. The first resistor R1 is the base resistor of the PNP transistor Q3, and provides the PNP transistor Q3 with driving current.

A second resistor R2 is connected between the control signal input terminal 101 and the control terminal of the second switching tube circuit 104. Specifically, the second resistor R2 is connected in series between the control signal input terminal 101 and the positive electrode of the first diode D1. The second resistor R2 and the first capacitor C1 form a delay, so that after Q1 is turned on, Q2 is turned on again.

The driving circuit 100 further includes a fourth resistor R4, a fifth resistor R5, and a fourth diode D4. The fourth resistor R4 is connected in series between the control signal input terminal 101 and the base of the NPN transistor Q1, and the fourth diode D4 and the fifth resistor R5 are connected in series and then connected in reverse parallel between the two ends of the third resistor R3. The fourth resistor R4 is used as an on driving resistor of the Q1, the fifth resistor R5 and the fourth diode D4 are used as an off driving circuit of the Q1, and quick turn-off is achieved.

The driving circuit 100 further includes a second capacitor C2, and the second capacitor C2 is electrically connected between the power terminal 102 and ground. The second capacitor C2 serves as an energy storage voltage stabilizing capacitor, and provides a stable voltage during the RELAY switching process.

The operating principle of the driving circuit 100 is as follows:

when the control signal M _ RELAY is high, the NPN transistor Q1 is turned on, the +12V of the power supply terminal 102 forms a loop through the RELAY coil 300 and the NPN transistor Q1, and the current of the RELAY coil 300 rises; when the control signal M _ RELAY is low, the NPN transistor Q1 is turned off, the voltage of the RELAY coil 300 is reversed, a loop is formed through the second diode D2 and the PNP transistor Q3, and the current of the RELAY coil 300 decreases. Delay is set for driving of the field effect transistor Q2 through the delay circuit 106, so that the field effect transistor Q2 is conducted after the NPN type triode Q1 is conducted for 5us, the field effect transistor Q2 provides a turn-off loop, and meanwhile, the conduction loop is not influenced. After the NPN type triode Q1 is turned off, the field effect transistor Q2 is kept on through the first diode D1, and a RELAY turn-off loop is formed. When RELAY is closed, PWM is set to be 100% in the first 100ms, so that the operating voltage of RELAY meets the specification requirement of + 12V; when RELAY works normally, about 50% of PWM can be set according to the specification requirement of the RELAY, and the voltage is kept to be + 6V; when the NTC sensor of the inverter detects that the ambient temperature of the RELAY accessory is low, 35% of PWM can be set according to specification requirements, and the voltage +4.2V is kept, so that the purposes of reducing the driving power consumption of the RELAY and improving the efficiency of the whole machine are achieved. The circuit has good consistency, when the relay is replaced to reduce the cost, the duty ratio of PWM can be directly modified by software according to the requirement of the holding voltage of a new relay, and the portability is good.

The embodiment further provides a self-test circuit 400 of the relay driving circuit 100; further, the relay system of the grid-connected inverter according to the present embodiment further includes the self-test circuit 400, and whether or not the drive circuit 100 of the main relay RY1 and the drive circuit 200 of the sub relay RY2 are abnormal is detected by the self-test circuit 400. Referring to fig. 4, the self-test circuit 400 includes two test terminals 401; one of the detection terminals 401 is used for detecting the voltage of the second end of the coil 300 of the main relay RY1, that is, the voltage of the collector of the NPN type triode Q1 in the driving circuit 100 of the main relay RY 1; the other detection terminal 401 is used to detect the voltage of the second terminal of the coil 300 of the sub relay RY2, that is, the voltage of the collector of the NPN transistor Q1 in the drive circuit 200 of the sub relay RY 2. The self-checking circuit 400 further includes a comparison circuit, the two detection terminals 401 are electrically connected to an input terminal of the comparison circuit, the other input terminal of the comparison circuit is connected to the first power voltage, an output terminal of the comparison circuit is electrically connected to a self-checking signal output terminal 404, the self-checking signal output terminal 404 can be electrically connected to a control module, specifically, a DSP chip of the photovoltaic grid-connected inverter, and whether the relay driving circuit 100 is abnormal or not is determined by the DSP chip.

Specifically, the comparison circuit specifically includes a first comparator U1 and a second comparator U2. The two detection terminals 401 are connected to the inverting input terminal of the first comparator U1; the non-inverting input terminal of the first comparator U1 is connected to a first power source 402 to receive a voltage, the voltage of the first power source 402 is equal to the action voltage of the relay, i.e., + 12V; the output terminal of the first comparator U1 is connected to the non-inverting input terminal of the second comparator U2 through a resistor R21. The inverting input terminal of the second comparator U2 is grounded, and the output terminal of the second comparator U2 is connected to the self-test signal output terminal 404 through a resistor R22.

The negative terminal of the first power source 402 is grounded, the positive terminal thereof is connected in series with the two resistors R23 and then grounded, and the non-inverting input terminal of the first comparator U1 is connected to the middle point of the two resistors R23. The self-test circuit 400 further includes a resistor R24, wherein one end of the resistor R24 is connected to the positive electrode of the first power source 402, and the other end is connected to the middle point between the test terminal 401 and the inverting input terminal of the first comparator U1.

The positive electrode of the first power source 402 is connected in series with two resistors R25 and then grounded, and the inverting input terminal of the second comparator U2 is connected to the middle point of the two resistors R25. The self-test circuit 400 further includes a resistor R26 and a capacitor C21, wherein one end of the resistor R26 is connected to the positive electrode of the first power source 402, the other end of the resistor R26 is connected to one end of the capacitor C21, and the other end of the capacitor C21 is grounded.

The self-test circuit 400 also includes a second power supply 403 and a resistor R27. The voltage of the second power supply 403 is less than the voltage of the first power supply 402, specifically 3.3V; the positive electrode of the second power supply 403 is connected to one end of the resistor R27, and the negative electrode is grounded. The other end of the resistor R27 is connected to the output terminal of the second comparator U2 and the midpoint of the resistor R22.

The self-test circuit 400 further includes a capacitor C22, one end of which is connected to the intermediate point between the resistor R22 and the self-test signal output terminal 404, and the other end of which is grounded.

A diode D21 is connected between each sense terminal 401 and the inverting input of the first comparator U1. Specifically, the cathode of the diode D21 is connected to the detection terminal 401, and the anode is connected to the inverting input terminal of the first comparator U1.

The conventional relay self-checking scheme does not consider the situation of drive damage, so that the relay self-checking judgment is mistaken, and the relay drive circuit 100 is damaged because the relay body is probably not damaged. The self-checking circuit 400 of the relay driving circuit 100 of the embodiment can detect whether the relay driving circuit 100 is damaged or not, so as to really detect whether the relay body is damaged or not, thereby meeting the requirement of safety regulations. The principle of the self-test circuit 400 is to detect the voltage at one end of the relay coil 300, i.e. the voltage at the collector of the NPN transistor Q1 in the driving circuit 100, and determine whether the signal is normal through a comparator. Before the inverter is connected to the grid, the RELAY driving circuit is subjected to self-checking, the DSP PWM is subjected to DUTY of 100% firstly, the DSP _ RLY signal is detected to be high, then the DSP PWM is subjected to DUTY of 0% in PWM, and the DSP _ RLY signal is detected to be low, so that the RELAY driving circuit 100 is judged to be normal; otherwise, it is determined that the driving circuit 100 is abnormal

The principle of the self-checking circuit is to use the most core part of the driving circuit, i.e. the collector of Q1, as a detection point. The detection signals of the main and auxiliary RELAYs are all connected to the detection circuit and are connected to the inverting input end of the comparator U1 through a diode D21. When the control PWM signal 101 of the DSP is 100% DUTY, the main and auxiliary release detection signals 401 are low, the inverting input terminal of the comparator U1 is pulled low by the diode D21, the U1 outputs high, and the comparator U2 outputs high. When the control PWM signal 101 of the DSP is 0% DUTY, the main and sub RELAY detection signal 401 is high, the diode D21 is turned off, the comparator U1 outputs low, and the comparator U2 outputs low. When the output signal of the U2, namely the 404DSP sampling signal, does not meet the logic, the RELAY driving circuit is abnormal.

The method for driving the relay by adopting the driving circuit comprises the following steps:

initially, in a set maintaining time, enabling a control signal with a first duty ratio to be input into a control signal output terminal so as to enable the relay to work normally;

when the relay works normally, the control signal terminal outputs a control signal with a second duty ratio, and the second duty ratio is smaller than the first duty ratio;

when the relay normally works and the ambient temperature near the relay is lower than the set temperature, the control signal terminal outputs a control signal with a third duty ratio, and the third duty ratio is smaller than the second duty ratio.

The first duty cycle may be 100%, the second duty cycle 50%, and the third duty cycle 35%.

Specifically, when the RELAY is in a closing action, the PWM is set to 100% in the first 100ms (action voltage maintaining time required in the RELAY specification), so that the action voltage of the RELAY meets the specification requirement of + 12V; when RELAY works normally, setting about 50% PWM according to the specification requirement of the RELAY, and keeping the voltage at + 6V; when the NTC temperature sensor of the inverter detects that the ambient temperature of the RELAY accessory is low, 35% of PWM is set according to the specification requirement, and the voltage is kept to be + 4.2V.

The method for self-checking the relay driving circuit by adopting the relay self-checking circuit comprises the following steps:

collecting the voltage of the second end of the relay coil, sending the voltage into a comparison circuit, and outputting a self-checking signal through the comparison circuit;

when the control signal is a control signal with a first duty ratio, the self-checking signal is at a low level, and when the control signal is a control signal with a second duty ratio, the self-checking signal is at a high level, and the relay drive circuit is judged to be normal; otherwise, the relay drive circuit is abnormal. Wherein the second duty cycle is less than the first duty cycle; the first duty cycle can be selected as 100%, and the second duty cycle can be selected as 0.

The embodiment adopts the DSP PWM control technology to realize controllable voltage of the RELAY coil, and maximally reduces the drive holding voltage according to the detection of the RELAY ambient temperature and the working state of the RELAY, thereby realizing the maximum improvement of the efficiency.

In this embodiment, a loop for switching off the RELAY is realized by using the driving delay, and a path is provided for controlling the voltage of the RELAY coil.

In this embodiment, a self-checking circuit of the relax drive is designed according to the relax drive circuit, and whether the relax drive is abnormal is judged firstly through self-checking, so that whether a fault exists in the relax body can be 100% determined, and the safety requirement is met.

The above embodiments are only for illustrating the technical concept and features of the present invention, and are preferred embodiments, which are intended to enable persons skilled in the art to understand the contents of the present invention and to implement the present invention, and thus, the protection scope of the present invention cannot be limited thereby. All equivalent changes or modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.

Claims

1. A self-checking circuit of a relay, for detecting whether a driving circuit of the relay is abnormal, the self-checking circuit comprising:

2. The self-test circuit of claim 1, wherein the comparison circuit comprises a first comparator and a second comparator, the test terminal being connected to an inverting input of the first comparator; the positive phase input end of the first comparator is connected with a first power supply; the output end of the first comparator is connected to the positive phase input end of the second comparator; and the inverting input end of the second comparator is grounded, and the output end of the second comparator is connected to the self-checking signal output terminal.

3. The self-test circuit according to claim 2, wherein the output terminal of the first comparator is connected to the non-inverting input terminal of the second comparator through a resistor.

4. The self-test circuit according to claim 2, wherein the output terminal of the second comparator is connected to the self-test signal output terminal through a resistor.

5. The self-test circuit according to claim 2, wherein the negative electrode of the first power supply is grounded, the positive electrode of the first power supply is grounded after being connected in series with a resistor R23, and the positive electrode of the first power supply is connected to the positive input terminal of the first comparator through the resistor R23, the self-test circuit further comprises a resistor R24, one end of the resistor R24 is connected to the positive electrode of the first power supply, and the other end of the resistor R24 is connected to a middle point between the detection terminal and the negative input terminal of the first comparator; and/or the negative pole of the first power supply is grounded, the positive pole of the first power supply is grounded after being connected with the resistor R25 in series, and the positive pole of the first power supply is connected to the inverting input end of the second comparator through the resistor R25.

6. The self-test circuit according to claim 2, further comprising a resistor R26 and a capacitor C21, wherein one end of the resistor R26 is connected to the positive electrode of the first power supply, the other end of the resistor R26 is connected to one end of the capacitor C21, and the other end of the capacitor C21 is grounded.

7. The self-test circuit according to claim 1 or 2, further comprising a diode having a cathode connected to the test terminal and an anode connected to the input of the comparison circuit.

8. The self-test circuit according to claim 1 or 2, further comprising a second power supply and a resistor, wherein the positive pole of the second power supply is connected to one end of the resistor, and the negative pole of the second power supply is grounded; the other end of the resistor is connected to the self-test signal output terminal.

9. A relay system of a grid-connected inverter, comprising a relay connected in series between an inverter side and a grid side, the relay being driven by a drive circuit, characterized in that the relay system further comprises a self-test circuit for detecting whether the drive circuit is abnormal, the self-test circuit employing the self-test circuit according to any one of claims 1 to 8;

10. The relay system according to claim 9, wherein the first switching tube circuit comprises an NPN transistor having a base electrically connected to the control signal input terminal, a collector electrically connected to the second end of the relay coil, and an emitter grounded;