CN214591353U - Frequency doubling system - Google Patents
Frequency doubling system Download PDFInfo
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- CN214591353U CN214591353U CN202023000065.6U CN202023000065U CN214591353U CN 214591353 U CN214591353 U CN 214591353U CN 202023000065 U CN202023000065 U CN 202023000065U CN 214591353 U CN214591353 U CN 214591353U
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Abstract
The application provides a frequency doubling system, it can be used to carry out the multiplication and output the output signal that has multiplication frequency to the frequency of the input signal of inputing said frequency doubling system, this frequency doubling system includes square wave generating device, band-pass filter and output amplification device, and square wave generating device's output is connected with band-pass filter's input, and band-pass filter's output is connected with output amplification device's input. In the frequency doubling system, the high-precision frequency multiplication of the input signal can be realized through a low-cost frequency doubling structure, so that the frequency doubling system meets the requirements of low cost and high precision performance.
Description
Technical Field
The application relates to the technical field of frequency multiplication, in particular to a frequency multiplication system based on an inductor and a capacitor.
Background
The communication industry needs to rely on radio frequency communication, the required high-precision radio frequency local oscillator frequency is higher and higher along with the increase of communication frequency, but the cost of the high-precision crystal oscillator is correspondingly increased along with the increase of frequency, so that a frequency multiplier circuit with low cost, high precision, low phase noise and high performance is needed.
Fig. 1 shows a circuit diagram of a conventional frequency synthesizer, and fig. 2 shows a circuit multiplication diagram of the conventional frequency synthesizer. As shown in fig. 1, the frequency synthesizer adopts an analog phase-locked loop structure, the phase-locked loop includes a Phase Detector (PD), a Loop Filter (LF), and a Voltage Controlled Oscillator (VCO), and the phase detector in the phase-locked loop structure is also called a phase comparator, and is configured to detect a phase difference between an input signal and an output signal, convert the detected phase difference signal into a voltage signal (ud (t)) and output the voltage signal, form a control voltage (uc (t)) of the voltage controlled oscillator after the signal passes through a low-pass filter, and control the frequency of the output signal of the oscillator.
As shown in fig. 2, the frequency-doubling circuit of the phase-locked loop divides the frequency of the input feedback and feeds the frequency divided feedback to the phase detector, so as to adjust the output frequency, thereby achieving frequency doubling. The above implementation of frequency multiplication is easy to implement in a large frequency range, but due to the presence of the feedback circuit, jitter in the output frequency is caused.
In the prior art there is also a frequency multiplier that generates higher harmonics of the fundamental frequency by means of a step recovery diode, a special varactor, which presents a low resistance when forward biased and a high impedance when reverse biased and hardly varies with the bias voltage. Under the excitation of an external alternating voltage, the diode is equivalent to a narrow pulse generator, rich harmonic waves can be generated, and high-order frequency multiplication can be completed by utilizing the diode. In the prior art, a comb spectrum generator is usually used as a harmonic frequency generator, but because an output frequency of the comb spectrum generator is an integral multiple of an input frequency, wherein the output frequency includes both an odd component and an even component, for a frequency multiplier requiring only the odd component, an output-end frequency selection filter is required for screening, and therefore, the requirement on the performance of the frequency selection filter in a frequency multiplier circuit is high.
At present, a frequency doubling technical scheme capable of meeting the requirements of low cost and high precision is urgently needed.
SUMMERY OF THE UTILITY MODEL
According to the present application, there is provided a frequency doubling system for multiplying a frequency of an input signal input to the frequency doubling system and outputting an output signal having the multiplied frequency, the frequency doubling system is characterized by comprising a square wave generating device, a band-pass filtering device and an output amplifying device, wherein the output end of the square wave generating device is connected with the input end of the band-pass filtering device, the output end of the band-pass filtering device is connected with the input end of the output amplifying device, the square wave generating device receives an input signal and processes the received input signal so as to convert the input signal into a square wave signal, the band-pass filtering device receives the square wave signal and processes the square wave signal so as to output a limiting signal, the frequency of the limiting signal is integral multiple of the frequency of the input signal, and an output amplifying means receiving the definition signal and amplifying the definition signal to output an output signal having a multiplied frequency.
In the frequency doubling system according to the embodiment of the application, the square wave generating device comprises a signal input end, a comparator, a first resistor, a second resistor and a signal output end, wherein the reverse input end of the comparator is connected with one end of the first resistor, one end of the second resistor and the signal input end, the output end of the comparator is connected with the signal output end, the non-inverting input end of the comparator is connected with a reference voltage, the other end of the first resistor is connected with a power supply, and the other end of the second resistor is grounded.
In the frequency doubling system according to the embodiment of the present application, the square wave generator further includes a first capacitor, and the first capacitor is disposed between the inverting input terminal and the signal input terminal of the comparator.
In the frequency multiplication system according to the embodiment of the application, the square wave generation device comprises a single threshold comparison circuit.
In the frequency doubling system according to the embodiment of the present application, the output amplifying device includes a signal input terminal, an amplifier, a first inductor, a third resistor, and a signal output terminal, the input terminal of the amplifier is connected to the signal input terminal, the output terminal of the amplifier is connected to one end of the third resistor via the first inductor and to the signal output terminal, and the other end of the third resistor is connected to the power supply.
In the frequency doubling system according to the embodiment of the present application, the output amplifying device further includes a third capacitor, and the third capacitor is disposed between the input terminal and the signal input terminal of the amplifying device.
In the frequency doubling system according to the embodiment of the present application, the output amplifying device further includes a fourth capacitor, and the fourth capacitor is disposed between the output terminal of the amplifying device and the signal output terminal.
In the frequency doubling system according to the embodiment of the present application, the frequency doubling system further includes a noise reduction bandpass filter device, an input end of the noise reduction bandpass filter device is connected to an output end of the output amplification device, and the noise reduction bandpass filter device receives the output signal with the multiplied frequency output by the output amplification device and filters the output signal with the multiplied frequency.
In the frequency doubling system according to the embodiment of the application, each of the band-pass filter device and the noise reduction band-pass filter device includes a high-pass filter circuit and a low-pass filter circuit, the high-pass filter circuit includes a second inductor, a second capacitor, a fifth capacitor and a sixth capacitor, and the low-pass filter circuit includes a seventh capacitor, an eighth capacitor, a third inductor, a ninth capacitor, a tenth capacitor and an eleventh capacitor.
In the frequency doubling system according to the embodiment of the application, the frequency doubling system further includes a printed circuit board, and the signal input terminal of the square wave generator, the comparator, the first resistor, the second resistor, the first capacitor, the signal output terminal, and the signal input terminal of the output amplifier, the first inductor, the third resistor, the third capacitor, the fourth capacitor, the signal output terminal, the second inductor, the second capacitor, the fifth capacitor, and the sixth capacitor of the band-pass filter, the seventh capacitor, the eighth capacitor, the third inductor, the ninth capacitor, the tenth capacitor, and the eleventh capacitor of the noise reduction band-pass filter are all bonded to the printed circuit board.
In the frequency doubling system, high-precision frequency multiplication of input signals can be realized through the low-cost frequency doubling system, and the frequency doubling system can further meet the requirements of low cost and high precision performance.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the application and together with the description serve to explain the principles of the application.
Fig. 1 shows a circuit diagram of a prior art frequency synthesizer;
fig. 2 shows a circuit frequency multiplication schematic diagram of a conventional frequency synthesizer;
FIG. 3 shows a block diagram of a frequency doubling system according to an embodiment of the present application;
FIG. 4 shows a block diagram of a frequency doubling system according to another embodiment of the present application;
FIG. 5 shows a circuit diagram of a square wave generating device in a frequency doubling system according to an embodiment of the present application;
FIG. 6 shows a circuit diagram of a square wave generating device in a frequency doubling system according to another embodiment of the present application;
FIG. 7 shows a circuit diagram of an output amplification device in a frequency doubling system according to an embodiment of the present application;
fig. 8 shows a circuit diagram of an output amplifying device in a frequency doubling system according to another embodiment of the present application;
fig. 9 is a circuit diagram illustrating a specific example of a band-pass filtering device and a noise reduction filter in a frequency doubling system according to an embodiment of the present application;
FIG. 10 is a diagram illustrating simulation results of bandpass filtering devices in a frequency doubling system according to an embodiment of the present application;
FIG. 11 is a diagram illustrating simulation results of a noise reduction filter in a frequency doubling system according to an embodiment of the present application;
fig. 12a shows a schematic time domain diagram of an input signal when a 10MHz signal is input to a frequency doubling system according to an embodiment of the present application;
fig. 12b shows a schematic diagram of the frequency domain of an input signal when a 10MHz signal is input to a frequency doubling system according to an embodiment of the present application;
fig. 12c shows a time domain diagram of an output signal when a 10MHz signal is input to a frequency doubling system according to an embodiment of the present application; and
fig. 12d shows a frequency domain diagram of an output signal when a signal of 10MHz is input to the frequency doubling system according to an embodiment of the present application.
Detailed Description
The present application will be described in further detail with reference to the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are for purposes of illustration only and are not to be construed as limitations of the present application. For the sake of brevity, the same or similar reference numerals are used for the same or similar apparatus/method steps in the description of the various embodiments of the present application.
In addition, the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
According to an embodiment of the present application, there is provided a frequency doubling system for doubling a frequency of an input signal input to the frequency doubling system and outputting an output signal having the doubled frequency. Fig. 3 shows a block diagram of a frequency doubling system according to an embodiment of the present application. As shown in fig. 3, the frequency doubling system includes a square wave generator, a band-pass filter and an output amplifier, an output terminal of the square wave generator is connected to an input terminal of the band-pass filter, an output terminal of the band-pass filter is connected to an input terminal of the output amplifier, the square wave generator receives an input signal and processes the received input signal to convert the input signal into a square wave signal, the band-pass filter receives the square wave signal and processes the square wave signal to output a limit signal, wherein a frequency of the limit signal is an integer multiple of a frequency of the input signal, and the output amplifier receives the limit signal and amplifies the limit signal to output an output signal with a multiplied frequency.
The frequency multiplication system converts an input signal into a square wave signal only containing odd harmonics through the square wave generation device, then the band-pass filter device extracts the odd harmonics in the square wave signal, so that the required frequency is screened out, the screened out frequency is low-phase noise, low-jitter and high-precision frequency, and the frequency is further amplified through the output amplification device to finally obtain a signal which has certain signal intensity and is amplified to a certain frequency multiple. The frequency doubling system provided by the embodiment is a frequency doubling circuit capable of realizing high precision, low phase noise and high performance; in addition, because the signal input by the square wave generating device does not have the interference of even harmonic component, the performance requirement on the band-pass filtering device can be reduced, and the design and manufacturing cost of the band-pass filtering device can be further reduced, thereby reducing the cost of a frequency doubling system.
Fig. 4 shows a block diagram of a frequency doubling system according to another embodiment of the present application. As shown in fig. 4, in the frequency doubling system according to this embodiment, a noise reduction bandpass filtering device is further included. The input end of the noise reduction band-pass filter device is connected with the output end of the output amplification device, and the noise reduction band-pass filter device receives the output signal with the multiplied frequency output by the output amplification device and filters the output signal with the multiplied frequency. After the output amplifying device, a stage of filtering is added, so that in-band spurious can be guaranteed, and interference brought by the amplifier can be reduced.
The square wave generator of the frequency doubling system according to the embodiment of the present application is further described with reference to fig. 5. Fig. 5 shows a circuit diagram of a square wave generating device in a frequency doubling system according to an embodiment of the present application. As shown in fig. 5, the square wave generator includes a signal input terminal, a comparator, a first resistor R1, a second resistor R2, and a signal output terminal, wherein an inverting input terminal of the comparator is connected to one end of the first resistor R1, one end of the second resistor R2, and the signal input terminal, an output terminal of the comparator is connected to the signal output terminal, a non-inverting input terminal of the comparator is connected to a reference voltage, the other end of the first resistor R1 is connected to a power supply, and the other end of the second resistor R2 is grounded. According to an embodiment of the present application, for the comparator of the square wave generating device, a high speed comparator with a rise-fall time less than 2.6ns can be selected, and the high speed comparator can ensure that the harmonic wave with sufficient frequency passes through.
In the frequency doubling system as shown in fig. 5, by providing the first resistor R1 and the second resistor R2, the static operating point of the comparator can be set, and by comparing the input signal with a reference voltage, the input signal in any form can be converted into a square wave signal and output.
Fig. 6 shows a circuit diagram of a square wave generating device in a frequency doubling system according to another embodiment of the present application. As shown in fig. 6, in the square wave generator according to this embodiment, the square wave generator further includes a first capacitor C1, the first capacitor C1 is disposed between the inverting input terminal of the comparator and the signal input terminal, and the first capacitor C1 can isolate the input signal from direct current.
In another embodiment according to the present application, the square wave generator includes a single threshold comparison circuit, which can be applied in the square wave generator for converting an input signal into a square wave signal for output.
The following describes an output amplifying device in a frequency doubling system according to an embodiment of the present application with reference to fig. 7. Fig. 7 is a circuit diagram of an output amplifying apparatus in a frequency doubling system according to an embodiment of the present application. As shown in fig. 7, the output amplifying device includes a signal input terminal, an amplifier, a first inductor L1, a third resistor R3, and a signal output terminal, the input terminal of the amplifier is connected to the signal input terminal, the output terminal of the amplifier is connected to one end of the third resistor R3 via the first inductor L1 and to the signal output terminal, and the other end of the third resistor R3 is connected to the power supply. In one embodiment according to the present application, the output amplifying device amplifies the limited signal output by the band-pass filtering device to generate an output signal with a multiplied frequency and an output power of 0dBm, and the output amplifying device also plays roles of buffering and isolating.
In the output amplifying device of the frequency doubling system as shown in fig. 7, the third resistor R3 and the first inductor L1 are used for supplying power to the amplifier and isolating the output signal.
Fig. 8 shows a circuit diagram of an output amplifying apparatus in a frequency doubling system according to another embodiment of the present application. As shown in fig. 8, in this embodiment, the output amplifying device further includes a third capacitor C3 and a fourth capacitor C4, the third capacitor C3 is disposed between the input terminal and the signal input terminal of the amplifier, and the fourth capacitor C4 is disposed between the output terminal and the signal output terminal of the amplifier. In the circuit of the output amplifying device, a third capacitor C3 is used for isolating direct current of an input signal of the output amplifying device, and a fourth capacitor C4 is used for isolating direct current of an output signal of the output amplifying device.
In the frequency doubling system according to the embodiment of the present application, the band-pass filter and the noise reduction band-pass filter may use the same circuit, where the circuit includes a high-pass filter circuit and a low-pass filter circuit, the high-pass filter circuit includes a second inductor, a second capacitor, a fifth capacitor and a sixth capacitor, and the low-pass filter circuit includes a seventh capacitor, an eighth capacitor, a third inductor, a ninth capacitor, a tenth capacitor and an eleventh capacitor. The band-pass filtering device consists of a capacitor and an inductor, selects a signal with limited frequency from square wave signals to output, and generates enough inhibition on other unnecessary signals, thereby achieving the purpose of screening. Fig. 9 is a circuit diagram illustrating a specific example of a bandpass filtering device and a noise reduction filter in a frequency doubling system according to an embodiment of the present application. Fig. 10 is a diagram illustrating simulation results of a bandpass filtering apparatus in a frequency doubling system according to an embodiment of the present application. Fig. 10 is a simulation result diagram of the input signal being a 10MHz square wave signal and the 50MHz output signal being screened out, and as shown in the drawing, the bandpass filter device can ensure that the insertion loss of the adjacent harmonic is above 50 dB. The noise reduction band-pass filter device consists of a capacitor and an inductor, the circuit is the same as that of the band-pass filter device, and in a frequency doubling system, if the noise reduction band-pass filter device is not arranged, the output end is doped with amplifier noise. Fig. 11 is a diagram illustrating simulation results of a noise reduction filter in a frequency doubling system according to an embodiment of the present application. As shown in fig. 11, the noise reduction bandpass filter apparatus can ensure that the insertion loss of adjacent harmonics is over 100 dB.
In another embodiment according to the present application, the frequency doubling system further includes a printed circuit board, and the signal input terminal, the comparator, the first resistor, the second resistor, the first capacitor, and the signal output terminal of the square wave generator, the signal input terminal, the amplifier, the first inductor, the third resistor, the third capacitor, the fourth capacitor, and the signal output terminal of the output amplifier, and the second inductor, the second capacitor, the fifth capacitor, the sixth capacitor, the seventh capacitor, the eighth capacitor, the third inductor, the ninth capacitor, the tenth capacitor, and the eleventh capacitor of the band-pass filter and the noise reduction band-pass filter are all bonded to the printed circuit board. The frequency doubling system is produced and manufactured by adopting an SMT (surface mount technology) chip mounting process, the manufacturing process is simple, the frequency doubling system is a capacitance-inductance circuit, the stability is higher, and the frequency doubling system can continuously work in an extreme working environment for a long time.
The applicant of the present application performs simulation tests on the frequency doubling system according to the embodiment of the present application to verify the feasibility and technical effects of the technical scheme proposed by the present application. Fig. 12a is a time domain diagram of an input signal when a signal of 10MHz is input in a frequency doubling system according to an embodiment of the present application, in fig. 12a, an x-axis represents time, and a Y-axis represents voltage; fig. 12b is a frequency domain diagram of an input signal when a signal of 10MHz is input in the frequency doubling system according to the embodiment of the present application; fig. 12c is a time domain diagram of an output signal when a 10MHz signal is input in the frequency doubling system according to the embodiment of the present application, in fig. 12c, the x-axis represents time, and the Y-axis represents voltage; fig. 12d shows a frequency domain diagram of an output signal when a signal of 10MHz is input in the frequency doubling system according to the embodiment of the present application. As shown in fig. 12a to 12d, after an input signal of 10MHz is input, a sine wave of which the output signal is 50MHz can be obtained, and other adjacent harmonic components are output to be 100dB smaller than 50MHz, so that it can be determined that high-precision frequency multiplication of the input signal can be achieved by using the frequency multiplication system provided by the embodiment of the present application.
In the description herein, reference to the description of the terms "one embodiment/mode," "some embodiments/modes," "example," "specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment/mode or example is included in at least one embodiment/mode or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to be the same embodiment/mode or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments/modes or examples. Furthermore, the various embodiments/aspects or examples and features of the various embodiments/aspects or examples described in this specification can be combined and combined by one skilled in the art without conflicting therewith.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
It should be understood by those skilled in the art that the above embodiments are only for clarity of explanation and are not intended to limit the scope of the present application. Other variations or modifications will occur to those skilled in the art based on the foregoing disclosure and are still within the scope of the present application.
Claims (10)
1. A frequency doubling system for doubling the frequency of an input signal input to the frequency doubling system and outputting an output signal with the doubled frequency, the frequency doubling system comprising a square wave generator, a band-pass filter and an output amplifier, the output of the square wave generator being connected to the input of the band-pass filter, the output of the band-pass filter being connected to the input of the output amplifier, the square wave generator receiving the input signal and processing the received input signal to convert the input signal into a square wave signal, the band-pass filter receiving the square wave signal and processing the square wave signal to output a limiting signal, the frequency of the limiting signal being an integer multiple of the frequency of the input signal, and the output amplifier receiving the limiting signal and amplifying the limiting signal to output the output signal with the doubled frequency And (6) outputting a signal.
2. The frequency doubling system of claim 1, wherein the square wave generator comprises a signal input terminal, a comparator, a first resistor, a second resistor, and a signal output terminal, wherein an inverting input terminal of the comparator is connected to one end of the first resistor, to one end of the second resistor, and to the signal input terminal, an output terminal of the comparator is connected to the signal output terminal, a non-inverting input terminal of the comparator is connected to a reference voltage, another end of the first resistor is connected to a power supply, and another end of the second resistor is grounded.
3. The frequency doubling system of claim 2, wherein the square wave generating device further comprises a first capacitor disposed between the inverting input of the comparator and the signal input.
4. The frequency doubling system of claim 1, wherein the square wave generating means comprises a single threshold comparison circuit.
5. The frequency doubling system of claim 3, wherein the output amplification means comprises a signal input, an amplifier, a first inductor, a third resistor, and a signal output, the input of the amplifier being connected to the signal input, the output of the amplifier being connected to one end of the third resistor via the first inductor and to the signal output, and the other end of the third resistor being connected to a power supply.
6. The frequency doubling system of claim 5, wherein the output amplification means further comprises a third capacitor disposed between the input of the amplification means and the signal input.
7. The frequency doubling system of claim 6, wherein the output amplification means further comprises a fourth capacitor, the fourth capacitor being disposed between the output of the amplification means and the signal output.
8. The frequency doubling system of claim 7, further comprising a noise reduction bandpass filtering means, an input of the noise reduction bandpass filtering means being connected to an output of the output amplifying means, and the noise reduction bandpass filtering means receiving and filtering the output signal with multiplied frequency output by the output amplifying means.
9. The frequency doubling system of claim 8, wherein the band pass filtering means and the noise reduction band pass filtering means each comprise a high pass filtering circuit and a low pass filtering circuit, the high pass filtering circuit comprising a second inductor, a second capacitor, a fifth capacitor and a sixth capacitor, and the low pass filtering circuit comprising a seventh capacitor, an eighth capacitor, a third inductor, a ninth capacitor, a tenth capacitor and an eleventh capacitor.
10. The frequency doubling system of claim 9, further comprising a printed circuit board, wherein the signal input terminal, the comparator, the first resistor, the second resistor, the first capacitor, the signal output terminal of the square wave generator, and the signal input terminal, the amplifier, the first inductor, the third resistor, the third capacitor, the fourth capacitor, and the signal output terminal of the output amplifier, the second inductor, the second capacitor, the fifth capacitor, and the sixth capacitor of the band-pass filter, the seventh capacitor, the eighth capacitor, the third inductor, the ninth capacitor, the tenth capacitor, and the eleventh capacitor of the noise reduction band-pass filter are all bonded to the printed circuit board.
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| CN202023000065.6U CN214591353U (en) | 2020-12-15 | 2020-12-15 | Frequency doubling system |
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| CN202023000065.6U CN214591353U (en) | 2020-12-15 | 2020-12-15 | Frequency doubling system |
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