CN214588854U - Display substrate and display device - Google Patents
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- CN214588854U CN214588854U CN202120120499.5U CN202120120499U CN214588854U CN 214588854 U CN214588854 U CN 214588854U CN 202120120499 U CN202120120499 U CN 202120120499U CN 214588854 U CN214588854 U CN 214588854U
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Abstract
The application provides a display substrate and display device, wherein the display substrate includes: a flexible substrate; the first auxiliary electrode is arranged on one side of the flexible substrate and is connected with a first power line; a pixel unit disposed on a side of the flexible substrate facing away from the first metal layer, the pixel unit comprising: the plurality of thin film transistors, the insulating layer and the second auxiliary electrode are arranged on one side, away from the first metal layer, of the flexible substrate, and the second auxiliary electrode is connected with a second power line; the plurality of thin film transistors comprise driving transistors, the source electrodes of the driving transistors are connected with the first auxiliary electrodes, the drain electrodes of the driving transistors are connected with the first electrodes of the light-emitting devices, and the second electrodes of the light-emitting devices are connected with the second auxiliary electrodes. According to the technical scheme, the distance between the first auxiliary electrode and the second auxiliary electrode is increased, the probability of poor short circuit can be reduced, and the yield and the reliability of products can be improved.
Description
Technical Field
The utility model relates to a show technical field, especially relate to a display substrate and display device.
Background
In the display technology of the thin film transistor driven LED (light Emitting diode), since the sensitivity of the driving current required for LED display is high, and the influence of the voltage drop of the auxiliary electrode on the driving current is large, a VDD auxiliary electrode and a VSS auxiliary electrode with a large area need to be manufactured in the LED display substrate, thereby reducing the wiring resistance and reducing the wiring voltage drop.
However, in the actual manufacturing process, a short circuit is easily generated between the VDD auxiliary electrode and the VSS auxiliary electrode with a large area, which causes the whole panel to fail to display normally, and seriously affects the yield and reliability of the display product.
SUMMERY OF THE UTILITY MODEL
The utility model provides a display substrate and display device to promote product yield and reliability.
In order to solve the above problem, the utility model discloses a display substrate, display substrate includes:
a flexible substrate;
the first metal layer is arranged on one side of the flexible substrate and comprises a first auxiliary electrode, and the first auxiliary electrode is connected with a first power line;
a pixel unit disposed on a side of the flexible substrate facing away from the first metal layer, the pixel unit comprising: the thin film transistors are arranged on one side, away from the first metal layer, of the flexible substrate, and the insulating layer and the second auxiliary electrode are stacked on one side, away from the flexible substrate, of the thin film transistors, the insulating layer is arranged close to the flexible substrate, and the second auxiliary electrode is connected with a second power line;
the plurality of thin film transistors comprise a driving transistor, the source electrode of the driving transistor is connected with the first auxiliary electrode, the drain electrode of the driving transistor is connected with the first electrode of the light-emitting device, and the second electrode of the light-emitting device is connected with the second auxiliary electrode.
In an optional implementation manner, a second metal layer and a flat layer are stacked between the flexible substrate and the pixel unit, the second metal layer is disposed close to the flexible substrate, the second metal layer includes a bridging electrode, the bridging electrode is connected to the first auxiliary electrode through a via disposed on the flexible substrate, and the bridging electrode is further connected to the source of the driving transistor.
In an alternative implementation, an orthographic projection of the first auxiliary electrode on the flexible substrate covers an orthographic projection of the bridging electrode on the flexible substrate.
In an alternative implementation, an orthographic projection area of the first auxiliary electrode on the flexible substrate is equal to an orthographic projection area of the bridging electrode on the flexible substrate.
In an alternative implementation, the thickness of the planarization layer is greater than or equal to 2 microns and less than or equal to 3 microns.
In an optional implementation manner, the first metal layer further includes a bonding electrode, the second metal layer further includes a signal lead, and the signal lead is connected to the bonding electrode through a via hole disposed on the flexible substrate.
In an alternative implementation, the driving transistor includes: the barrier layer, the shading layer, the buffer layer, the active layer, the grid insulating layer, the grid electrode, the interlayer dielectric layer and the source and drain electrodes are arranged on one side, away from the flexible substrate, of the flat layer in a laminated mode;
the barrier layer is arranged close to the flexible substrate, the insulating layer is arranged on one side, deviating from the flexible substrate, of the source drain electrode, the source drain electrode comprises a source electrode and a drain electrode of the driving transistor, and the source electrode of the driving transistor is connected with the bridging electrode through via holes formed in the interlayer dielectric layer, the grid insulating layer, the buffer layer, the barrier layer and the flat layer.
In an optional implementation manner, an orthographic projection of the light shielding layer on the flexible substrate covers an orthographic projection of the active layer of the driving transistor on the flexible substrate.
In an alternative implementation, the plurality of thin film transistors further includes a functional transistor, and an orthographic projection of the first auxiliary electrode on the flexible substrate covers an orthographic projection of an active layer of the functional transistor on the flexible substrate.
In an alternative implementation manner, an orthographic projection of the first auxiliary electrode on the substrate base plate is overlapped with an orthographic projection of the second auxiliary electrode on the substrate base plate.
In an alternative implementation, the first auxiliary electrode is used for transmitting a VDD signal, and the second auxiliary electrode is used for transmitting a VSS signal; or, the first auxiliary electrode is used for transmitting a VSS signal, and the second auxiliary electrode is used for transmitting a VDD signal.
In an optional implementation manner, the light emitting device is an LED, a Mini LED, a Micro LED, or an OLED.
In order to solve the above problem, the utility model discloses a display device, including any embodiment the display substrate.
Compared with the prior art, the utility model discloses a following advantage:
the technical scheme of this application provides a display substrates and display device, and wherein the display substrates includes: a flexible substrate; the first metal layer is arranged on one side of the flexible substrate and comprises a first auxiliary electrode, and the first auxiliary electrode is connected with a first power line; a pixel unit disposed on a side of the flexible substrate facing away from the first metal layer, the pixel unit comprising: the thin film transistors are arranged on one side, away from the first metal layer, of the flexible substrate, and the insulating layers and the second auxiliary electrodes are stacked on one sides, away from the flexible substrate, of the thin film transistors, the insulating layers are arranged close to the flexible substrate, and the second auxiliary electrodes are connected with a second power line; the plurality of thin film transistors comprise driving transistors, the source electrodes of the driving transistors are connected with the first auxiliary electrodes, the drain electrodes of the driving transistors are connected with the first electrodes of the light-emitting devices, and the second electrodes of the light-emitting devices are connected with the second auxiliary electrodes. According to the technical scheme, the first auxiliary electrode and the second auxiliary electrode are arranged on the two sides of the flexible substrate, the thin film transistor and the insulating layer, the distance between the first auxiliary electrode and the second auxiliary electrode is increased, the probability of poor short circuit between the first auxiliary electrode and the second auxiliary electrode can be greatly reduced, and the yield and the reliability of products are improved. In addition, the first auxiliary electrode is arranged on one side of the flexible substrate, which is far away from the second auxiliary electrode, so that compared with the existing structure, the manufacturing process of the insulating layer can be reduced at least, the process flow is simplified, and the product yield is further improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.
FIG. 1 is a schematic cross-sectional view of a display substrate according to the related art;
fig. 2 is a schematic cross-sectional view illustrating a display substrate according to an embodiment of the present disclosure;
FIG. 3 is a schematic plane structure diagram of a first auxiliary electrode according to an embodiment of the present disclosure;
FIG. 4 is a schematic plane structure diagram of a second auxiliary electrode provided in an embodiment of the present application;
fig. 5 is a schematic plan view illustrating a display substrate according to an embodiment of the present disclosure;
fig. 6 is a schematic cross-sectional view illustrating another display substrate provided in an embodiment of the present disclosure;
fig. 7 is a flowchart illustrating a method for manufacturing a display substrate according to an embodiment of the present disclosure.
Detailed Description
In order to make the above objects, features and advantages of the present invention more comprehensible, the present invention is described in detail with reference to the accompanying drawings and the detailed description.
In the related art, the VDD auxiliary electrode and the VSS auxiliary electrode are generally fabricated in large areas to reduce the influence of signal voltage drop on the LED current. The VDD auxiliary electrode is connected with a VDD signal wire, and the VSS auxiliary electrode is connected with a VSS signal wire. As shown in fig. 1, only a thin insulating layer (PLN2/PVX2) is disposed between the large-area VDD auxiliary electrode and VSS auxiliary electrode, which easily causes a short circuit between the VDD auxiliary electrode and the VSS auxiliary electrode, and further causes the whole panel not to be lit up, thereby affecting the yield and reliability of the product.
In order to solve the above problem, an embodiment of the present application provides a display substrate, and fig. 2 is a schematic cross-sectional structure diagram of the display substrate provided in this embodiment, where the display substrate includes: a flexible substrate 21; a first metal layer 22 disposed on one side of the flexible substrate 21, the first metal layer 22 including a first auxiliary electrode 221, the first auxiliary electrode 221 being connected to a first power line, as shown in fig. 3; at least one pixel cell disposed on a side of the flexible substrate 21 facing away from the first metal layer 22, the at least one pixel cell comprising: a plurality of thin film transistors (two thin film transistors 25 and 29 are exemplarily shown in fig. 2) disposed on a side of the flexible substrate 21 facing away from the first metal layer 22, and an insulating layer 23 and a second auxiliary electrode 24 stacked and disposed on a side of the plurality of thin film transistors facing away from the flexible substrate 21, the insulating layer 23 being disposed adjacent to the flexible substrate 21, and the second auxiliary electrode 24 being connected to a second power supply line, as shown in fig. 4.
Referring to fig. 2, the plurality of thin film transistors include a driving transistor 25, the driving transistor 25 for driving the light emitting device 26 to emit light, a source S1 of the driving transistor 25 connected to the first auxiliary electrode 221, a drain D1 of the driving transistor 25 connected to the first electrode 261 of the light emitting device 26, and a second electrode 262 of the light emitting device 26 connected to the second auxiliary electrode 24.
In this embodiment, the first power line and the first auxiliary electrode 221 may be made of the same material and disposed in the same layer. Referring to fig. 3, which shows a schematic plan structure of a first auxiliary electrode distribution, the first metal layer 22 may include a plurality of first auxiliary electrodes 221. Each of the first auxiliary electrodes 221 is connected to a first power line, and all the first auxiliary electrodes 221 are connected together through the first power line, ensuring voltage uniformity.
There may be various correspondences between the first auxiliary electrodes 221 and the pixel units. For example, one first auxiliary electrode 221 may be provided for one pixel unit (as shown in fig. 3), one first auxiliary electrode 221 may be provided for a plurality of pixel units, and so on. In practical applications, when a plurality of pixel units share one first auxiliary electrode 221, sources of driving transistors of the plurality of pixel units may be connected to each other, thereby ensuring uniformity of an operating voltage while reducing the number of punched holes.
It should be noted that the shape of the first auxiliary electrode 221 is not limited to the rectangle shown in fig. 3, the shape of the first auxiliary electrode 221 may be designed according to actual requirements, for example, the shape may be a regular polygon, a circle, or the like, or may be other irregular shapes, and may be solid or hollow, and the specific shape of the first auxiliary electrode 221 is not limited in this embodiment.
In this embodiment, the second power line may be made of the same material and disposed in the same layer as the second auxiliary electrode 24. Referring to fig. 4, which shows a schematic plan structure of a second auxiliary electrode distribution, one second auxiliary electrode 24 may be disposed in each pixel unit, and each second auxiliary electrode 24 is connected to a second power line. All the second auxiliary electrodes 24 are connected together through the second power supply line, ensuring voltage uniformity.
In this embodiment, an orthogonal projection of the first auxiliary electrode 221 on the flexible substrate 21 may overlap an orthogonal projection of the second auxiliary electrode 24 on the flexible substrate 21. Referring to fig. 5, a schematic plan view of a display substrate is shown. With the display substrate provided by the present embodiment, even if the orthographic projections of the first auxiliary electrode 221 and the second auxiliary electrode 24 on the flexible substrate 21 overlap, the risk of short circuit between the first auxiliary electrode 221 and the second auxiliary electrode 24 can be reduced because the distance between the first auxiliary electrode 221 and the second auxiliary electrode 24 is increased.
The connection between the source S1 of the driving transistor 25 and the first auxiliary electrode 221 can be implemented in various ways, for example, the connection can be made through a via hole disposed on a film layer (including the flexible substrate 21) between the source S1 of the driving transistor 25 and the first auxiliary electrode 221. In practical applications, the connection manner between the source electrode S1 of the driving transistor 25 and the first auxiliary electrode 221 may be determined according to the actual structure of the driving transistor 25. The structure of the driving transistor 25 may be a top gate structure, a bottom gate structure, a double gate structure, etc., and the specific structure of the driving transistor 25 is not limited in this embodiment. The following embodiments will be described in detail with reference to specific structures of the driving transistor 25.
The connection between the drain D1 of the driving transistor 25 and the first electrode 261 of the light emitting device 26 may be implemented in various ways, for example, when the first electrode 261 of the light emitting device 26 and the second auxiliary electrode 24 are disposed at the same layer, the connection between the first electrode 261 of the light emitting device 26 and the drain D1 of the driving transistor 25 may be through a via hole disposed on the insulating layer 23.
The connection between the second electrode 262 of the light emitting device 26 and the second auxiliary electrode 24 may be implemented in various ways. For example, when the second electrode 262 of the light emitting device 26 is disposed in the same layer as the second auxiliary electrode 24, the second electrode 262 of the light emitting device 26 may be in direct contact with the second auxiliary electrode 24.
In order to reduce the voltage drop, the material of the first metal layer 22 and the second auxiliary electrode 24 may be a metal material with a relatively low resistivity, such as aluminum or an aluminum alloy, copper or a copper alloy, and the like.
The display substrate provided by the embodiment has the advantages that the first auxiliary electrode and the second auxiliary electrode are arranged on the two sides of the flexible substrate, the thin film transistor and the insulating layer, the distance between the first auxiliary electrode and the second auxiliary electrode is increased, the short circuit risk between the first auxiliary electrode and the second auxiliary electrode can be reduced, and the product yield and the reliability are improved.
In addition, in the display substrate of the related art shown in fig. 1, it is necessary to provide: the thin film transistor comprises an insulating layer PLN/PVX between the thin film transistor and VDD, a metal layer VDD, an insulating layer PLN2/PVX2 between the VDD metal layer and a metal layer VSS and the metal layer VSS, namely two metal layers and two insulating layers are required to be arranged on the thin film transistor, the manufacturing process is complex, and the process time is long. In the display substrate provided in this embodiment, the first auxiliary electrode 211 is disposed on a side of the flexible substrate 21 away from the second auxiliary electrode 24, as shown in fig. 2, and an insulating layer 23 and a metal layer (the second auxiliary electrode 24) are disposed on the thin film transistor, so that the same function as that in fig. 1 can be achieved.
Therefore, the first auxiliary electrode is arranged on one side of the flexible substrate, which is far away from the second auxiliary electrode, compared with the existing structure, the manufacturing process of the insulating layer can be at least reduced, so that the process flow is simplified, the product yield is further improved, and the cost is reduced. When the first auxiliary electrode and the bonding electrode on the back of the display substrate are formed on the same layer (the following embodiments will be described in detail), a manufacturing process of a metal layer can be reduced, the process flow is further simplified, the product yield is improved, and the cost is reduced.
In an alternative implementation, the first power line may be a VDD (high-potential operating voltage) signal line, and the second power line may be a VSS (low-potential common voltage) signal line. In this implementation, the first auxiliary electrode 221 is used for transmitting a VDD signal, and the second auxiliary electrode 24 is used for transmitting a VSS signal. The first electrode 261 of the light emitting device 26 is an anode, and the second electrode 262 of the light emitting device 26 is a cathode.
In another alternative implementation, the first power line may be a VSS (common voltage of low potential) signal line, and the second power line may be a VDD (operating voltage of high potential) signal line. In this implementation, the first auxiliary electrode 221 is used for transmitting a VSS signal, and the second auxiliary electrode 24 is used for transmitting a VDD signal. The first electrode 261 of the light emitting device 26 is a cathode, and the second electrode 262 of the light emitting device 26 is an anode.
In this embodiment, the light emitting device 26 may be an LED, a Mini LED, a Micro LED, or an OLED.
In an alternative implementation, referring to fig. 2, a second metal layer 27 and a planarization layer 28 are stacked between the flexible substrate 21 and the pixel unit, the second metal layer 27 is disposed adjacent to the flexible substrate 21, the second metal layer 27 includes a bridging electrode 271, the bridging electrode 271 is connected to the first auxiliary electrode 221 through a via disposed on the flexible substrate 21, and the bridging electrode 271 is further connected to the source S1 of the driving transistor 25.
In this implementation manner, the bridging electrode 271 is connected to the first auxiliary electrode 221 and the source S1 of the driving transistor 25, so that the contact resistance and the voltage drop can be reduced, and in addition, the via depth and the process difficulty can be reduced.
In order to further reduce the pressure drop, the material of the second metal layer 27 may be a metal material with a relatively low resistivity, such as aluminum or an aluminum alloy, copper or a copper alloy, etc.
Wherein, the orthographic projection of the first auxiliary electrode 221 on the flexible substrate 21 can cover the orthographic projection of the bridging electrode 271 on the flexible substrate 21. That is, the orthographic projection of the crossover electrode 271 on the flexible substrate 21 is within the orthographic projection range of the first auxiliary electrode 221 on the flexible substrate 21.
To further reduce the voltage drop, as shown in fig. 6, the forward projection area of the first auxiliary electrode 221 on the flexible substrate 21 and the forward projection area of the crossover electrode 271 on the flexible substrate 21 may be equal. In this way, by increasing the area of the bridging electrode 271, the signal transmitted by the first auxiliary electrode 221 is transmitted by the two layers of metal of the bridging electrode 271 and the first auxiliary electrode 221 together, so that the resistance on the signal transmission path is reduced, and the signal voltage drop is reduced.
The orthographic projection of the first auxiliary electrode 221 on the flexible substrate 21 and the orthographic projection of the bridging electrode 271 on the flexible substrate 21 may partially overlap or completely overlap (as shown in fig. 6), and the embodiment is not limited.
When the forward projection area of the first auxiliary electrode 221 on the flexible substrate 21 is the same as the forward projection area of the crossover electrode 271 on the flexible substrate 21, in order to avoid generating parasitic capacitance or electrode coupling between the crossover electrode 271 and a metal layer in the thin film transistor, the thickness of the planarization layer 28 may be greater than or equal to 2 micrometers and less than or equal to 3 micrometers. By increasing the thickness of the planarization layer 28, the distance between the crossover electrode 271 and each metal layer in the thin film transistor is increased, thereby avoiding the influence of parasitic capacitance or electrode coupling.
In an alternative implementation, referring to fig. 2, the driving transistor 25 may include: the barrier layer 251, the light shielding layer 252, the buffer layer 253, the active layer 254, the gate insulating layer 255, the gate electrode 256, the interlayer dielectric layer 257 and the source/drain electrode 258 are stacked on the side of the planarization layer 28 away from the flexible substrate 21; the blocking layer 251 is disposed close to the flexible substrate 21, the insulating layer 23 is disposed on a side of the source-drain electrode 258 away from the flexible substrate 21, the source-drain electrode 258 includes a source S1 and a drain D1 of the driving transistor 25, and the source S1 of the driving transistor 25 and the bridging electrode 271 may be connected through vias disposed on the interlayer dielectric layer 257, the gate insulating layer 255, the buffer layer 253, the blocking layer 251, and the planarization layer 28.
Specifically, referring to fig. 2, the source S1 of the driving transistor 25 may be connected to the gate metal layer 210 through a via on the interlayer dielectric layer 257, the gate metal layer 210 is connected to the light shielding layer metal 211 through a via on the gate insulating layer 255 and the buffer layer 253, and the light shielding layer metal 211 is connected to the crossover electrode 271 through a via on the barrier layer 251 and the planarization layer 28. The connection mode between the source S1 of the driving transistor 25 and the bridging electrode 271 can reduce contact resistance, reduce voltage drop, and reduce via depth and process difficulty.
The gate metal layer 210 may be formed simultaneously with the gate electrode 256, and the light-shielding layer metal 211 may be formed simultaneously with the light-shielding layer 252.
In order to protect the active layer 254 of the driving transistor 25 from the illumination, the orthographic projection of the light shielding layer 252 on the flexible substrate 21 may cover the orthographic projection of the active layer 254 of the driving transistor 25 on the flexible substrate 21. Thus, the light-shielding layer 252 can protect the driving transistor 25 from light, thereby further improving product reliability.
It should be noted that the barrier layer 251, the light-shielding layer 252, and the buffer layer 253 in the structure of the driving transistor 25 are not essential, and one or several of them may be selectively provided according to actual needs.
In order to protect the active layers of the other thin film transistors from illumination, in an alternative implementation, referring to fig. 2, the plurality of thin film transistors may further include the functional transistor 29, and an orthographic projection of the first auxiliary electrode 221 on the flexible substrate 21 may cover an orthographic projection of the active layer 291 of the functional transistor 29 on the flexible substrate 21. Thus, the first auxiliary electrode 221 can protect the active layer of the functional transistor 29 from the light, further improving the product reliability.
The driving circuit of the pixel unit may include a plurality of thin film transistors, such as at least one of a switching transistor, a compensation transistor, a reset transistor, and a driving transistor.
In this embodiment, the functional transistor 29 may include one or more of thin film transistors included in the driver circuit, that is, the functional transistor 29 may include one or more of switching transistors, compensation transistors, reset transistors, driver transistors, and the like.
In particular implementation, the utility model discloses people still find, AM LED (Active Matrix Light Emitting Diode) splicing technique falls into two types: lateral bending connection technology and flexible backboard punching technology. The lateral bending connection technology is that a thin film transistor is manufactured on the front side of glass, electrode wiring and binding electrodes are manufactured on the back side of the glass, and finally the thin film transistor and the electrode wiring are laterally connected.
Therefore, in order to further reduce the process difficulty, in an alternative implementation, referring to fig. 2, the first metal layer 22 may further include the bonding electrode 222, and the second metal layer 27 may further include a signal lead 272, and the signal lead 272 and the bonding electrode 222 are connected through a via hole provided on the flexible substrate 21.
The signal trace 272 may be a trace of a data signal, a gate signal, a VDD signal, or a VSS signal.
In the present embodiment, as shown in fig. 3, the flexible substrate 21 may be divided into a middle region and a peripheral region located at the periphery of the middle region. An orthogonal projection of the first auxiliary electrode 221 in the first metal layer 22 on the flexible substrate 21 may be located in the middle region, and an orthogonal projection of the binding electrode 222 in the first metal layer 22 on the flexible substrate 21 may be located in the peripheral region. Of course, the specific positions of the first auxiliary electrode 221 and the binding electrode 222 may be set according to practical situations, and this embodiment does not limit this.
In this implementation, a flexible backplane punching technology is adopted, that is, a first metal layer 22 is first fabricated on a glass substrate, the first metal layer 22 includes a binding electrode 222 and a first auxiliary electrode 221, then a flexible substrate 21, a second metal layer 27, a flat layer 28 and a pixel unit are sequentially fabricated on the first metal layer 22, the second metal layer 27 includes a signal lead 272 and a bridging electrode 271, the signal lead 272 and the binding electrode 222 are connected through a via hole arranged on the flexible substrate 21, and the bridging electrode 271 and the first auxiliary electrode 221 are connected through another via hole arranged on the flexible substrate 21; when the pixel unit and the LED electrode are manufactured, a flat layer can be coated to expose the LED electrode; then, the glass substrate is peeled off to expose the first auxiliary electrode 221 and the bonding electrode 222, and then the subsequent bonding and assembling processes are performed. The flexible backboard punching technology is adopted, double-sided technology and lateral connection are not needed, the technology difficulty is low, the feasibility is high, and frameless display can be achieved.
Another embodiment of the present application further provides a display device including the display substrate according to any one of the embodiments.
The display device in this embodiment may be: any product or component with a 2D or 3D display function, such as a display panel, electronic paper, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator and the like.
Another embodiment of the present application further provides a method for manufacturing a display substrate, and referring to fig. 7, the method includes:
step 701: a first metal layer is formed on one side of the flexible substrate, the first metal layer includes a first auxiliary electrode, and the first auxiliary electrode is connected with a first power line.
Step 702: forming a pixel unit on a side of the flexible substrate facing away from the first metal layer, the pixel unit including: the thin film transistors are arranged on one side, away from the first metal layer, of the flexible substrate, and the insulating layers and the second auxiliary electrodes are stacked on one sides, away from the flexible substrate, of the thin film transistors, the insulating layers are arranged close to the flexible substrate, and the second auxiliary electrodes are connected with a second power line; the plurality of thin film transistors comprise driving transistors, the source electrodes of the driving transistors are connected with the first auxiliary electrodes, the drain electrodes of the driving transistors are connected with the first electrodes of the light-emitting devices, and the second electrodes of the light-emitting devices are connected with the second auxiliary electrodes.
In an optional implementation manner, step 701 may specifically include: firstly, providing a hard substrate; then forming a first metal layer on the hard substrate; a flexible substrate is then formed on the side of the first metal layer facing away from the rigid substrate. In this implementation, after step 702, the method may further include: and peeling the hard substrate to obtain the display substrate.
In an optional implementation manner, before step 702, the method may further include: sequentially stacking a second metal layer and a flat layer on one side of the flexible substrate, which is far away from the first metal layer, wherein the second metal layer comprises a bridging electrode and a signal lead, the bridging electrode is connected with the first auxiliary electrode through a via hole arranged on the flexible substrate, the bridging electrode is also connected with a source electrode of the driving transistor, and the signal lead is connected with the binding electrode through a via hole arranged on the flexible substrate; correspondingly, step 702 may specifically include: a pixel cell is formed on a side of the planarization layer facing away from the flexible substrate.
Specifically, a first metal layer including a binding electrode and a first auxiliary electrode may be first patterned on a hard substrate such as a glass substrate; then, sequentially manufacturing a flexible substrate such as a Polyimide (PI) and a second metal layer on the first metal layer, wherein the second metal layer comprises a signal lead and a bridging electrode, the signal lead is connected with the binding electrode through a via hole arranged on the flexible substrate, and the bridging electrode is connected with the first auxiliary electrode through another via hole arranged on the flexible substrate; then, manufacturing a flat layer and a pixel unit on the second metal layer; when the pixel unit and the LED electrode are manufactured, a flat layer can be coated to expose the LED electrode; and then stripping the glass substrate to expose the first auxiliary electrode and the binding electrode, and then carrying out binding and assembling processes.
The display substrate described in any of the above embodiments can be prepared by using the preparation method provided in this embodiment, and the structure and the beneficial effects of the prepared display substrate can refer to the description of the foregoing embodiments, which are not repeated herein.
The embodiment of the application provides a display substrate and display device, wherein the display substrate includes: a flexible substrate; the first metal layer is arranged on one side of the flexible substrate and comprises a first auxiliary electrode, and the first auxiliary electrode is connected with a first power line; a pixel unit disposed on a side of the flexible substrate facing away from the first metal layer, the pixel unit comprising: the thin film transistors are arranged on one side, away from the first metal layer, of the flexible substrate, and the insulating layers and the second auxiliary electrodes are stacked on one sides, away from the flexible substrate, of the thin film transistors, the insulating layers are arranged close to the flexible substrate, and the second auxiliary electrodes are connected with a second power line; the plurality of thin film transistors comprise driving transistors, the source electrodes of the driving transistors are connected with the first auxiliary electrodes, the drain electrodes of the driving transistors are connected with the first electrodes of the light-emitting devices, and the second electrodes of the light-emitting devices are connected with the second auxiliary electrodes. According to the technical scheme, the first auxiliary electrode and the second auxiliary electrode are arranged on the two sides of the flexible substrate, the thin film transistor and the insulating layer, the distance between the first auxiliary electrode and the second auxiliary electrode is increased, the probability of poor short circuit between the first auxiliary electrode and the second auxiliary electrode can be greatly reduced, and the yield and the reliability of products are improved. In addition, the first auxiliary electrode is arranged on one side of the flexible substrate, which is far away from the second auxiliary electrode, so that compared with the existing structure, the manufacturing process of the insulating layer can be reduced at least, the process flow is simplified, and the product yield is further improved.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The display substrate and the display device provided by the present invention are introduced in detail, and the principle and the implementation of the present invention are explained by applying specific examples, and the descriptions of the above examples are only used to help understanding the method and the core idea of the present invention; meanwhile, for the general technical personnel in the field, according to the idea of the present invention, there are changes in the specific implementation and application scope, to sum up, the content of the present specification should not be understood as the limitation of the present invention.
Claims (13)
1. A display substrate, comprising:
a flexible substrate;
the first metal layer is arranged on one side of the flexible substrate and comprises a first auxiliary electrode, and the first auxiliary electrode is connected with a first power line;
a pixel unit disposed on a side of the flexible substrate facing away from the first metal layer, the pixel unit comprising: the thin film transistors are arranged on one side, away from the first metal layer, of the flexible substrate, and the insulating layer and the second auxiliary electrode are stacked on one side, away from the flexible substrate, of the thin film transistors, the insulating layer is arranged close to the flexible substrate, and the second auxiliary electrode is connected with a second power line;
the plurality of thin film transistors comprise driving transistors, the source electrodes of the driving transistors are connected with the first auxiliary electrodes, the drain electrodes of the driving transistors are connected with the first electrodes of the light-emitting devices, and the second electrodes of the light-emitting devices are connected with the second auxiliary electrodes.
2. The display substrate according to claim 1, wherein a second metal layer and a flat layer are stacked between the flexible substrate and the pixel unit, the second metal layer is disposed adjacent to the flexible substrate, the second metal layer includes a jumper electrode, the jumper electrode is connected to the first auxiliary electrode through a via provided in the flexible substrate, and the jumper electrode is further connected to the source of the driving transistor.
3. The display substrate of claim 2, wherein an orthographic projection of the first auxiliary electrode on the flexible substrate covers an orthographic projection of the bridging electrode on the flexible substrate.
4. The display substrate of claim 2, wherein an orthographic area of the first auxiliary electrode on the flexible substrate is equal to an orthographic area of the bridging electrode on the flexible substrate.
5. The display substrate of claim 4, wherein the planarization layer has a thickness greater than or equal to 2 microns and less than or equal to 3 microns.
6. The display substrate of claim 2, wherein the first metal layer further comprises a bonding electrode, and the second metal layer further comprises a signal lead, and the signal lead is connected to the bonding electrode through a via hole disposed on the flexible substrate.
7. The display substrate according to claim 2, wherein the driving transistor comprises: the barrier layer, the shading layer, the buffer layer, the active layer, the grid insulating layer, the grid electrode, the interlayer dielectric layer and the source and drain electrodes are arranged on one side, away from the flexible substrate, of the flat layer in a laminated mode;
the barrier layer is arranged close to the flexible substrate, the insulating layer is arranged on one side, deviating from the flexible substrate, of the source drain electrode, the source drain electrode comprises a source electrode and a drain electrode of the driving transistor, and the source electrode of the driving transistor is connected with the bridging electrode through via holes formed in the interlayer dielectric layer, the grid insulating layer, the buffer layer, the barrier layer and the flat layer.
8. The display substrate according to claim 7, wherein an orthographic projection of the light shielding layer on the flexible substrate covers an orthographic projection of the active layer of the driving transistor on the flexible substrate.
9. The display substrate according to any one of claims 1 to 8, wherein the plurality of thin film transistors further includes a functional transistor, and an orthogonal projection of the first auxiliary electrode on the flexible substrate covers an orthogonal projection of an active layer of the functional transistor on the flexible substrate.
10. The display substrate according to any one of claims 1 to 8, wherein an orthographic projection of the first auxiliary electrode on the flexible substrate overlaps with an orthographic projection of the second auxiliary electrode on the flexible substrate.
11. The display substrate according to any one of claims 1 to 8, wherein the first auxiliary electrode is for transmitting a VDD signal, and the second auxiliary electrode is for transmitting a VSS signal; or, the first auxiliary electrode is used for transmitting a VSS signal, and the second auxiliary electrode is used for transmitting a VDD signal.
12. The display substrate of any one of claims 1 to 8, wherein the light emitting device is an LED, a Mini LED, a Micro LED or an OLED.
13. A display device comprising the display substrate according to any one of claims 1 to 12.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120120499.5U CN214588854U (en) | 2021-01-15 | 2021-01-15 | Display substrate and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120120499.5U CN214588854U (en) | 2021-01-15 | 2021-01-15 | Display substrate and display device |
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| Publication Number | Publication Date |
|---|---|
| CN214588854U true CN214588854U (en) | 2021-11-02 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120120499.5U Active CN214588854U (en) | 2021-01-15 | 2021-01-15 | Display substrate and display device |
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| Country | Link |
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| CN (1) | CN214588854U (en) |
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- 2021-01-15 CN CN202120120499.5U patent/CN214588854U/en active Active
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