CN214412703U - Phase-locked loop device for signal frequency division - Google Patents
Phase-locked loop device for signal frequency division Download PDFInfo
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- CN214412703U CN214412703U CN202120715798.3U CN202120715798U CN214412703U CN 214412703 U CN214412703 U CN 214412703U CN 202120715798 U CN202120715798 U CN 202120715798U CN 214412703 U CN214412703 U CN 214412703U
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- 230000002093 peripheral effect Effects 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000003786 synthesis reaction Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
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Abstract
The utility model relates to a frequency synthesizer technical field specifically relates to a phase-locked loop device for signal frequency division, including phase discriminator, loop filter and the VCO that connects gradually, the signal feedback that the VCO produced to the phase discriminator, the phase discriminator carries out the N frequency division to input signal, carries out the R frequency division to the signal of VCO feedback, adopts this technical scheme, has realized the method as the frequency divider with the phase-locked loop, can carry out arbitrary frequency division to the signal to have advantages such as phase noise is good, stray low.
Description
Technical Field
The utility model relates to a frequency synthesizer technical field specifically relates to a phase-locked loop device for signal frequency division.
Background
The frequency synthesizer is a core component of an electronic system, and is widely applied to the fields of general instruments, radar systems, satellite communication, remote measurement and remote control and the like, the essence of frequency synthesis is that four arithmetic operations of addition, subtraction, multiplication and division of frequency are realized through circuits such as a frequency mixer, a frequency multiplier, a frequency divider and the like, the frequency divider is a basic circuit for realizing division, and the current frequency division schemes are two: one is to divide the signal with an integrated frequency divider and the other is to divide with a DDS (direct digital frequency synthesis).
The integrated frequency divider has an integer frequency divider and a fractional frequency divider. The integer frequency divider can only carry out integer frequency division on signals and has the defects of limited frequency division ratio adjusting range, larger frequency division stepping, high frequency division harmonic wave and the like; the fractional frequency divider is usually based on a sigma-delta technology, the phase noise is seriously deteriorated, and the DDS scheme has the defects of large power consumption, high cost, and difficulty in controlling indexes such as spurious phase noise and the like.
SUMMERY OF THE UTILITY MODEL
The present invention overcomes the above-mentioned drawbacks of the prior art, and provides a phase-locked loop device for frequency division, which can divide the frequency of a signal arbitrarily.
The utility model provides a pair of a phase-locked loop device for signal frequency division, including phase discriminator, loop filter and the VCO that connects gradually, the signal feedback that the VCO produced to the phase discriminator, the phase discriminator carries out the N frequency division to input signal, carries out the R frequency division to the signal of VCO feedback.
The further improvement is that: the phase detector is a chip HMC703 and peripheral circuits thereof.
The further improvement is that: the loop filter is an RC integral filter.
The further improvement is that: the VCO is a chip DCRO2024-5 and peripheral circuits thereof.
Through adopting foretell technical scheme, the beneficial effects of the utility model are that: the utility model provides a phase-locked loop device for signal frequency division breaks traditional doubling of frequency phase-locked loop concept, has proposed the reference input and the VCO feedback input reversal of phase-locked loop, has realized the method as the frequency divider with the phase-locked loop, can carry out arbitrary frequency division to the signal to have advantages such as phase noise is good, stray low.
Drawings
Fig. 1 is a schematic circuit block diagram of the present invention;
fig. 2 is a schematic circuit diagram of the present invention.
Detailed Description
The invention will be described in further detail with reference to the following drawings and detailed description:
as shown in fig. 1 and fig. 2, the utility model provides a pair of a phase-locked loop device for signal frequency division, including phase discriminator, loop filter and the VCO that connects gradually, the signal feedback that the VCO produced is to the phase discriminator, the phase discriminator carries out the N frequency division to input signal, carries out the R frequency division to the signal of VCO feedback, the phase discriminator is chip HMC703 and peripheral circuit, the loop filter is RC integral filter, the VCO is chip DCRO2024-5 and peripheral circuit.
The utility model discloses the theory of operation is: when outside
Inputting the signal into a phase discriminator to carry out N frequency division; after passing through a loop filter, and then entering VCO oscillation
The signal is divided into two paths, and one path is output; the other path enters a phase discriminator again to carry out R frequency division; the phase discriminator performs phase discrimination on the signals respectively subjected to frequency division of N, R to generate error signals, and the signals are tuned to the VCO frequency after passing through the loop filter to lock the whole phase-locked loop;
after the loop is locked, according to the phase-locked loop principle, the following relation is provided:
for a general phase-locked loop, N
R and N, R are flexible in value, and can realize arbitrary frequency division of signals.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Numerous variations and modifications can be made by those skilled in the art without departing from the principles of the invention, which should also be considered as within the scope of the invention.
Claims (4)
1. A phase-locked loop device for frequency division of a signal, comprising: the phase detector comprises a phase detector, a loop filter and a VCO which are connected in sequence, wherein a signal generated by the VCO is fed back to the phase detector, the phase detector performs N frequency division on an input signal, and R frequency division is performed on a signal fed back by the VCO.
2. A phase locked loop device for frequency division of a signal as recited in claim 1, wherein: the phase detector is a chip HMC703 and peripheral circuits thereof.
3. A phase locked loop device for frequency division of a signal as recited in claim 1, wherein: the loop filter is an RC integral filter.
4. A phase locked loop device for frequency division of a signal as recited in claim 1, wherein: the VCO is a chip DCRO2024-5 and peripheral circuits thereof.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120715798.3U CN214412703U (en) | 2021-04-08 | 2021-04-08 | Phase-locked loop device for signal frequency division |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120715798.3U CN214412703U (en) | 2021-04-08 | 2021-04-08 | Phase-locked loop device for signal frequency division |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214412703U true CN214412703U (en) | 2021-10-15 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120715798.3U Expired - Fee Related CN214412703U (en) | 2021-04-08 | 2021-04-08 | Phase-locked loop device for signal frequency division |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN214412703U (en) |
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2021
- 2021-04-08 CN CN202120715798.3U patent/CN214412703U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20211015 |