CN214409193U - Semiconductor device testing apparatus - Google Patents

Abstract

The utility model discloses a semiconductor device test equipment, semiconductor device test equipment includes: the testing board is electrically connected with the semiconductor device to be tested; an inner chamber in which the semiconductor device under test is disposed; an outer chamber surrounding the inner chamber, the inner chamber including an inlet port and an outlet port in communication with the outer chamber; the heating device is arranged in the inner chamber and used for generating heat; and a fan disposed in the outer chamber, the fan for providing an air flow from the outer chamber through the air inlet into the inner chamber. The semiconductor device testing equipment forms a double-layer structure through the combination design of the inner chamber and the outer chamber, so that the temperature rise process can be accelerated, interaction with external normal-temperature air is not needed, the constant-temperature effect is better realized, and a better testing environment can be provided.

Description

Semiconductor device testing apparatus

Technical Field

The utility model relates to the field of electronic technology, especially, relate to a semiconductor device test equipment.

Background

Commercial memories can normally operate at ambient temperatures of 0 to 70 degrees. Therefore, during the testing of commercial memories, screening tests are performed at a target temperature of about 85 degrees. In order to achieve the testing conditions for the memory, a high temperature enclosure or box is currently typically used to provide the desired target temperature. Specifically, in the high-temperature hood or the high-temperature box, heat may be generated using a heat generating sheet, and the temperature in the hood or the box may be raised to reach a target temperature by free diffusion of the heat.

However, if the heating sheet is used for self-heating diffusion, the temperature rising speed is relatively slow, which may affect the working efficiency of the memory screening test.

In view of the above, how to quickly raise the ambient temperature in the high temperature hood or the high temperature box to the target temperature and make the target temperature more stable has become a subject of related researchers.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to solve the problem that prior art exists, provide a semiconductor device test equipment, its combination design through inner room and ectotheca forms bilayer structure to can accelerate the intensification process, and need not to interact with outside normal atmospheric temperature air, with realize the constant temperature effect better, thereby can provide better test environment.

According to the utility model discloses an aspect, the utility model provides a semiconductor device test equipment includes: the testing board is electrically connected with the semiconductor device to be tested; an inner chamber in which the semiconductor device under test is disposed; an outer chamber surrounding the inner chamber, the inner chamber including an inlet port and an outlet port in communication with the outer chamber; the heating device is arranged in the inner chamber and used for generating heat; and a fan disposed in the outer chamber, the fan for providing an air flow from the outer chamber through the air inlet into the inner chamber.

On the basis of the technical scheme, the method can be further improved.

Optionally, the inlet is provided in a top wall of the inner chamber.

Optionally, the exhaust port is provided at a lower end of a sidewall of the inner chamber.

Optionally, the test board is a motherboard, and the semiconductor device under test is a memory.

Optionally, the heating device is powered by a power source of the test board.

Optionally, the exhaust ports are two and disposed on opposite sidewalls of the inner chamber.

Optionally, the fan is disposed opposite the air inlet of the inner chamber.

Optionally, the heating means is provided at an upper end of the inner chamber.

Optionally, the inner chamber and the outer chamber have the same bottom wall, the bottom wall is provided with an opening, the test board is arranged outside the bottom wall, and the semiconductor device to be tested is arranged on the test board through the opening.

Optionally, the test plate serves as a bottom wall of the inner and outer chambers.

Optionally, the semiconductor device testing apparatus includes a temperature sensor disposed in the inner chamber to detect an ambient temperature of the inner chamber.

The utility model discloses a bilayer structure that the cooperation design of inner chamber and outer room formed to combine the produced hot-blast of heating device and fan, so that the ambient temperature of inner chamber and outer room reaches target temperature, thereby provides better test environment. Additionally, semiconductor device test equipment can accelerate the intensification process through the design of above-mentioned structure to need not to interact with outside normal atmospheric temperature air, whole link that adjusts the temperature can not produce the heat loss of initiative almost, thereby can realize rapid heating up and the effect of stable target temperature better.

Drawings

The technical solution and other advantages of the present invention will become apparent from the following detailed description of the embodiments of the present invention with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a semiconductor device testing apparatus according to an embodiment of the present invention.

Fig. 2 is a schematic diagram of an airflow cycle of the semiconductor device testing apparatus provided in the embodiment of the present invention.

Fig. 3 is a cross-sectional view of the semiconductor device testing apparatus provided in another embodiment of the present invention.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the embodiments described are only some embodiments of the invention, and not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by those skilled in the art without creative efforts belong to the protection scope of the present invention.

In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "connected" and "connected" are to be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present invention can be understood according to specific situations by those skilled in the art.

The following disclosure provides many different embodiments or examples for implementing different features of the invention. In order to simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Of course, they are merely examples and are not intended to limit the present invention. Furthermore, the present invention may repeat reference numerals and/or reference letters in the various examples, which have been repeated for purposes of simplicity and clarity and do not in themselves dictate a relationship between the various embodiments and/or arrangements discussed. In addition, the present disclosure provides examples of various specific processes and materials, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.

Fig. 1 is a schematic structural diagram of a semiconductor device testing apparatus according to an embodiment of the present invention. Fig. 2 is a schematic diagram of an airflow cycle of the semiconductor device testing apparatus provided in the embodiment of the present invention. Fig. 3 is a cross-sectional view of the semiconductor device testing apparatus provided in another embodiment of the present invention.

As shown in fig. 1 to 3, in an embodiment of the present invention, a semiconductor device testing apparatus 100 is provided. The semiconductor device testing apparatus 100 includes: a test board 110, to which the semiconductor device 132 to be tested is electrically connected; an inner chamber 121 in which the semiconductor device under test 132 is disposed; an outer chamber 122, said outer chamber 122 surrounding said inner chamber 121, said inner chamber 121 comprising an inlet port 160 and an outlet port 170 in communication with outer chamber 122; a heating device 140 disposed in the inner chamber 121 for generating heat; and a fan 150 (shown in fig. 3) disposed in the outer chamber 122, the fan 150 being configured to provide an airflow from the outer chamber 122 into the inner chamber 121 through the air inlet 160.

Specifically, the test board 110 is disposed to be electrically connected to the semiconductor device 132 under test. The test board 110 may be a motherboard, and the semiconductor device 132 to be tested is a memory. Thus, by the semiconductor device testing apparatus 100, it can be tested whether the memory satisfies the application condition. The application conditions may include ambient temperature, ambient humidity, stability, etc. In the present embodiment, the application condition refers to the ambient temperature.

Referring to fig. 1, the semiconductor device under test 132 is disposed in the inner chamber 121. The inner chamber 121 is surrounded by an outer chamber 122, and is configured such that the inner chamber 121 and the outer chamber 122 form a double-layered structure. The inner chamber 121 includes an inlet port 160 and an outlet port 170 in communication with the outer chamber 122. Specifically, in the present embodiment, the gas inlet 160 is disposed at a top wall of the inner chamber 121. The exhaust port 170 is provided at a lower end of a sidewall of the inner chamber 121. Further, the exhaust ports 170 may be two and disposed on opposite sidewalls of the inner chamber 121, respectively.

The inner chamber 121 and the outer chamber 122 have the same bottom wall provided with an opening. In this embodiment, the test board 110 is disposed outside the bottom wall. In some other embodiments, the test plate 110 can also serve as the bottom wall of the inner chamber 121 and the outer chamber 122.

Further, a semiconductor device 132 to be tested is disposed on the test board 110 via the opening on the bottom wall. Specifically, the semiconductor device 132 under test is a memory as shown in fig. 3, which can be inserted into the memory slot 131 and electrically connected to the test board 110, wherein the memory slot 131 is located at the opening position and is disposed on the test board 110, as shown in fig. 1 and fig. 2.

With continued reference to fig. 1-3, the heating device 140 is disposed at an upper end of the internal chamber 121. The heating device 140 is used to generate heat. In this embodiment, the heating device 140 may be a heating tube. Of course, in other embodiments, the heating device 140 may also be a resistance wire, an electric heating plate, a thick film heater, or other heating devices known to those skilled in the art. Further, the heating device 140 may be powered by the power source of the test board 110.

The fan 150 is disposed at a position opposite to the air inlet 160 of the inner chamber 121. The fan 150 is used to provide an airflow from the outer chamber 122 through the air inlet 160 into the inner chamber 121.

Since the heating device 140 is disposed at the upper end of the inner chamber 121 and the fan 150 is disposed at a position opposite to the air inlet 160 of the inner chamber 121, when both the heating device 140 and the fan 150 are operated, the temperature of the air flow generated by the fan 150 and entering the inner chamber 121 from the outer chamber 122 through the air inlet 160 is increased while flowing through the heating device 140, and the heated air flow continues to flow toward the lower end of the inner chamber 121 (as shown by arrow a in fig. 2), i.e., where the semiconductor device 132 under test is located, to the outer chamber 122 through the air outlet 170 connected to the outer chamber 122 through the inner chamber 121, and finally returns to the air inlet 160 opposite to the fan 150 (as shown by arrow B in fig. 2).

That is, the inner chamber 121, the outer chamber 122 and the test board 110 form a completely closed loop structure, so that when the airflow generated by the fan 150 is heated by the heating device 140 to form a hot airflow, and flows to the lower end of the inner chamber 121, the hot airflow fills the entire inner chamber 121 and also flows through the position of the semiconductor device 132 to be tested, and then the hot airflow flows to the outer chamber 122 through the exhaust ports 170 on the two side walls of the inner chamber 121, and flows back to the inlet again under the action of the wind force of the fan 150. As shown in fig. 2, the lower portion of the fan 150 is a hot air flow flowing toward the lower end of the inner chamber 121, and the upper portion of the fan 150 is a hot air flow entering the outer chamber 122 and flowing back to the air inlet 160, so that the air flows flowing through the inner chamber 121 and the outer chamber 122 maintain the smoothness of convection circulation, thereby achieving the target temperature of the ambient temperature of the inner chamber 121 and the outer chamber 122.

In this embodiment, the semiconductor device testing apparatus 100 includes a temperature sensor disposed in the inner chamber 121 to detect an ambient temperature of the inner chamber 121. Of course, in some other embodiments, temperature sensors may be disposed in both the inner chamber 121 and the outer chamber 122.

Compared with the prior art, the test environment that semiconductor device test equipment 100 provided need not carry out the convection current with outside normal atmospheric temperature air and is mutual, and it is a totally enclosed and airflow circulation's test environment. Under this test environment, can make the required time of the ambient temperature of inner room 121 rise to high temperature (85 ℃) for current rising temperature mode spent 1/5 of time from normal atmospheric temperature (25 ℃), promptly through semiconductor device test equipment, the intensification efficiency is higher. Moreover, after the ambient temperature of the inner chamber 121 reaches the target temperature (e.g., 85 ℃ C.), the temperature of the inner chamber 121 and the outer chamber 122 can be kept substantially constant without frequent or continuous heating by the heating device 140 and consuming a large amount of power to achieve the effect of heat preservation since the test environment is a completely closed system.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The above detailed description is made on the semiconductor device testing equipment provided by the embodiment of the present invention, and the principle and the implementation of the present invention are explained by applying the specific embodiment herein, and the description of the above embodiment is only used to help understanding the technical scheme and the core idea of the present invention; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present invention in its various embodiments.

Claims (11)

1. A semiconductor device test apparatus, comprising:

the testing board is electrically connected with the semiconductor device to be tested;

an inner chamber in which the semiconductor device under test is disposed;

an outer chamber surrounding the inner chamber, the inner chamber including an inlet port and an outlet port in communication with the outer chamber;

the heating device is arranged in the inner chamber and used for generating heat; and

and the fan is arranged in the outer chamber and is used for providing airflow from the outer chamber to the inner chamber through the air inlet.

2. The semiconductor device testing apparatus of claim 1, wherein the inlet port is provided at a top wall of the inner chamber.

3. The semiconductor device testing apparatus of claim 1, wherein the exhaust port is provided at a lower end of a sidewall of the inner chamber.

4. The semiconductor device test apparatus according to claim 1, wherein the test board is a main board, and the semiconductor device under test is a memory.

5. The semiconductor device test apparatus of claim 4, wherein the heating device is powered by a power supply of the test board.

6. The semiconductor device testing apparatus of claim 1, 3 or 4, wherein the exhaust port is two and is provided at opposite sidewalls of the inner chamber.

7. The semiconductor device testing apparatus of claim 1, wherein the fan is disposed at a position opposite to the air inlet of the inner chamber.

8. The semiconductor device testing apparatus of claim 1, wherein the heating means is provided at an upper end of the inner chamber.

9. The semiconductor device testing apparatus according to claim 1, wherein the inner chamber and the outer chamber have a same bottom wall, the bottom wall is provided with an opening, the test board is disposed outside the bottom wall, and the semiconductor device under test is disposed on the test board through the opening.

10. The semiconductor device testing apparatus of claim 1, wherein the test board serves as a bottom wall of the inner chamber and the outer chamber.

11. The semiconductor device testing apparatus of claim 1, further comprising a temperature sensor disposed in the internal chamber for sensing an ambient temperature of the internal chamber.

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