CN214279172U - Intelligent driving system and driving equipment - Google Patents
Intelligent driving system and driving equipment Download PDFInfo
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- CN214279172U CN214279172U CN202023341635.8U CN202023341635U CN214279172U CN 214279172 U CN214279172 U CN 214279172U CN 202023341635 U CN202023341635 U CN 202023341635U CN 214279172 U CN214279172 U CN 214279172U
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Abstract
Disclosed are an intelligent driving system and a driving device, wherein a plurality of sensor interface components are used for respectively connecting a plurality of sensors; a computing device interface component for connecting with the computing device via an Ethernet; the processing component is connected with the plurality of sensor interface components and the computing equipment interface component and is used for processing the data collected by the sensors and received by the sensor interface components and sending the processed data to the computing equipment interface component; and the computing equipment is used for generating intelligent driving control information according to the data received through the computing equipment interface component.
Description
Technical Field
The disclosure relates to the technical field of intelligent driving, in particular to an intelligent driving system and driving equipment.
Background
With the development of intelligent driving technology, more and more sensors are added into an intelligent driving system, higher interface requirements are provided for computing equipment for intelligent driving, and the driving difficulty of the computing equipment is increased.
SUMMERY OF THE UTILITY MODEL
According to an aspect of the present disclosure, there is provided an intelligent driving system, including: the sensor interface components are used for being respectively connected with the sensors; a computing device interface component for connecting with the computing device via an Ethernet; the processing component is connected with the plurality of sensor interface components and the computing equipment interface component and is used for processing the data collected by the sensors and received by the sensor interface components and sending the processed data to the computing equipment interface component; and the computing equipment is used for generating intelligent driving control information according to the data received through the computing equipment interface component.
In combination with any one of the embodiments provided by the present disclosure, the sensor interface assembly includes a plurality of interfaces of the all-round-looking cameras and a plurality of interfaces of the forward-looking cameras, where the all-round-looking cameras are used to collect environmental information in different directions, and the all-round-looking cameras include cameras with different focal lengths; the processing component is used for compressing and coding the image data collected by the plurality of all-round cameras and the plurality of front-view cameras to obtain coded image data.
In connection with any embodiment provided by the present disclosure, the sensor interface assembly includes at least one radar interface.
In connection with any embodiment provided by the present disclosure, the system further includes a first interface circuit including one or more of the following; the current limiting circuit comprises a first transistor arranged between the output end of the sensor interface component and a general input/output interface of the processing component, and a first current limiting unit connected with the output end of the first transistor in series, wherein the first current limiting unit is used for disconnecting the transistor from a power supply when the current flowing through the first current limiting unit exceeds a first preset threshold; the pull-up resistor is arranged between the general input/output interface and a power supply; and the diode is arranged between the general input and output interface of the processing component and the input end of the sensor interface component and is a Schottky diode.
In connection with any embodiment provided by the present disclosure, the system further includes a second interface circuit including a first opto-coupler disposed between the output of the processing assembly and the input of the at least one sensor interface assembly, and a second opto-coupler disposed between the output of the at least one sensor interface assembly and the input of the processing assembly; the second interface circuit further comprises one or more of: a second transistor disposed between an output terminal of the first photocoupler and ground; the second current limiting unit is arranged between the output end of the second transistor and the input end of the sensor and is used for disconnecting the transistor from the input end of the sensor when the current flowing through the second current limiting unit exceeds a second preset threshold value; and the third transistor is arranged between the output end of the sensor and the input end of the second photoelectric coupler and is a depletion type field effect transistor.
In combination with any one of the embodiments provided by the present disclosure, the computing device interface component includes an ethernet communication component, and the ethernet communication component includes a physical interface transceiver unit, a first filtering unit, and an interface unit, where the physical interface transceiver unit outputs a differential signal pair via a first differential signal output terminal and a second differential signal output terminal; the first filtering unit comprises a first coil and a second coil which are symmetrically wound on the same magnetic core, the first coil and the second coil are same in size and number of turns, the input ends of the first coil and the second coil of the first filtering unit are used for receiving the differential signal pair, and the output ends of the first coil and the second coil are used for outputting the differential signal pair subjected to common mode rejection; the interface unit receives the common-mode-rejected differential signal pair via a first input port and the second input port.
In combination with any one of the embodiments provided by the present disclosure, an electrostatic discharge (ESD) protection unit is disposed between the first filtering unit and the interface unit, wherein the ESD protection unit includes: a first transient voltage suppressor diode connected between the first input port of the interface unit and a ground terminal; and the second transient voltage suppression diode is connected between the second input port of the interface unit and the ground terminal.
In combination with any one of the embodiments provided by the present disclosure, the ethernet communication assembly further includes: the first end of the first resistor and the first end of the second resistor are respectively connected with the first input port and the second input port of the interface unit, and the second end of the first resistor and the second end of the second resistor are connected to form a connecting end; the third resistor and the first capacitor are connected in parallel, the first ends of the third resistor and the first capacitor are connected with the connecting end, and the second ends of the third resistor and the first capacitor are connected with the grounding end.
In connection with any embodiment provided by the present disclosure, the processing component comprises a field programmable gate array FPGA.
In combination with any of the embodiments provided by the present disclosure, the system further includes a PPS interface component for acquiring a pulse-per-second PPS signal; and the processing component is further used for respectively generating synchronous trigger signals corresponding to the sensors according to the PPS signals so as to trigger the sensors to acquire signals, wherein the time delay of the synchronous trigger signal of each sensor corresponds to the physical link time delay of the sensor.
In connection with any embodiment provided by the present disclosure, the processing component is to sample the PPS signal with a first clock, count based on the first clock in response to detecting a rising edge of the PPS signal; and when the counting value reaches a set value corresponding to the sensor, outputting a synchronous trigger signal obtained by performing phase-locking frequency multiplication operation on the PPS signal, wherein the set value is determined according to the physical link delay of the sensor.
In connection with any embodiment provided by the present disclosure, the system further includes a GPS interface component for acquiring GPS signals; the processing component is also used for acquiring GPS time information according to the GPS signal and sending the GPS time information to the sensor interface components based on a network time protocol or a high-precision time synchronization protocol so as to carry out time service.
According to an aspect of the present disclosure, there is provided a travel device including a travel device main body and the smart driving system according to any one of the embodiments of the present disclosure.
The intelligent driving system of one or more embodiments of the present disclosure includes a plurality of sensor interface components, a computing device interface component, a processing component connected to the plurality of sensor interface components and the computing device interface component, and a computing device, wherein the plurality of sensor interface components are configured to be respectively connected to the plurality of sensors, the computing device interface component is configured to be connected to the computing device through an on-board ethernet, the processing component is configured to process data collected by the sensors and received through the sensor interface components, and send the processed data to the computing device interface component, so that the processed data is sent to the computing device through the on-board ethernet, and the computing device generates intelligent driving control information according to the received data, and the intelligent driving system can conveniently integrate a plurality of types of sensors, and the communication between the computing equipment interface component and the computing equipment is carried out through the vehicle-mounted Ethernet, so that the communication performance is improved, meanwhile, the requirement on an external interface of the computing equipment can be lowered, the drive development work of the computing equipment is reduced, and the hardware and software cost of the computing equipment is favorably lowered.
Drawings
In order to more clearly illustrate one or more embodiments or technical solutions in the prior art in the present specification, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments described in one or more embodiments of the present specification, and other drawings can be obtained by those skilled in the art without inventive exercise.
Fig. 1 is a schematic structural diagram of an intelligent driving system according to at least one embodiment of the present disclosure;
fig. 2A is a block diagram of a first interface circuit provided in at least one embodiment of the present disclosure;
fig. 2B is a block diagram of a second interface circuit provided in at least one embodiment of the present disclosure;
fig. 3A is a block diagram of an ethernet communication assembly according to at least one embodiment of the present disclosure;
fig. 3B is a block diagram of another ethernet communication assembly provided in at least one embodiment of the present disclosure;
fig. 3C is a block diagram of another ethernet communication component according to at least one embodiment of the present disclosure.
Detailed Description
In order to make those skilled in the art better understand the technical solutions in one or more embodiments of the present disclosure, the technical solutions in one or more embodiments of the present disclosure will be clearly and completely described below with reference to the drawings in one or more embodiments of the present disclosure, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all embodiments. All other embodiments that can be derived by one of ordinary skill in the art from one or more embodiments of the disclosure without making any creative effort shall fall within the scope of protection of the disclosure.
At least one embodiment of the present disclosure provides an intelligent driving system, which may be installed on a driving device, for generating intelligent driving control information according to a signal collected by a sensor provided in the driving device, so as to implement an intelligent driving function of the driving device, and the driving device may include an autonomous vehicle, a robot, and the like. As shown in FIG. 1, the intelligent driving system may include a plurality of sensor interface components 101, a computing device interface component 102, a processing component 103, and a computing device 104.
The plurality of sensor interface components 101 may be used to connect a plurality of sensors, respectively, for acquiring the collected information of the sensors; for example, when the sensor interface module 101 is connected to a sensor, the sensor interface module 101 may obtain information of an environment where the driving device is located, which is collected by the sensor.
The types of the plurality of sensor interface components 101 are different according to the types of the connected sensors, for example, an interface component connected to an image sensor for acquiring image acquisition information; the interface component connected with the inertia measurement unit is used for acquiring acceleration and angular velocity information; and an interface component connected with the radar sensor for acquiring radar signals, wherein the radar sensor may include at least one of a laser radar, a millimeter wave radar, an ultrasonic radar, and the like.
The computing device interface component 102 may be used to connect with a computing device through an in-vehicle ethernet. The computing device interface component may include an ethernet communication component, such as a 1000Mbps ethernet communication component, which has high speed, low latency, high security, and the like, and implements communication with the computing device through the ethernet communication component, compared with the related art in which communication between the sensor interface device and the computing device is performed through a PIC-E bus, on one hand, communication performance between the computing device interface component and the computing device may be improved, on the other hand, requirements for an interface of the computing device may be reduced, and development work of driving the computing device may be reduced.
The processing component 103 may be connected to the sensor interface component 101 and the computing device interface component 102, and is configured to process the data collected by the sensor received by the sensor interface component and send the processed data to the computing device interface component. The processing component 103 performs corresponding processing on data acquired by the sensor according to the type of the sensor connected to the sensor interface component 101.
In some embodiments, the processing component 103 may be a field programmable gate array FPGA.
The computing device 104 is configured to generate intelligent driving control information based on the received data. The computing device 104 may generate intelligent driving control information based on signals collected by sensors disposed on the vehicle, or may generate intelligent driving control information based on processed sensor signals, such as sensor signals that have been compressed, or the like.
In the disclosed embodiment, the intelligent driving system includes a plurality of sensor interface components, a computing device interface component, a processing component connected to the plurality of sensor interface components and the computing device interface component, and a computing device, wherein the plurality of sensor interface components are used for connecting to the plurality of sensors respectively, the computing device interface component is used for connecting to the computing device through an on-board ethernet, the processing component is used for processing the data collected by the sensors received through the sensor interface components and sending the processed data to the computing device interface component, so that the processed data is sent to the computing device through the on-board ethernet, the computing device generates intelligent driving control information according to the received data, and the intelligent driving system can conveniently integrate a plurality of types of sensors, and the communication between the computing equipment interface component and the computing equipment is carried out through the vehicle-mounted Ethernet, so that the communication performance is improved, meanwhile, the requirement on an external interface of the computing equipment can be lowered, the drive development work of the computing equipment is reduced, and the hardware and software cost of the computing equipment is favorably lowered.
In some embodiments, the sensor interface component 101 includes interfaces of a plurality of around looking cameras for collecting environmental information in different directions and interfaces of a plurality of front looking cameras including cameras with different focal lengths. For the image data collected by the plurality of around looking cameras and the plurality of forward looking cameras, the processing component 103 performs compression coding on the image data to obtain coded image data.
In one example, the sensor interface component supports 6-way camera input, including 4 around-looking cameras, namely fisheye cameras, which are responsible for collecting image information of the front, left, right and rear close distances of the driving device; the two-path front-view camera preferably adopts cameras with different focal lengths, for example, one of the two-path front-view camera can be a middle-focus camera used for collecting information of people, vehicles, signal lamps, traffic signs, roads and the like within a hundred meters, and the other one of the two-path front-view camera can be a long-focus camera used for collecting images outside the hundred meters. Images collected by the looking camera and the forward-looking camera are fused, namely images collected by the short-focus camera, the middle-focus camera and the long-focus camera are fused, so that the forward-looking detection range and the forward-looking detection distance are increased, and the problems of short detection distance and large blind area of the monocular camera are solved. The processing component 103 performs compression coding on the image data collected by the forward-looking camera and the around-looking camera, for example, compression coding is performed through an h.264/h.265 hard encoder, and sends the compressed image data to the computing device interface component, so that the computing interface component sends the compressed image data to the computing device through the vehicle-mounted ethernet.
In one example, the interface of the camera may be a GMSL (Gigabit Media Serial Line) interface, or a FAKRA interface.
In one example, the sensor interface component 101 can include an interface of at least one industrial camera, such as an in-vehicle ethernet interface.
In the embodiment of the disclosure, the intelligent driving system transmits the compressed image data to the computing device through the vehicle-mounted Ethernet, so that the data transmission amount is reduced, the requirement on bandwidth is reduced, and the communication performance is improved.
In some embodiments, the sensor interface assembly 101 includes at least one radar interface. The processing component can perform corresponding processing on the data acquired by the radar according to the type of the radar. Taking the sensor interface component including an interface of a laser radar as an example, the processing component 103 is configured to process point cloud information acquired by the laser radar to obtain a point cloud information processing result, and send the point cloud information processing result to the computing device interface component.
In one example, an interface component of the laser radar can be connected with the laser radar on the top of the traveling equipment, so that 3D point cloud information of the traveling equipment can be collected, and the problem that a camera cannot work under severe illumination conditions is solved.
The processing component 103 may also send the received data directly to the computing device interface component without processing the data collected by the radar.
In one example, the interface to the radar is an in-vehicle ethernet interface.
In the disclosed embodiment, the intelligent driving system further comprises a plurality of types of radar interfaces so as to integrate various types of radars into the driving device.
In some embodiments, the smart driving system may include a first interface circuit configured in a non-isolated manner. The processing component 103 performs signal transmission with the sensor interface component 101 of a laser radar, a millimeter wave radar, an ultrasonic radar, or the like through the first interface circuit.
In one example, the first interface circuit may include: the current limiting circuit comprises a first transistor arranged between the output end of the sensor interface component 101 and a general input/output interface of the processing component 103, and a first current limiting unit connected with the output end of the first transistor in series, wherein the first current limiting unit is used for disconnecting the transistor from a power supply when the current flowing through the first current limiting unit exceeds a first preset threshold value. The first current limiting unit is, for example, a self-recovery fuse, and can prevent the first transistor from being damaged by overcurrent under the condition that the power supply is not provided with a current limiting resistor. Wherein, in this example, the general purpose input output interface may be arranged to output signals to the sensor interface component.
In another example, the first interface circuit may further include: a pull-up resistor disposed between the general purpose input/output interface of the processing component 103 and the power supply. In the case that the output end of the first transistor is open collector Output (OC), the driving capability of the system can be improved by the arranged pull-up resistor.
In yet another example, the first interface circuit may further include: a diode, which may be a schottky diode, is disposed between the general purpose input output interface of the processing component 103 and the input of the sensor interface component. In this example, the general purpose input output interface may be arranged to input signals from a sensor.
Under the condition that a pull-up resistor is arranged between the general input/output interface and the power supply, the anode of the diode is connected with the input end of the processing component 103, and the cathode of the diode is connected with the general input/output interface. In this way, when the general input/output interface inputs a high voltage, the diode is turned off in the reverse direction, and the input terminal of the processing component 103 inputs a high level due to the action of the pull-up resistor, so that the voltage range of the input signal can be expanded, and the input of a wide-voltage signal can be realized.
In the disclosed embodiment, the driving capability of the system can be improved and the safety of the system can be ensured by configuring the first interface circuit configured in a non-isolated manner between the sensor interface component and the processing component.
Fig. 2A shows a pattern of a first interface circuit. Fig. 2A includes general purpose input/output interfaces GPIO1, GPIO2 of two processing components 103, input terminals GPI1, GPI2 of two sensor interface components 101, and output terminals GPO1, GPO2 of two sensor interface components 101. The first interface circuit will be described below by taking GPIO1, GPI1, and GPO1 as examples.
As shown in fig. 2A, the first interface circuit includes a first transistor 200A disposed between GPO1 and GPIO1, and a first current limiting unit 201A connected in series with a collector of the first transistor, the first current limiting unit 201A blowing out in the case where a current exceeds a first set threshold, thereby preventing the transistor 200A from burning out when the power supply source is not provided with a current limiting resistor. In the interface circuit, a pull-up resistor 202A is arranged between a power supply VCC and the GPIO1 to improve the driving capability of the system. A Schottky diode 203A is arranged between the GPIO1 and the GPIO1 and used for receiving a wide-voltage input signal of 0-40V.
In some embodiments, the smart driving system includes a second interface circuit configured in an isolated manner. The processing component 103 performs signal transmission with the sensor interface component 101 of a camera, an industrial camera, or the like through the second interface circuit.
In one example, the second interface circuit may include: a first opto-coupler disposed between the output of processing assembly 103 and the input of the plurality of sensor interface assemblies 101, and a second opto-coupler disposed between the output of the plurality of sensor interface assemblies 101 and the input of processing assembly 103.
In one example, the second interface circuit may further include: and the second transistor is arranged between the output end of the first photoelectric coupler and the ground so as to improve the driving capability of the system.
In one example, the second interface circuit may further include: and the second current limiting unit is arranged between the output end of the second transistor and the input end of the sensor interface component 101, and can disconnect the transistor from the input end of the sensor interface component 101 when the current flowing through the second current limiting unit exceeds a second preset threshold value, so that the second transistor is prevented from overcurrent damage. The second current limiting unit is, for example, a self-healing fuse or the like.
In one example, the second interface circuit may include: and the third transistor is arranged between the output end of the sensor interface component 101 and the input end of the second photoelectric coupler and is a depletion type field effect transistor. The source and the gate of the depletion type field effect transistor can be simultaneously connected to the input end of the second photoelectric coupler, and the field effect transistor can be conducted under the condition of micro external voltage input. By using the depletion type field effect transistor, the input range of voltage is expanded while the circuit is simplified.
In the disclosed embodiment, the second interface circuit configured in an isolation manner is configured between the sensor interface component and the processing component, so that the driving capability of the system can be improved, and the safety of the system can be guaranteed.
Fig. 2B shows a block diagram of a second interface circuit. FIG. 2B includes an input GPI0 and an output GPO0 of the processing component 103, as well as a first port OPTO _ OUT coupled to an input of the sensor interface component 101 and a second port OPTO _ IN coupled to an output of the sensor interface component 101; a first OPTO-coupler 210 connected between GPO0 and OPTO _ OUT, and a second OPTO-coupler 211 connected between GPI0 and OPTO _ IN.
As shown in fig. 2B, the second interface circuit includes a second transistor 212 disposed between the output terminal of the first photocoupler 210 and the ground OPTO _ GND to improve the driving capability of the system. The second interface circuit may include a second current limiting unit disposed between the output terminal of the second transistor 212 and the OPTO _ OUT, the second current limiting unit being configured to disconnect the second transistor 212 from the OPTO _ OUT when a current flowing through the second current limiting unit exceeds a second preset threshold, so as to prevent the second transistor 212 from being damaged by overcurrent.
The second interface circuit may include a third transistor 214 disposed between the OPTO _ IN and the input terminal of the second photo coupler 211, the third transistor 214 being a depletion mode field effect transistor. Wherein, the source and the gate of the depletion type field effect transistor may be simultaneously connected to the input terminal of the second photo coupler 211.
In the embodiment of the present disclosure, by providing the above-mentioned interface circuit between the sensor interface component 101 and the processing component 103, the driving capability of the system can be improved.
Fig. 3A is a schematic structural diagram of an ethernet communication module according to an embodiment of the present disclosure. As shown in fig. 3A, the ethernet communication device includes a physical interface transceiver unit 301, a first filter unit 302, and an interface unit 303.
The physical interface transceiving unit outputs a differential signal pair through a first differential signal output end and a second differential signal output end; the first filtering unit comprises a first coil and a second coil which are symmetrically wound on the same magnetic core, the first coil and the second coil are same in size and number of turns, the input ends of the first coil and the second coil of the first filtering unit are used for receiving the differential signal pair, and the output ends of the first coil and the second coil are used for outputting the differential signal pair subjected to common mode rejection; the interface unit receives the common-mode-rejected differential signal pair via a first input port and the second input port.
In the embodiment of the disclosure, the sensor data output by the processing component is forwarded through the physical interface transceiver unit, and the first filtering unit is used for performing common mode rejection on the differential signal pair output by the object interface transceiver unit, so that the common mode signal received by the interface unit is filtered, and the communication quality of the ethernet communication component is improved.
In some embodiments, an electrostatic discharge ESD protection unit 304 is disposed between the first filtering unit 302 and the interface unit 303. Fig. 3B shows the ethernet communication assembly including the ESD protection unit, as shown in fig. 3B, the ESD protection unit includes: a first transient voltage suppressing TVS diode 3041 connected between the first input port of the interface unit 303 and the ground terminal; the second TVS diode 3042 is connected between the second input port of the interface unit 303 and the ground.
In the embodiment of the disclosure, the TVS diode is connected between the input end of the interface unit and the ground end, so that static electricity can be filtered, and interference signals such as surge are introduced to ensure the safety of the interface unit.
In some embodiments, the ethernet communications component may further include an impedance termination circuit 305, as shown in fig. 3C, the impedance termination circuit 305 including: a first resistor 3051 and a second resistor 3052, a first end of the first resistor 3051 and a first end of the second resistor 3052 being connected to a first input port and a second input port of the interface unit 303, respectively, and a second end of the first resistor 3051 and a second end of the second resistor 3052 being connected to form a connection terminal; and a third resistor 3053 and a first capacitor 3054, where the third resistor 3053 and the first capacitor 3054 are connected in parallel, first ends of the third resistor 3053 and the first capacitor 3054 are connected to the connection terminal, and a second end of the third resistor 3053 and the first capacitor 3054 are connected to a ground terminal.
In the embodiment of the present disclosure, by providing the impedance termination circuit, a leakage path may be provided for static electricity, and further electrostatic discharge protection may be provided for the interface unit. In this embodiment, the structure in the ESD protection unit in fig. 3C is only an example, and other forms of electrostatic protection structures may also be adopted, which is not limited.
In some embodiments, second filtering units are respectively disposed between the first differential signal output end of the physical interface transceiver unit 301 and the input end of the first coil of the first filtering unit 302, and between the second differential signal output end of the physical interface transceiver unit 301 and the input end of the second coil of the first filtering unit 302, where the second filtering units include multi-stage low-pass filters to filter out high-frequency signals.
In some embodiments, the smart driving system further comprises a PPS (Pulse Per Second) interface component for acquiring a Pulse Per Second PPS signal. The PPS signal may represent the entire second of Coordinated Universal Time (UTC) by the rising edge of a pulse.
The processing component 103 may generate corresponding synchronous trigger signals for each sensor according to the PPS signal, so as to trigger each sensor to perform signal acquisition through the sensor interface component 101; and send the synchronously acquired sensor signals to the computing device interface component 102 via the in-vehicle ethernet.
When the synchronous trigger signal is generated, because the installation positions of the sensors in the driving device are different, the time delays corresponding to the physical links from the sending end of the synchronous trigger signal, that is, the output end of the processing component 103, to the sensors are also different. In the embodiment of the present disclosure, the physical link delay corresponding to each sensor may be determined according to the timestamp carried by each sensor signal received by the processing component 103, and the synchronization trigger signal is generated by using the physical link delay, so as to ensure that the delay of the synchronization trigger signal of each sensor corresponds to the delay of the physical link of the sensor.
In some embodiments, the processing component 103 may sample the PPS signal with a first clock, count based on the first clock in response to detecting a rising edge of the PPS signal; and when the count value reaches the set value, outputting a synchronous trigger signal obtained by performing phase-locking frequency multiplication operation on the PPS signal. In the disclosed embodiment, the set value may be determined according to a physical link delay of a sensor connected to each sensor interface component in the smart driving system. Taking the determination of the set value Sa of sensor A and the set value Sb of sensor B as an example, assume that the physical link delay of sensor A is ta and the physical link delay of sensor B is tb, ta>tb, the relationship between Sa and Sb is: sa-Sb＝(ta-tb) and/T, wherein T is the period of the first clock. By outputting the synchronous trigger signal of the sensor a when the count value reaches the set value Sa and outputting the synchronous trigger signal of the sensor B when the count value reaches Sb, the synchronous trigger signal of the sensor a is sent out earlier (ta-tb) than the sensor B, and after the corresponding physical link delay, the synchronous trigger signal of the sensor a and the synchronous trigger signal of the sensor B will reach the sensor a and the sensor B respectively at the same time.
In some embodiments, the processing component may include a synchronization triggering subcomponent for performing a phase-locked frequency multiplication operation on the PPS signal, and generating a signal with a fixed phase difference from the PPS signal, a frequency that is a set multiple of a frequency of the PPS signal, and with different time delays, as the synchronization triggering signal of each sensor. The synchronous trigger subassembly may be an independent phase-locked loop, or may be implemented by using a phase-locked loop function of a processor that implements the function of the processing component, for example, by using a phase-locked loop function of a processor in an FPGA.
The processing component 103 generates a synchronization trigger signal of each sensor according to the physical link delay corresponding to each sensor based on the PPS signal. And each sensor collects signals in response to receiving the synchronous trigger signal. Because the difference of the transmission time of the signals on the physical links between the sensors and the processing assembly is corrected by the difference of the time sent out between the synchronous trigger signals of the sensors, the synchronous trigger signals can synchronously trigger the sensors to acquire the signals, and the synchronization problem of the sensors of the whole vehicle is effectively improved.
In one example, a rising edge of the PPS signal may be sampled by using a high-frequency clock signal of the FPGA, a high-frequency clock counter inside the FPGA starts counting when the rising edge is detected, and when a count value reaches a set value corresponding to the sensor, the synchronous trigger signal is output to realize a time delay corresponding to each sensor, thereby realizing synchronous triggering of each sensor.
In the embodiment of the disclosure, the time sequence control characteristic of the FPGA is utilized, so that synchronous triggering of each sensor can be realized, the triggering acquisition time of each sensor can be flexibly configured, and the synchronization problem of the sensors of the whole vehicle is effectively improved.
In some embodiments, the smart driving system further comprises a GPS interface component for acquiring GPS signals. The processing component 103 acquires GPS Time information according to a GPS signal, and performs accurate GPS Time service for the vehicle-mounted device based on a Network Time Protocol (NTP) by using itself as a Network Time Protocol (NTP) server; alternatively, the processing component 103 provides accurate GPS time service for the vehicle-mounted device based on the high-precision time synchronization protocol. The vehicle-mounted equipment is a sensor such as a camera and a laser radar.
In some embodiments, the smart driving system may further include a CMC vehicle connector, which may include a power supply, a synchronous trigger input interface, a synchronous trigger output interface, a CAN bus, an RS232 interface, and the like.
In some embodiments, the intelligent driving system may further include an HDMI (High Definition Multimedia Interface) and a miniDP (mini Display Port) for visualizing a processing result of the computing device and improving a use experience of a user.
In some embodiments, the intelligent driving system may further include an ethernet interface, such as a PS-side 1000M ethernet interface, for remote login.
In some embodiments, the smart driving system may further include an FMC function extension board interface, a USB to UART debug interface, a USB interface, a TF card interface, and the like.
The intelligent driving system transmits the processed sensor acquisition data to the computing equipment through the vehicle-mounted Ethernet, and the computing equipment generates intelligent driving control information according to the sensor acquisition data. Wherein the intelligent driving control information may include one or more of the following information:
warning information for assisting the driving device in safely driving, such as warning information for prompting the driver to be too close to the preceding vehicle, driving information for prompting the driver to exceed a safe vehicle speed, and the like;
automatic driving control information of the running device, such as information that controls the speed, running direction, and the like of the running device;
control information of an in-vehicle device that assists driving of the vehicle, such as information that controls turning on or off of a high beam of the vehicle, and the like;
it should be understood by those skilled in the art that the intelligent driving control information may also include other control information for assisting the intelligent driving of the driving device, and will not be described in detail herein.
At least one embodiment of the present disclosure also provides a driving device, which includes a driving device main body and the intelligent driving system according to any one of the embodiments of the present disclosure.
As will be appreciated by one skilled in the art, one or more embodiments of the present description may be provided as a method, system, or computer program product. Accordingly, one or more embodiments of the present description may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, one or more embodiments of the present description may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The embodiments of the present specification further provide a computer-readable storage medium, on which a computer program may be stored, and the computer program, when executed by a processor, implements the steps of the intelligent driving method described in any of the embodiments of the present specification. Wherein "and/or" means having at least one of the two, e.g., "A and/or B" includes three schemes: A. b, and "A and B".
The foregoing description has been directed to specific embodiments of this disclosure. Other embodiments are within the scope of the following claims. In some cases, the acts or steps recited in the claims may be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
Embodiments of the subject matter and the functional operations described in this specification can be implemented in: digital electronic circuitry, tangibly embodied computer software or firmware, computer hardware including the structures disclosed in this specification and their structural equivalents, or a combination of one or more of them. Embodiments of the subject matter described in this specification can be implemented as one or more computer programs, i.e., one or more components of computer program instructions, encoded on a tangible, non-transitory program carrier for execution by, or to control the operation of, data processing apparatus. Alternatively or additionally, the program instructions may be encoded on an artificially generated propagated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode and transmit information to suitable receiver apparatus for execution by the data processing apparatus. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, or a combination of one or more of them.
The processes and logic flows described in this specification can be performed by one or more programmable computers executing one or more computer programs to perform corresponding functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).
Computers suitable for executing computer programs include, for example, general and/or special purpose microprocessors, or any other type of central processing unit. Generally, a central processing unit will receive instructions and data from a read-only memory and/or a random access memory. The basic components of a computer include a central processing unit for implementing or executing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto-optical disks, or optical disks. However, a computer does not necessarily have such a device. Moreover, a computer may be embedded in another device, e.g., a mobile telephone, a Personal Digital Assistant (PDA), a mobile audio or video player, a game console, a Global Positioning System (GPS) receiver, or a portable storage device such as a Universal Serial Bus (USB) flash drive, to name a few.
Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices (e.g., EPROM, EEPROM, and flash memory devices), magnetic disks (e.g., an internal hard disk or a removable disk), magneto-optical disks, and CD ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
While this specification contains many specific implementation details, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features specific to particular embodiments of particular inventions. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. In other instances, features described in connection with one embodiment may be implemented as discrete components or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components and components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can generally be integrated together in a single software product or packaged into multiple software products.
Thus, particular embodiments of the subject matter have been described. Other embodiments are within the scope of the following claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve desirable results. Further, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some implementations, multitasking and parallel processing may be advantageous.
The above description is only for the purpose of illustrating the preferred embodiments of the one or more embodiments of the present disclosure, and is not intended to limit the scope of the one or more embodiments of the present disclosure, and any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the one or more embodiments of the present disclosure should be included in the scope of the one or more embodiments of the present disclosure.
Claims (13)
1. An intelligent driving system, comprising:
the sensor interface components are used for being respectively connected with the sensors;
a computing device interface component for connecting with the computing device via an Ethernet;
the processing component is connected with the plurality of sensor interface components and the computing equipment interface component and is used for processing the data collected by the sensors and received by the sensor interface components and sending the processed data to the computing equipment interface component;
and the computing equipment is used for generating intelligent driving control information according to the received data.
2. The system of claim 1, wherein the sensor interface component comprises a plurality of around-looking camera interfaces and a plurality of front-looking camera interfaces, wherein the plurality of around-looking cameras are used for collecting environmental information in different directions, and the plurality of front-looking cameras comprise cameras with different focal lengths;
the processing component is used for compressing and coding the image data collected by the plurality of all-round cameras and the plurality of front-view cameras to obtain coded image data.
3. The system of claim 1, wherein the sensor interface component comprises at least one radar interface.
4. The system of any one of claims 1 to 3, further comprising a first interface circuit comprising one or more of;
the current limiting circuit comprises a first transistor arranged between the output end of the sensor interface component and a general input/output interface of the processing component, and a first current limiting unit connected with the output end of the first transistor in series, wherein the first current limiting unit is used for disconnecting the transistor from a power supply when the current flowing through the first current limiting unit exceeds a first preset threshold;
the pull-up resistor is arranged between the general input/output interface and a power supply;
and the diode is arranged between the general input and output interface of the processing component and the input end of the sensor interface component and is a Schottky diode.
5. The system of any of claims 1 to 3, further comprising a second interface circuit comprising a first opto-coupler disposed between an output of the processing component and an input of at least one of the sensor interface components, and a second opto-coupler disposed between an output of at least one of the sensor interface components and an input of the processing component; the second interface circuit further comprises one or more of:
a second transistor disposed between an output terminal of the first photocoupler and ground;
the second current limiting unit is arranged between the output end of the second transistor and the input end of the sensor and is used for disconnecting the transistor from the input end of the sensor when the current flowing through the second current limiting unit exceeds a second preset threshold value;
and the third transistor is arranged between the output end of the sensor and the input end of the second photoelectric coupler and is a depletion type field effect transistor.
6. The system of any one of claims 1 to 3, wherein the computing device interface component comprises an Ethernet communication component comprising a physical interface transceiver unit, a first filtering unit, and an interface unit, wherein,
the physical interface transceiving unit outputs a differential signal pair through a first differential signal output end and a second differential signal output end;
the first filtering unit comprises a first coil and a second coil which are symmetrically wound on the same magnetic core, the first coil and the second coil are same in size and number of turns, the input ends of the first coil and the second coil of the first filtering unit are used for receiving the differential signal pair, and the output ends of the first coil and the second coil are used for outputting the differential signal pair subjected to common mode rejection;
the interface unit receives the common-mode-rejected differential signal pair via a first input port and the second input port.
7. The system of claim 6, wherein an electrostatic discharge (ESD) protection unit is disposed between the first filtering unit and the interface unit, wherein the ESD protection unit comprises:
a first transient voltage suppressor diode connected between the first input port of the interface unit and a ground terminal;
and the second transient voltage suppression diode is connected between the second input port of the interface unit and the ground terminal.
8. The system of claim 7, wherein the ethernet communications component further comprises:
the first end of the first resistor and the first end of the second resistor are respectively connected with the first input port and the second input port of the interface unit, and the second end of the first resistor and the second end of the second resistor are connected to form a connecting end;
the third resistor and the first capacitor are connected in parallel, the first ends of the third resistor and the first capacitor are connected with the connecting end, and the second ends of the third resistor and the first capacitor are connected with the grounding end.
9. The system of any one of claims 1 to 3, wherein the processing component comprises a Field Programmable Gate Array (FPGA).
10. The system of any one of claims 1 to 3, further comprising a PPS interface component for obtaining a Pulse Per Second (PPS) signal;
and the processing component is further used for respectively generating synchronous trigger signals corresponding to the sensors according to the PPS signals so as to trigger the sensors to acquire signals, wherein the time delay of the synchronous trigger signal of each sensor corresponds to the physical link time delay of the sensor.
11. The system of claim 10, wherein the processing component is configured to sample the PPS signal using a first clock, count based on the first clock in response to detecting a rising edge of the PPS signal; and when the counting value reaches a set value corresponding to the sensor, outputting a synchronous trigger signal obtained by performing phase-locking frequency multiplication operation on the PPS signal, wherein the set value is determined according to the physical link delay of the sensor.
12. The system of claim 10, further comprising a GPS interface component for acquiring GPS signals;
the processing component is also used for acquiring GPS time information according to the GPS signal and sending the GPS time information to the sensor interface components based on a network time protocol or a high-precision time synchronization protocol so as to carry out time service.
13. A running device characterized by comprising a running device main body and the intelligent driving system according to any one of claims 1 to 12.
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| CN202023341635.8U CN214279172U (en) | 2020-12-31 | 2020-12-31 | Intelligent driving system and driving equipment |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113238566A (en) * | 2020-12-31 | 2021-08-10 | 上海商汤临港智能科技有限公司 | Intelligent driving system and driving equipment |
| CN114124282A (en) * | 2021-12-01 | 2022-03-01 | 国网新疆电力有限公司电力科学研究院 | Synchronization method and device between asynchronous heterogeneous sensor data acquisition systems |
| CN115314422A (en) * | 2022-10-11 | 2022-11-08 | 智道网联科技(北京)有限公司 | Link delay statistical method and device for parallel driving central control vehicle instruction |
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2020
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113238566A (en) * | 2020-12-31 | 2021-08-10 | 上海商汤临港智能科技有限公司 | Intelligent driving system and driving equipment |
| CN114124282A (en) * | 2021-12-01 | 2022-03-01 | 国网新疆电力有限公司电力科学研究院 | Synchronization method and device between asynchronous heterogeneous sensor data acquisition systems |
| CN115314422A (en) * | 2022-10-11 | 2022-11-08 | 智道网联科技(北京)有限公司 | Link delay statistical method and device for parallel driving central control vehicle instruction |
| CN115314422B (en) * | 2022-10-11 | 2023-04-07 | 智道网联科技(北京)有限公司 | Link delay statistical method and device for parallel driving central control vehicle instruction |
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