CN2142584Y - Multi-purpose experimental computer interface apparatus - Google Patents

Multi-purpose experimental computer interface apparatus Download PDF

Info

Publication number
CN2142584Y
CN2142584Y CN 92233901 CN92233901U CN2142584Y CN 2142584 Y CN2142584 Y CN 2142584Y CN 92233901 CN92233901 CN 92233901 CN 92233901 U CN92233901 U CN 92233901U CN 2142584 Y CN2142584 Y CN 2142584Y
Authority
CN
China
Prior art keywords
circuit
address
signal
computer
c5xx
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 92233901
Other languages
Chinese (zh)
Inventor
王起文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang Normal University CJNU
Original Assignee
Hangzhou Normal College
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hangzhou Normal College filed Critical Hangzhou Normal College
Priority to CN 92233901 priority Critical patent/CN2142584Y/en
Application granted granted Critical
Publication of CN2142584Y publication Critical patent/CN2142584Y/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Instructional Devices (AREA)

Abstract

The utility model relates to a multi-purpose experimental interface apparatus connected with an apple II and a compatible computer. The multi-purpose experimental interface apparatus is composed of a common computer interface circuit, a buffering circuit, a decoding circuit, a plurality of universal function circuits and a power supply circuit; the data bus of a computer, the address bus of the computer, the control bus of the computer are led to the multi-purpose experimental interface apparatus from a slot, and the computer can execute programs solidified in the multi-purpose experimental interface apparatus so as to become multifunctional and multi-purpose experimental instrument. The utility model can be used on the site of a laboratory and industrial production.

Description

Multi-purpose experimental computer interface apparatus
The utility model is a kind of instrument of measuring and controlling.
Teaching experiment system present and that computing machine is used adopts configuration and the method for attachment as Fig. 1 usually, sees " application of microcomputer in expeimental physics " book, and He Naiwen, Yao Gang, Li Canguo write, and Higher Education Publishing House publishes, in June, 1992.Its weak point of scheme is like this: 1, owing to program needs be called in by disc driver, and driver is had relatively high expectations to environment for use, and easy break-down, and reliability is bad, so use inconvenience in teaching and production scene; 2, versatility is not strong, generally only can handle single experiment content, for different experiments or measurement controlling object, need use different interface cards and corresponding signal process system instead, the teaching people who is unfamiliar with computing machine goes to utilize this system to carry out other experiment content; Function is subjected to computing machine to expand the restriction of notch number, resembles china educational computer especially, has only a slot, can't use the polylith interface card simultaneously, in addition, power of computer power supply is limited, if the interface card power consumption of inserting is big, whole computer working instability, in addition impaired.
Continuous progress along with MODN technology, various high performance computing machines constantly come out, originally once widely used Apple II microcomputer and compatible thereof are replaced by the better machine of performance gradually, though the Apple II can not adapt to large-scale word processing, science is calculated, it still is available being used for the real-time data acquisition processing, measuring the control aspect.The purpose of this utility model is to make full use of existing Apple II and compatible thereof, mixes the utility model to it, under corresponding software is supported, makes it to become a kind of multi-functional experimental apparatus.
Its circuit of the utility model is by data, address, control bus buffer circuit and address decoding circuitry (1), program storage circuit (2), A/D change-over circuit (3), multichannel input conversion and programmed control amplifying circuit (4), D/A change-over circuit (5), general-purpose interface adapter (VIA) circuit (6), exchange amplification, absolute value amplification and power amplification circuit (7), direct current difference amplifying circuit (8), time base circuit (9), V/F converter circuit (10), relay drive circuit (11) and power circuit (12) are formed, and see Fig. 2.Wherein circuit (1)-(6) are assemblied on the printed circuit board; Circuit (7)-(12) are contained on another printed circuit board plate.As follows below in conjunction with Fig. 3-Figure 13 to the each several part circuit description:
Data, address, control bus buffer circuit and address decoding circuitry (1) are seen Fig. 3, are made up of components and parts (101)-(118).It is to be used for finishing the utility model to the isolation of computer system and provide the signal such as gating, startup of A/D, D/A, VIA, program storage circuit.By 16 address wire A that draw in the computing machine notch 0-A 15Warp (102), (106), (110) buffering, A 0-A 7As the utility model address bus least-significant byte, A 4-A 15Be added on 3 lines-8 line code translator (104), (108), (112), finish the function of decoding.As the high-order A in address 15-A 8Intermediate value is C 5The time, the Y of code translator (112) 1Step-down, and make the Y of code translator (108) 5Be low level also, translate C5XX, data buffer (114) gating is worked as A 15-A 8Intermediate value is C 4The time, the Y of code translator (108) 4Be low level, translate C4XX, data buffer (114) is also by gating, simultaneously at A 0-A 4Effect under, translate C40X-C45X, go to control the work of A/D, D/A, VIA, program storage etc.Because Apple II computer addressing scope is OOOO-FFFF, and the utility model has only accounted for C4XX and C5XX, so data buffer 114 allows end G to link to each other with C5XX with C4XX by Sheffer stroke gate (115), (116).So only when an address wire high position was C4 or C5, data buffer (114) is gating, and the CPU of the utility model energy and main frame carries out data transfer.Above-mentioned buffering decoding scheme, make main frame can drive bigger load, and the duty that makes external unit can break away from DEV on the bus notch, I/OSELECT equisignal line and be decided by code translator output, thereby can control a plurality of external devices, make to the utlity model has more function and bigger dirigibility.
Program storage circuit (2) is seen Fig. 4, and it is made up of (201)-(213).Be used for depositing application software and data, make total system break away from disc driver and work, and can solidify some special softwares,, whole computer system functions is strengthened with the deficiency of compensation host monitor system.The random process storer has power down protection, but utilizes information among the self-contained battery long preservation RAM after the outage.The least-significant byte address wire of storer (204), (213) meets A 0-A 7, the most-significant byte address wire does not meet A 14-A 8, and be connected on the Q end of eight d type flip flops (202), promptly an address high position is by data line D 0-D 6Latch and get through trigger (202).D after whether storer (204), (213) gating latched by eight d type flip flops (202) 7Send code translator (206) decoding and decide.Here the utility model has adopted the method for address overlap, promptly two program storages (204), (213) are total to the 64K byte, be overlapped in this zone of hosting space C500-C5FF, like this for computer bus, outside 256 bytes that only taken it, and to program storage (204), (213) itself, the 64K capacity all utilizes, and is enough to deposit relatively large program and data.The power down protection circuit of static RAM (SRAM) (213) is by (207)---and (212) are formed.External connection battery voltage range 2.5-4.5V, to keep under the state power consumption very little because of static RAM (SRAM), and external connection battery can use for a long time.
A/D change-over circuit (3) is seen Fig. 5, is made up of (301)-(315).It is used for finishing the conversion of external analog amount to digital quantity, and the signal that the external world is come can be by Computer Processing.Slewing rate is 100 μ s, and resolution is eight-digit binary number, converts digital quantity OO-FF to corresponding to analog quantity 0-5V.The reference voltage of A/D converter (304) is provided after follower (307) buffering by voltage stabilizing diode (306).When CS and WR line start A/D converter simultaneously when low.Behind the A/D EOC, visit C41X makes CS and RD simultaneously for low, can read the result after the A/D conversion one time from data bus.
Multichannel input conversion and programmed control amplifying circuit (4) are seen Fig. 6, are made up of (401)-(440).Its function is that the multichannel of outside (maximum 8 tunnel) analog signals is sent into A/D converter by 8 tunnels analogy switch timesharing, and can come the amplification quantity of control amplifier as required by program, so that make the small-signal of input also can obtain the transformation result of degree of precision.Signal on eight d type flip flops (440) the latch data bus, the input channel that obtains changing number and amplify range, after non-inverting buffer (438) buffering, send into the address input end of 8 tunnels analogy switches (418) and (423) respectively, corresponding passage is inserted.8 tunnels analogy switches (418) switch input analog amount.Input end has added diode (401)-(416) and has carried out clamp, protects 8 tunnels analogy switches.8 tunnels analogy switches (423) link to each other with the backfeed loop of operational amplifier (419), and it can change feedback resistance value by switching channel, makes 8 grades of the enlargement ratios of amplifier variable.
D/A change-over circuit (5) is seen and Fig. 7 is made up of 501-506.It is used for finishing digital quantity---the conversion of analog quantity.The reference voltage of D/A converter (502), (505) is provided by the transport and placing device among Fig. 5 (313), for-5V.D/A converter (502), (505) precision are eight-digit binary number, and slewing rate 1 μ s is 0-5V corresponding to its output analogue value of digital quantity OO-FF.The startup of two D/A converters (502) and (505) is by C40X and A 0The line decision.When C40X is low and A 0=1 o'clock, choose (502), therefrom obtain output voltage; When C40X is low and A 0, choose (505), output voltage at=1 o'clock.The output of selected D/A converter is latched always, till this D/A converter is accessed once more.
General-purpose interface adapter circuit (6) is seen Fig. 8, is made up of (601)-(611).It is used for finishing functions such as digital quantity input and output (I/O), timing, interruption.φ in the main frame 1The phase clock signal is sent into the CLK end of (602), (611) after the phase-shift circuit phase shift that (603), (604), (605) and peripheral cell are formed, as its clock signal.The data line of general-purpose interface adapter (602), (611), address wire, control line, select lines etc. directly link to each other with the homologous lines of Fig. 3, and after the initialization, the I/O mouth just can be by the state work of being assert.
Exchange amplification, absolute value amplification and power amplification circuit (7) and see Fig. 9, form by (701)-(728).It is a functional circuit, is independent of computer system, is used for signal Processing, and power output etc. are to adapt to various physical signalling.(709) be the ac small signal amplifier, (714), (719) and peripheral cell constitute the absolute value amplifying circuit, and (722) are follower, and (726) are audio-frequency power amplifier, can promote transducer, loudspeaker etc.
Direct current difference amplifying circuit (8) is seen Figure 10, and it is made up of (801)-(814).It produces V 06Be used for handling and be not,,, improve measuring accuracy to increase dynamic range as unbalanced bridge, temperature/voltage signal etc. with the initial signal of zero level.Reference voltage V RDetermine by (803), can regulate arbitrarily.Used two followers (801) and (811) in this amplifying circuit, (801) improve the input impedance of amplifier, and with low-resistance output, make difference amplifier (807) working properly.(811) fundamental purpose is the low-resistance form output that makes amplifier.(813), (814) make clamp usefulness, make output voltage be limited in-0.7V-+5.7V between, to protect back level device.
Time base circuit (9) is seen and Figure 11 is made up of 901-905.It is a time base circuit that is made of the CMOS frequency divider.Crystal oscillator frequency is behind (905) frequency division, at Q 4, Q 7, Q 9, Q 14Obtain 2048,256,64, the square wave of 2Hz, make the usefulness of measurement standard.
V/F converter circuit 10 is seen Figure 12.Be made of integrated circuit 1006 and peripheral cell, it can be used as replenishing of A/D converter.A/D converter (304) speed is fast, but resolution is not high.When needs carry out high-acruracy survey and can use the V/F converter to rate request when not high.At 1N 10End is sent into voltage signal, at VF 0End can obtain pulse output.With the output signal numeration of the counter of VIA, can obtain the V/F transformation result to (1006).This V/F converter full scale frequency range is 0-10KHz, and resolution is better than 12 binary A/D converters, and stronger anti-50Hz power frequency interference performance and good precision---temperature characterisitic are arranged.
Relay drive circuit (11) is seen Figure 13, is a simple amplifier.With 1N 11Be connected to PA mouth or the PB mouth of VIA, the folding that comes pilot relay with regard to available programs.According to the size that is driven load, also can add the one-level contactor in the relay back.
Power circuit (12), it is made up of transformer, rectifier, three terminal regulator etc.It is powered to whole instrument, and externally provides ± 5V, ± 12V stabilized voltage supply.
Feature of the present utility model is with program storage circuit (2), A/D change-over circuit (3), D/A change-over circuit (5), general-purpose interface adapter (6) is concentrated and is assembled together, independent control, only need draw from arbitrary computing machine notch with the connecting line of computing machine and get final product, groove slogan and control signal wire limit, and this function is by (104), (108), (112) and φ in data, address, control bus buffer circuit and the address decoding circuitry (1) 1Line is finished, 3 lines-8 line code translator (112), (108) produce C4XX, the C5XX signal, and C4XX cooperates generation C40X-C47X gating signal again with (104), thereby has realized the function of timesharing to a plurality of interface circuits controls.
Another feature of the present utility model is to have adopted two extensive storage integrated circuit (204) and (213) in program storage circuit (2), can timesharing read and write in order to make two integrated circuit, has adopted data line D 7Cooperate gating signal line C5XX to decipher by code translator, promptly the chip selection signal of code translator (206) is produced by C5XX, and address signal is by D 7Produce, when C5XX is effective, code translator (206) work, its output state is by D 7Decision as long as increase an instruction before storage work, makes D 7Be 0 or 1, but just designated program storer (204) or (213) work.
The utility model also is provided with some universal circuits (7)-(11), make under most of occasion, the user needn't make preposition circuit again, as long as on the connector on the panel, carry out suitable connection and adjustment, can carry out pre-service to outside level, convert appropriate signal to by Computer Processing.
Advantage of the present utility model:
1, adopted the various interface device of microcomputer special use, after computing machine is connected, made this system have very strong function and many-sided applicability, as:
(1) links to each other with conventional instrument and can work by the Experiment of Computer Control Technology instrument, image data, result of calculation, constitute intelligentized experimental system, be particularly suitable for conventional instrument the work that can not finish, as mass data collection, measurement at a high speed, weak signal extraction etc.
(2) can be used as multi-functional Laboratory Instruments, as constituting digital voltmeter, storage oscilloscope, frequency meter, laser powermeter, signal generator etc.
(3) can directly control topworkies such as motor, electromagnet, registering instrument.
(4) can carry out lecture experiment and simulated experiment, handle experimental data etc.
2, easy to use
Under the support of Apple II and compatible or china educational computer, as long as add corresponding sensor, but with regard to physical signallings such as ergometry, heat, sound, light, electricity, the user of service calls or oneself writes corresponding program again and get final product as long as the utility model inner function circuit is connected on demand.
3, good reliability
The ROM that has adopted jumbo EPROM and band power down protection and without disc driver, has reduced system to environment requirement as storer, and functional reliability improves greatly; Because the utility model only joins by a plug-in unit and computing machine notch, failure rate is descended.
4, the interface device of various functions integrates, and makes that a part of circuit can be public or share, and compares with each interface card independently, and cost is much lower.
Description of drawings:
Fig. 1 be the common teaching experiment system that adopts at present configuration be connected.It is to adopt disc driver to measure or control different objects as program storage with a plurality of interface cards of employing.
Fig. 2 is a general diagram of the present utility model.
Fig. 3 is data, address, control bus buffer circuit and address decoding circuitry figure.
Fig. 4 is the program storage circuit diagram.
Fig. 5 is A/D change-over circuit figure.
Fig. 6 is multichannel input converter and programmed control amplification circuit diagram.
Fig. 7 is D/A change-over circuit figure.
Fig. 8 is the general-purpose interface adapter circuit diagram.
Fig. 9 exchanges amplification, absolute value amplification and power amplification circuit figure.
Figure 10 is a direct current difference amplification circuit diagram.
Figure 11 is time base circuit figure.
Figure 12 is V/F converter circuit figure.
Figure 13 is relay drive circuit figure.
Embodiment
Schematic diagram of the present utility model is seen Fig. 2-Figure 13.Wherein the model of main integrated circuit is indicated in the drawings.() person and computing machine notch seated connection are arranged among the figure.
Physical dimension of the present utility model is 30cm * 22cm * 10cm(length * wide * height), shell is made by aluminium sheet, surface plastic coating.One 50 core socket (exporting into usefulness for mainboard) is housed, one 37 core socket (using), 4 binding posts (D.C. regulated power supply output), 2 potentiometers, 6 switches and 1 power supply indication luminotron on the panel for functional circuit.Back side of panel is equipped with 3 binding posts (relay output end), and 1 Insurance Block, 1 power lead and 1 50 line flat cable, the cable other end are that a bus is inserted plate.
Cabinet inside is made of power supply, mainboard, functional circuit plate three parts.Mainboard and functional circuit plate are with double-sided metal hole printed panel.Between mainboard and the feature board inner do not have be connected, power supply all adopts a four-core supply socket to link to each other with two blocks of plates.
In addition, the electrostatic isolation layer casing of transformer be ground connection all, to obtain good interference free performance and security.

Claims (2)

1, a kind of experimental interface instrument of using that are connected with Apple II and compatible computer more, its circuit is by data, the address, control bus buffer circuit and address decoding circuitry (1), program storage circuit (2), A/D change-over circuit (3), multichannel input conversion and programmed control amplifying circuit (4), D/A change-over circuit (5), general-purpose interface adapter circuit (6), exchange and amplify, absolute value amplifies and power amplification circuit (7), direct current difference amplifying circuit (8), time base circuit (9), V/F converter circuit (10), relay drive circuit (11) and power circuit (12) are formed, it is characterized in that program storage circuit (2), A/D change-over circuit (3), D/A change-over circuit (5), general-purpose interface adapter (6), concentrate and be assembled together, independent control, only need draw with the connecting line of computing machine and get final product from arbitrary computing machine notch, the not restriction of groove slogan and control signal wire, this function is by data, the address, (104) in control bus buffer circuit and the address decoding circuitry (1), (108), (112) and Φ 1Line is finished, 3 lines-8 line code translator (112), (108) produce C4XX, C5XX signal, and C4XX cooperates product C4OX-C47X to give birth to gating signal again with (104), thereby has realized the function of timesharing to a plurality of interface circuits controls.
2, computing machine according to claim 1 is used the experimental interface instrument more, it is characterized in that having adopted in the said program storage circuit (2) two extensive storage integrated circuit (204) and (213), for two integrated circuit can be read and write in timesharing, adopted data line D 7Cooperate gating signal line C5XX to decipher by code translator, promptly the chip selection signal of code translator (206) is produced by C5XX, and address signal is by D 7Produce, when C5XX was effective, code translator (206) was worked its output state by D 7Decision as long as increase an instruction before storage work, makes D 7Be 0 or 1, but just designated program storer (204) or (213) work.
CN 92233901 1992-09-17 1992-09-17 Multi-purpose experimental computer interface apparatus Expired - Fee Related CN2142584Y (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 92233901 CN2142584Y (en) 1992-09-17 1992-09-17 Multi-purpose experimental computer interface apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 92233901 CN2142584Y (en) 1992-09-17 1992-09-17 Multi-purpose experimental computer interface apparatus

Publications (1)

Publication Number Publication Date
CN2142584Y true CN2142584Y (en) 1993-09-22

Family

ID=33776108

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 92233901 Expired - Fee Related CN2142584Y (en) 1992-09-17 1992-09-17 Multi-purpose experimental computer interface apparatus

Country Status (1)

Country Link
CN (1) CN2142584Y (en)

Similar Documents

Publication Publication Date Title
GB2365182A (en) High-density removable expansion module having I/O and second-level removable expansion memory
CN207096979U (en) A kind of CPCI mainboards and computer based on Feiteng processor
CN104678809B (en) Generally applicable sensor control device and system
CN201319226Y (en) Embedded teaching experimental system
CN2142584Y (en) Multi-purpose experimental computer interface apparatus
CN205158759U (en) Novel teaching system is put into practice to singlechip
CN204515006U (en) A kind of eight railway digital System of voltage acquisitions
CN201035053Y (en) Three phase multifunctional electrical energy meter
CN201156341Y (en) Multifunctional experiment development and teaching apparatus based on DSP chip
CN108664611A (en) Multifunctional mobile road-director based on touch-control and voice operating
CN2284963Y (en) Portable multi-functional and expandable digital circuit tester
CN201156156Y (en) Self-playing projector
CN201035935Y (en) Multifunctional electronic paper board
CN206876736U (en) A kind of DC Electronic Loads
CN101004781B (en) System for verifying and typing in identity card
CN105810043A (en) Advanced intelligent drawing board
CN2147545Y (en) Electric spoon type intelligent electric power meter
CN2397536Y (en) Digital code book-reader
CN216979753U (en) Portable general test platform based on USB bus
CN201007923Y (en) Highly effective graphics generating device aimed at FLASH
CN2279651Y (en) Intelligent card data collector
CN202321837U (en) Embedded elevator display system based on ARM7 (advanced RISC(reduce instruction set computer) machines) module and FPGA (field programmable gate array) module
CN201742450U (en) Mobile phone with A-type USB port
CN201271264Y (en) Type-B ultrasonic instrument control platform based on embedded system
CN2450641Y (en) Self-recording water gage

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee