CN214256682U - Indicator light circuit and electronic equipment - Google Patents

Abstract

The utility model provides an indicator lamp circuit and electronic equipment, wherein, the indicator lamp circuit includes that the electric potential draws the circuit, the pilot lamp, trigger circuit and switch circuit, trigger circuit is receiving key control signal conversion output continuous turn-on signal to switch circuit, switch circuit switches on, thereby be connected to the first level signal end and the second level signal end of opposite level with the both ends of pilot lamp, the pilot lamp that corresponds mode is continuously lighted, even if output key control signal's button module plays this moment, the pilot lamp still can continue to work, need not additionally to increase the output pin position, only need use original key control pin position, electronic equipment's volume and cost have been simplified.

Description

Indicator light circuit and electronic equipment

Technical Field

The utility model belongs to the technical field of the pilot lamp, especially, relate to an indicator lamp circuit and electronic equipment.

Background

At present, in a traditional electronic device or an electronic circuit, a certain working mode in the electronic device is started by an external key, and an indicator lamp is connected externally, so that a user can clearly know which mode the electronic device works in currently, particularly the electronic device with multiple keys or multiple working modes, which is more necessary, the most widely used key type is the key which is started or triggered when being pressed down, and the key bounces (namely, the connection function of the key is disconnected) after the hand is released.

In general, the indicator light corresponding to the working mode can be turned on after the key is released, or an output pin is added to a controller of the electronic device, and when the corresponding working mode works, a high level or a low level is output to enable the external indicator light to work, so that the size and the cost of the electronic device are increased.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide an indicator lamp circuit aims at solving traditional electronic equipment and need increase an output pin position and lead to electronic equipment's size and cost increase's problem when control indicator lamp is lighted.

A first aspect of an embodiment of the present invention provides an indicator light circuit, wherein the indicator light is used for indicating a working mode of an electronic device, and the indicator light circuit includes a potential boosting circuit, an indicator light, a trigger circuit and a switch circuit;

the first end of the indicator light, the first signal input end of the trigger circuit, the first end of the switch circuit and the first end of the potential pull-up circuit are connected together to form a signal end of the indicator light circuit, the signal output end of the trigger circuit is connected with the controlled end of the switch circuit, the second end of the indicator light and the second end of the potential pull-up circuit are respectively connected with a first level signal end, the second end of the switch circuit is connected with a second level signal end, and the levels of the first level signal end and the second level signal end are opposite;

the potential boosting circuit is used for boosting the level of the first end of the indicator lamp to a first level when a key control signal is not received, and the level of the key control signal is the same as that of the second level signal end;

the trigger circuit is used for converting the received key control signal into a continuous conducting signal and outputting the continuous conducting signal to the switch circuit;

the switch circuit is used for being switched on when receiving the switching-on signal and raising the level of the first end of the indicator lamp to a second level so as to enable the indicator lamp to be lightened.

In one embodiment, the indicator light circuit further includes a reset signal processing circuit, signal input ends of the reset signal processing circuit are respectively used for receiving a power-on reset signal output by the power-on reset circuit and an operating mode termination signal output by the signal generation module, and a signal output end of the reset signal processing circuit is connected with a second signal input end of the trigger circuit;

the reset signal processing circuit is used for converting the power-on reset signal and/or the working mode termination signal into a trigger reset signal and outputting the trigger reset signal to the trigger circuit;

the trigger circuit is used for resetting when receiving the trigger reset signal and outputting a turn-off signal to the switch circuit so as to turn off the switch circuit.

In one embodiment, the reset signal processing circuit includes a nor gate and a first not gate;

the first signal input end and the second signal input end of the nor gate are respectively used for inputting the power-on reset signal and the working mode termination signal, the signal output end of the nor gate is connected with the signal input end of the first not gate, and the signal output end of the first not gate is the signal output end of the reset signal processing circuit.

In one embodiment, the level of the first level signal terminal is a high level, the level of the second level signal terminal is a low level, and the potential pull-up circuit is a pull-up circuit.

In one embodiment, the flip-flop circuit includes a second not gate, a third not gate, a first D flip-flop, and a second D flip-flop;

the signal input end of the second not gate is the first signal input end of the trigger circuit, the output end of the second not gate is connected with the trigger signal end of the first D trigger, the input end of the third not gate and the normal phase clock signal end of the first D trigger are connected together for receiving clock signals, the output end of the third not gate is connected with the reverse phase clock signal end of the first D trigger, the same phase output end of the first D trigger is connected with the normal phase clock signal end of the second D trigger, the reverse phase output end of the first D trigger is connected with the reverse phase clock signal end of the second D trigger, the trigger signal end of the second D trigger is used for inputting a positive power supply, the same phase output end of the second D trigger is the signal output end of the trigger circuit, the reset signal end of the first D trigger and the reset signal end of the second D trigger are connected together to form the second signal input end of the trigger circuit Two signal input terminals.

In one embodiment, the switching circuit comprises a fourth not gate, a fifth not gate and a first electronic switching tube;

the signal input end of the fourth not gate is the controlled end of the switch circuit, the output end of the fourth not gate is connected with the signal input end of the fifth not gate, the signal output end of the fifth not gate is connected with the controlled end of the first electronic switch tube, and the first end and the second end of the first electronic switch tube are respectively the first end and the second end of the switch circuit.

In one embodiment, the level of the first level signal terminal is a low level, the level of the second level signal terminal is a high level, and the potential pull-up circuit is a pull-down circuit.

In one embodiment, the flip-flop circuit includes a sixth not gate, a third D flip-flop, and a fourth D flip-flop;

the trigger signal end of the third D flip-flop is the signal input end of the flip-flop circuit, the input end of the sixth not gate and the non-inverting clock signal end of the third D flip-flop are commonly connected for receiving a clock signal, the output end of the sixth not gate is connected with the inverted clock signal end of the third D flip-flop, the in-phase output end of the third D flip-flop is connected with the non-inverted clock signal end of the fourth D flip-flop, the inverted phase output end of the third D flip-flop is connected with the inverted clock signal end of the fourth D flip-flop, the trigger signal end of the fourth D flip-flop is used for inputting a positive power supply, the same phase output end of the fourth D flip-flop is the signal output end of the flip-flop circuit, and the reset signal end of the third D trigger and the reset signal end of the fourth D trigger are connected in common to form a second signal input end of the trigger circuit.

In one embodiment, the switching circuit comprises a seventh not gate, an eighth not gate, a ninth not gate and a second electronic switching tube;

the signal input end of the seventh not gate is the controlled end of the switch circuit, the output end of the seventh not gate is connected with the signal input end of the eighth not gate, the signal output end of the eighth not gate is connected with the signal input end of the ninth not gate, the signal output end of the ninth not gate is connected with the controlled end of the second electronic switch tube, and the first end and the second end of the second electronic switch tube are respectively the first end and the second end of the switch circuit.

A second aspect of the embodiments of the present invention provides an electronic device, which includes the indicator light circuit as described above.

The embodiment of the utility model provides a through adopting the electric potential to draw the lift circuit, the pilot lamp, trigger circuit and switch circuit constitute the pilot lamp circuit, the trigger circuit is receiving the continuous switch-on signal of button control signal conversion output to switch circuit, switch circuit switches on, thereby be connected to the first level signal end and the second level signal end of opposite level with the both ends of pilot lamp, the pilot lamp that corresponds operational mode is continuously lighted, even if output button control signal's button module plays this moment, the pilot lamp still can continue to work, need not additionally to increase the output pin position, only need use original button control pin position, electronic equipment's volume and cost have been simplified.

Drawings

Fig. 1 is a schematic diagram of a first structure of an indicator light circuit according to an embodiment of the present invention;

fig. 2 is a schematic diagram of a second structure of an indicator light circuit according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a third structure of an indicator light circuit according to an embodiment of the present invention;

FIG. 4 is a schematic waveform diagram of the indicator light circuit shown in FIG. 3;

fig. 5 is a schematic diagram of a fourth structure of an indicator light circuit according to an embodiment of the present invention;

fig. 6 is a waveform diagram of the indicator light circuit shown in fig. 5.

Detailed Description

In order to make the technical problem, technical solution and advantageous effects to be solved by the present invention more clearly understood, the following description is given in conjunction with the accompanying drawings and embodiments to illustrate the present invention in further detail. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically limited otherwise.

A first aspect of the embodiments of the present invention provides an indicator light circuit.

As shown in fig. 1, fig. 1 is a first schematic structural diagram of an indicator light circuit provided in an embodiment of the present invention, in this embodiment, an indicator light 20 is used for indicating a working mode of an electronic device, and the indicator light circuit includes a potential boosting circuit 10, an indicator light 20, a trigger circuit 30, and a switch circuit 40;

the first end of the indicator light 20, the first signal input end of the trigger circuit 30, the first end of the switch circuit 40 and the first end of the potential pull-up circuit 10 are connected together to form a signal end of the indicator light circuit, the signal output end of the trigger circuit 30 is connected with the controlled end of the switch circuit 40, the second end of the indicator light 20 and the second end of the potential pull-up circuit 10 are respectively connected with a first level signal end, the second end of the switch circuit 40 is connected with a second level signal end, and the levels of the first level signal end and the second level signal end are opposite;

the level pulling circuit 10 is configured to pull up a level of a first end of the indicator light 20 to a first level V1 when the key control signal SW is not received, where the level of the key control signal SW is the same as that of a second level signal end;

the trigger circuit 30 is used for converting the received key control signal SW into a continuous conducting signal and outputting the continuous conducting signal to the switch circuit 40;

and the switch circuit 40 is used for conducting when receiving the conducting signal and pulling up the level of the first end of the indicator light 20 to the second level V2 so as to enable the indicator light 20 to be lightened.

In this embodiment, the key control signal SW is input by an external key module, the controller inside the electronic device switches to the corresponding operating mode after receiving the key control signal SW, and meanwhile, the indicator light circuit lights after receiving the key control signal SW, so as to inform the user of the current operating mode of the electronic device, and the key control signal SW may be active at a low level or active at a high level, and the specific driving mode is set correspondingly according to the requirement.

When the key control signal SW is valid, that is, when the key control signal SW is input by the indicator light circuit, the trigger circuit 30 performs signal conversion, the signal keeps continuously outputting the conducting signal, the switch circuit 40 is conducted, two ends of the indicator light 20 are connected to the first level signal end and the second level signal end, because the levels of the two ends of the first level signal end and the second level signal end are opposite, a voltage difference exists between the two ends, the indicator light 20 is turned on, even if the user releases the key, the key bounces, the indicator light 20 still keeps on the on state until the working mode ending signal corresponding to the working mode ending is input or the electronic device is reset, and the indicator light 20 is turned off again.

When the key control signal SW is not input, due to the existence of the potential boosting circuit 10, the level of the signal input terminal of the trigger circuit 30 maintains the first level V1, the trigger circuit 30 stops outputting the on signal or outputting the off signal to the switch circuit 40, both ends of the indicator light 20 maintain the same level, and the indicator light 20 is turned off.

In this embodiment, the first level V1 and the second level V2 have opposite levels and correspond to a high level and a low level, respectively, and the active level state of the key control signal SW is the same as the second level V2, when the second level V2 is a low level, the key control signal SW is active at a low level, and when the second level V2 is a high level, the key control signal SW is active at a high level.

Meanwhile, the potential boosting circuit 10 is correspondingly arranged according to the connection mode of the indicator light 20, when the second end of the indicator light 20 is connected to a high level, the potential boosting circuit 10 is a pull-up circuit, the pull-up circuit comprises a pull-up resistor or a pull-up electronic switching tube, when the second end of the indicator light 20 is connected to a low level, the potential boosting circuit 10 is a pull-down circuit, the pull-down circuit comprises a pull-down resistor or a pull-down switching tube, and the like, and the specific setting of the potential boosting circuit 10 is correspondingly set according to requirements.

The trigger circuit 30 may be configured by at least one D-type trigger, and outputs a turn-on signal when receiving the key control signal SW, and outputs a turn-off signal or does not output a signal when not receiving the key control signal SW, and the specific circuit structure thereof is correspondingly configured, and is not limited herein.

The switching circuit 40 may adopt a switching structure having a controlled on/off function, such as an electronic switching tube, a relay, or the like.

The embodiment of the utility model provides a through adopting electric potential to draw and rise circuit 10, pilot lamp 20, trigger circuit 30 and switch circuit 40 constitute the pilot lamp circuit, trigger circuit 30 is receiving key control signal SW conversion output continuous switch-on signal to switch circuit 40, switch circuit 40 switches on, thereby be connected to the first level signal end and the second level signal end of opposite level with the both ends of pilot lamp 20, the pilot lamp 20 that corresponds mode is continuously lighted, even if output key control signal SW's button module plays this moment, pilot lamp 20 still can continue work, need not additionally to increase the output pin position, only need use original key control pin position, electronic equipment's volume and cost have been simplified.

As shown in fig. 2, in an embodiment, the indicator light circuit further includes a reset signal processing circuit 50, signal input terminals of the reset signal processing circuit 50 are respectively used for receiving a power-on reset signal output by the power-on reset circuit and an operation mode termination signal output by the signal generation module, and a signal output terminal of the reset signal processing circuit 50 is connected to a second signal input terminal of the trigger circuit 30;

a reset signal processing circuit 50 for converting the power-on reset signal and/or the operation mode termination signal into a flip-flop reset signal and outputting the same to the flip-flop circuit 30;

the flip-flop circuit 30 is configured to reset when receiving the flip-flop reset signal, and output a turn-off signal to the switch circuit 40, so that the switch circuit 40 is turned off.

In this embodiment, the reset signal processing circuit 50 is configured to receive a power-on reset signal output by the power-on reset circuit and a working mode termination signal output by the signal generation module, where the power-on reset circuit outputs the power-on reset signal to a function module set inside the electronic device after the electronic device is powered on, so that the function module is powered on and reset and switched to an initial state, and the signal generation module may be a function module inside or outside the electronic device, may be a controller inside the electronic device, or another external key module, and the specific structure is not limited.

When the reset signal processing circuit 50 receives the power-on reset signal or the working mode termination signal, the reset signal processing circuit 50 converts the power-on reset signal into a trigger reset signal, the trigger unit in the trigger circuit 30 resets after receiving the trigger reset signal, so as to output a turn-off signal to the switch circuit 40, the switch circuit 40 is turned off, the two ends of the indicator light 20 are restored to the initial state, that is, the two ends of the indicator light 20 are both connected to the first level V1, the levels of the two ends are equal, the indicator light 20 is switched to the off state, meanwhile, the working mode corresponding to the controller is ended, and the input of the next key control signal SW is waited.

The reset signal processing circuit 50 may be designed with corresponding signal processing units, as shown in fig. 3 or fig. 5, and in one embodiment, the reset signal processing circuit 50 includes a NOR gate NOR and a first not gate INV 1;

a first signal input end and a second signal input end of the NOR gate NOR are respectively used for inputting the power-on reset signal and the operation mode termination signal, a signal output end of the NOR gate NOR is connected with a signal input end of the first not gate INV1, and a signal output end of the first not gate INV1 is a signal output end of the reset signal processing circuit 50.

After any one of the power-on reset signal and the operation mode termination signal is input, the power-on reset signal and the operation mode termination signal are output to the D flip-flop in the flip-flop circuit 30 after two times of polarity inversion processing of the NOR gate NOR and the first NOR gate INV1, so that reset and restart of the D flip-flop are realized, and the lighting state of the indicator light 20 is changed.

According to different active states of the key control signal SW, two kinds of operations can be performed, that is, the key control signal SW is active low or active high, as shown in fig. 3, in one embodiment, the key control signal SW is active low, so the first level V1 of the first level signal terminal is active high, the second level V2 of the second level signal terminal is active low, the voltage pull-up circuit 10 is a pull-up circuit, and the pull-up circuit may employ a pull-up resistor or a pull-up electronic switch tube, and in one embodiment, the pull-up circuit includes a first PMOS transistor Q12, the controlled terminal of the first PMOS transistor Q12 is connected to the low level for conduction, and the second terminal of the first PMOS transistor Q12 is connected to the high level, when the key control signal SW is not input to the indicator lamp circuit, the first PMOS transistor Q12 pulls up the level of the first terminal of the indicator lamp 20 to the high level, and the indicator lamp 20 maintains the off state.

The indicator light 20 may include one or more correspondingly connected light emitting units and corresponding protection modules, such as light emitting diodes, LEDs, or light groups, as shown in fig. 3 or fig. 5, in one embodiment, the indicator light 20 includes a light emitting diode, LED, and a first resistor R1, and the first resistor R1 is used for current limiting and voltage dividing, so as to achieve the effect of protecting the light emitting diode, LED.

Meanwhile, when the key control signal SW is active at a low level, the circuit structures of the flip-flop circuit 30 and the switch circuit 40 may be correspondingly configured, as shown in fig. 3, in one embodiment, the flip-flop circuit 30 includes a second not gate INV2, a third not gate INV3, a first D flip-flop U1 and a second D flip-flop U2;

the signal input end of the second not gate INV2 is the first signal input end of the flip-flop circuit 30, the output end of the second not gate INV2 is connected with the trigger signal end D of the first D-flip-flop U1, the input end of the third not gate INV3 and the positive phase clock signal end CK of the first D-flip-flop U1 are commonly connected for receiving the clock signal CLK, the output end of the third not gate INV3 is connected with the inverse clock signal end CKB of the first D-flip-flop U1, the in-phase output end Q of the first D-flip-flop U1 is connected with the positive phase clock signal end CK of the second D-flip-flop U2, the inverse phase output end QB of the first D-flip-flop U1 is connected with the inverse clock signal end CKB of the second D-flip-flop U2, the trigger signal end D of the second D-flip-flop U2 is used for inputting the positive power supply 1, the in-phase output end Q of the second D-flip-flop U2 is the signal output end Q of the flip-flop circuit 30, and the reset signal end R1 of the first D flip-flop U2 and the second D-flip-flop U2 And (4) an end.

In one embodiment, the switching circuit 40 includes a fourth not gate INV4, a fifth not gate INV5, and a first electronic switching tube Q11;

the signal input end of the fourth not gate INV4 is the controlled end of the switch circuit 40, the output end of the fourth not gate INV4 is connected with the signal input end of the fifth not gate INV5, the signal output end of the fifth not gate INV5 is connected with the controlled end of the first electronic switch Q11, and the first end and the second end of the first electronic switch Q11 are respectively the first end and the second end of the switch circuit 40.

In this embodiment, the first electronic switch Q11 is an NMOS transistor, the signal input terminal of the flip-flop circuit 30 is connected to the trigger signal terminal D of the first flip-flop after being inverted by the second not gate INV2, meanwhile, the positive phase clock signal terminal CK and the negative phase clock signal terminal CKB of the first D flip-flop U1 are switched in the clock signal CLK with positive and negative polarities, when the rising edge of the clock signal CLK triggers, the level of the in-phase output Q of the first D flip-flop U1 is equal to the level of the trigger signal D of the first flip-flop, in other times, the level of the in-phase output Q of the first D flip-flop U1 is maintained, and the rising edge of the clock signal CLK is used for triggering to prevent false triggering or noise signals, the signals of the in-phase output Q and the anti-phase output QB of the first D flip-flop U1 are inverted signals, and the generated signal and the inverted signal thereof are used as the clock signal CLK of the second D flip-flop U2.

When the key control signal SW is input and the low level is active, and simultaneously the clock signal CLK at the positive phase clock signal terminal CK of the first D flip-flop U1 is rising, the signal SW1 at the same phase output terminal Q of the first D flip-flop U1 is rising, the signal SW _ EN at the same phase output terminal Q of the second D flip-flop U2 becomes the high level of the positive power supply VDD1 at the trigger signal terminal D of the second D flip-flop U2, at this time, the first electronic switch Q11 is turned on, after voltage division by the two MOS transistors, the level of the first terminal of the LED is switched to the low level, and the LED is turned on.

When the key control signal SW is inactive, the level of the in-phase output Q of the second D flip-flop U2 is low, the first electronic switch Q11 is turned off, and the first end of the light emitting diode LED keeps high due to the pull-up action of the first PMOS transistor Q12.

When the low level of the key control signal SW is active, the waveform diagram of each signal is as shown in fig. 4, for convenience of comparison, a SW _ RAW signal is added in fig. 4 to represent the action of manually operating the key, the key is pressed, and SW _ RAW is low level; the key is released and SW _ RAW is high.

When the key is pressed, the SW _ RAW and the key control signal SW are at low level, and after the key action is determined to be effective through a short period of time acted by the clock signal CLK, the signal SW1 of the same-phase output terminal Q of the first D flip-flop U1 becomes high level, the signal SW _ EN of the same-phase output terminal Q of the second D flip-flop U2 becomes high level, the first electronic switch tube Q11 is turned on, the level of the first terminal of the light emitting diode LED becomes low level, and the light emitting diode LED lights up, at this time, even if the key module bounces up (i.e., the SW _ RAW signal becomes high level) after the user releases his hand, the signal input terminal of the flip-flop circuit 30 will continue to keep low level, the light emitting diode LED keeps on until the working mode terminating signal is inputted, and when the working mode terminating signal is generated, the signal SW _ EN of the same-phase output terminal Q of the second D flip-flop U2 is reset to low level, the first electronic switching tube Q11 is turned off, the signal input terminal of the trigger circuit 30 becomes high level, and the light emitting diode LED is turned off.

After realizing pressing the key module through this mode, electronic equipment's mode begins to work, and pilot lamp 20 lights simultaneously, even loosen the key module after, the key module bounces, pilot lamp 20 still can keep bright state, does not increase other foot position, and uses original key control foot position, can realize the bright control of going out of pilot lamp 20 that corresponds mode.

In another embodiment, as shown in fig. 5, the first level V1 of the first level signal terminal is a low level, the second level V2 of the second level signal terminal is a high level, the voltage pull-up circuit 10 is a pull-down circuit, and the pull-down circuit may include a pull-down resistor or a pull-down electronic switching tube, and in one embodiment, the pull-down circuit includes a second NMOS tube Q22, the controlled terminal of the second NMOS tube Q22 is connected to a high level for conducting, and at the same time, the second terminal of the second NMOS tube Q22 is connected to a low level, when the key control signal SW is not input to the indicator light circuit, the second NMOS tube Q22 pulls down the voltage level of the first terminal of the indicator light 20 to a low level, and the indicator light 20 maintains the off state.

Meanwhile, when the key control signal SW is active at a high level, the circuit structures of the flip-flop circuit 30 and the switch circuit 40 may be correspondingly configured, as shown in fig. 5, in one embodiment, the flip-flop circuit 30 includes a sixth not gate INV6, a third D flip-flop U3, and a fourth D flip-flop U4;

a trigger signal terminal D of the third D flip-flop U3 is a signal input terminal of the flip-flop circuit 30, an input terminal of the sixth not gate INV6 and the positive phase clock signal terminal CK of the third D flip-flop U3 are commonly connected to receive the clock signal CLK, an output terminal of the sixth not gate INV6 is connected to the inverted clock signal terminal CKB of the third D flip-flop U3, an in-phase output terminal Q of the third D flip-flop U3 and the positive phase clock signal terminal CK of the fourth D flip-flop U4, an inverted phase output terminal QB of the third D flip-flop U3 is connected to the inverted clock signal terminal CKB of the fourth D flip-flop U4, a trigger signal terminal D of the fourth D flip-flop U4 is used for inputting a positive power source, an in-phase output terminal Q of the fourth D flip-flop U4 is a signal output terminal of the flip-flop circuit 30, and a reset signal terminal R of the third D flip-flop U3 and the reset signal terminal R of the fourth D flip-flop U4 are commonly connected to form a second signal input terminal of the flip-flop circuit 30.

In one embodiment, the switch circuit 40 includes a seventh not gate INV7, an eighth not gate INV8, a ninth not gate INV9, and a second electronic switch Q21;

a signal input end of the seventh not gate INV7 is a controlled end of the switch circuit 40, an output end of the seventh not gate INV7 is connected with a signal input end of the eighth not gate INV8, a signal output end of the eighth not gate INV8 is connected with a signal input end of the ninth not gate INV9, a signal output end of the ninth not gate INV9 is connected with a controlled end of the second electronic switch Q21, and a first end and a second end of the second electronic switch Q21 are respectively a first end and a second end of the switch circuit 40.

In this embodiment, the second electronic switch Q21 is a second PMOS transistor, the signal input terminal of the flip-flop circuit 30 is connected to the trigger signal terminal D of the first flip-flop, meanwhile, the positive phase clock signal terminal CK and the negative phase clock signal terminal CKB of the third D flip-flop U3 are switched in the clock signal CLK with positive and negative polarities, when the rising edge of the clock signal CLK triggers, the level of the in-phase output Q of the third D flip-flop U3 is equal to the level of the trigger signal D of the first flip-flop, in other times, the level of the in-phase output Q of the third D flip-flop U3 is maintained, and the rising edge of the clock signal CLK is used for triggering to prevent false triggering or noise signals, the signals of the in-phase output Q and the anti-phase output QB of the third D flip-flop U3 are inverted signals, and the generated signal and the inverted signal thereof are used as the clock signal CLK of the fourth D flip-flop U4.

When the key control signal SW is input and the high level is active, and simultaneously the clock signal CLK at the positive phase clock signal terminal CK of the third D flip-flop U3 is a rising edge, the signal SW1 at the same phase output terminal Q of the third D flip-flop U3 is a rising edge, the signal SW _ EN at the same phase output terminal Q of the fourth D flip-flop U4 becomes the high level of the positive power supply VDD1 at the trigger signal terminal D of the fourth D flip-flop U4, and is converted by three not gates, at this time, the second electronic switch Q21 receives the low level turn-on, after the voltage division by two MOS transistors, the level of the first terminal of the light emitting diode LED is switched to the high level, and the light emitting diode LED is turned on.

When the key control signal SW is inactive, the level of the in-phase output Q of the fourth D flip-flop U4 is low, the second electronic switch Q21 is turned off, and the first end of the light emitting diode LED is kept low due to the pull-down action of the second NMOS transistor Q22.

When the high level of the key control signal SW is active, the waveform diagram of each signal is as shown in fig. 6, for convenience of comparison, a SW _ RAW signal is added in fig. 6 to represent the action of manually operating the key, and the key is pressed, and SW _ RAW is high level; the key is released, and SW _ RAW is low.

When the key is pressed, the SW _ RAW and the key control signal SW are at high level, and after a short period of time under the action of the clock signal CLK, the key action is determined to be valid, the signal SW1 at the same-phase output terminal Q of the third D flip-flop U3 becomes high level, the signal SW _ EN at the same-phase output terminal Q of the fourth D flip-flop U4 becomes high level, the second electronic switch tube Q21 is turned on, the level of the first terminal of the LED becomes high level, and the LED is turned on, at this time, even if the key module bounces after the user releases his hand (i.e., the SW _ RAW signal becomes low level), the signal input terminal of the flip-flop circuit 30 will continue to maintain high level, the LED will remain on until the working mode terminating signal is inputted, and when the working mode terminating signal is generated, the signal SW _ EN at the same-phase output terminal Q of the fourth D flip-flop U4 will be reset to low level, the second electronic switch Q21 is turned off, the signal input terminal of the trigger circuit 30 becomes low level, and the indicator light 20 is turned off.

After realizing pressing the key module through this mode, electronic equipment's mode begins to work, and pilot lamp 20 lights simultaneously, even loosen the key module after, the key module bounces, pilot lamp 20 still can keep bright state, does not increase other foot position, and uses original key control foot position, can realize the bright control of going out of pilot lamp 20 that corresponds mode.

The utility model also provides an electronic equipment, this electronic equipment include the pilot lamp circuit, and the concrete structure of this pilot lamp circuit refers to above-mentioned embodiment, because this electronic equipment has adopted the whole technical scheme of above-mentioned all embodiments, consequently has all beneficial effects that the technical scheme of above-mentioned embodiment brought at least, and the repeated description is no longer given here.

The above-mentioned embodiments are only used for illustrating the technical solution of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.

Claims (10)

1. An indicator light circuit is used for indicating the working mode of electronic equipment and is characterized in that the indicator light circuit comprises a potential pull-up circuit, an indicator light, a trigger circuit and a switch circuit;

the first end of the indicator light, the first signal input end of the trigger circuit, the first end of the switch circuit and the first end of the potential pull-up circuit are connected together to form a signal end of the indicator light circuit, the signal output end of the trigger circuit is connected with the controlled end of the switch circuit, the second end of the indicator light and the second end of the potential pull-up circuit are respectively connected with a first level signal end, the second end of the switch circuit is connected with a second level signal end, and the levels of the first level signal end and the second level signal end are opposite;

the potential boosting circuit is used for boosting the level of the first end of the indicator lamp to a first level when a key control signal is not received, and the level of the key control signal is the same as that of the second level signal end;

the trigger circuit is used for converting the received key control signal into a continuous conducting signal and outputting the continuous conducting signal to the switch circuit;

the switch circuit is used for being switched on when receiving the switching-on signal and raising the level of the first end of the indicator lamp to a second level so as to enable the indicator lamp to be lightened.

2. The indicator lamp circuit according to claim 1, wherein the indicator lamp circuit further comprises a reset signal processing circuit, signal input terminals of the reset signal processing circuit are respectively used for receiving a power-on reset signal output by the power-on reset circuit and an operation mode termination signal output by the signal generation module, and a signal output terminal of the reset signal processing circuit is connected with a second signal input terminal of the trigger circuit;

the reset signal processing circuit is used for converting the power-on reset signal and/or the working mode termination signal into a trigger reset signal and outputting the trigger reset signal to the trigger circuit;

the trigger circuit is used for resetting when receiving the trigger reset signal and outputting a turn-off signal to the switch circuit so as to turn off the switch circuit.

3. The indicator lamp circuit according to claim 2, wherein the reset signal processing circuit comprises a nor gate and a first not gate;

the first signal input end and the second signal input end of the nor gate are respectively used for inputting the power-on reset signal and the working mode termination signal, the signal output end of the nor gate is connected with the signal input end of the first not gate, and the signal output end of the first not gate is the signal output end of the reset signal processing circuit.

4. The indicator lamp circuit according to claim 3, wherein the level of the first level signal terminal is a high level, the level of the second level signal terminal is a low level, and the potential pull-up circuit is a pull-up circuit.

5. The indicator light circuit of claim 4, wherein the trigger circuit comprises a second not gate, a third not gate, a first D flip-flop, and a second D flip-flop;

the signal input end of the second not gate is the first signal input end of the trigger circuit, the output end of the second not gate is connected with the trigger signal end of the first D trigger, the input end of the third not gate and the normal phase clock signal end of the first D trigger are connected together for receiving clock signals, the output end of the third not gate is connected with the reverse phase clock signal end of the first D trigger, the same phase output end of the first D trigger is connected with the normal phase clock signal end of the second D trigger, the reverse phase output end of the first D trigger is connected with the reverse phase clock signal end of the second D trigger, the trigger signal end of the second D trigger is used for inputting a positive power supply, the same phase output end of the second D trigger is the signal output end of the trigger circuit, the reset signal end of the first D trigger and the reset signal end of the second D trigger are connected together to form the second signal input end of the trigger circuit Two signal input terminals.

6. The indicator light circuit according to claim 4, wherein the switch circuit comprises a fourth not gate, a fifth not gate and a first electronic switch tube;

the signal input end of the fourth not gate is the controlled end of the switch circuit, the output end of the fourth not gate is connected with the signal input end of the fifth not gate, the signal output end of the fifth not gate is connected with the controlled end of the first electronic switch tube, and the first end and the second end of the first electronic switch tube are respectively the first end and the second end of the switch circuit.

7. The indicator light circuit according to claim 3, wherein the level of the first level signal terminal is a low level, the level of the second level signal terminal is a high level, and the potential pull-up circuit is a pull-down circuit.

8. The indicator light circuit of claim 7, wherein the trigger circuit comprises a sixth not gate, a third D trigger, and a fourth D trigger;

the trigger signal end of the third D flip-flop is the signal input end of the flip-flop circuit, the input end of the sixth not gate and the non-inverting clock signal end of the third D flip-flop are commonly connected for receiving a clock signal, the output end of the sixth not gate is connected with the inverted clock signal end of the third D flip-flop, the in-phase output end of the third D flip-flop is connected with the non-inverted clock signal end of the fourth D flip-flop, the inverted phase output end of the third D flip-flop is connected with the inverted clock signal end of the fourth D flip-flop, the trigger signal end of the fourth D flip-flop is used for inputting a positive power supply, the same phase output end of the fourth D flip-flop is the signal output end of the flip-flop circuit, and the reset signal end of the third D trigger and the reset signal end of the fourth D trigger are connected in common to form a second signal input end of the trigger circuit.

9. The indicator light circuit according to claim 7, wherein the switch circuit comprises a seventh not gate, an eighth not gate, a ninth not gate and a second electronic switch tube;

the signal input end of the seventh not gate is the controlled end of the switch circuit, the output end of the seventh not gate is connected with the signal input end of the eighth not gate, the signal output end of the eighth not gate is connected with the signal input end of the ninth not gate, the signal output end of the ninth not gate is connected with the controlled end of the second electronic switch tube, and the first end and the second end of the second electronic switch tube are respectively the first end and the second end of the switch circuit.

10. An electronic device, characterized by comprising an indicator light circuit according to any one of claims 1 to 9.

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