CN214177269U - Power amplifier for satellite load - Google Patents
Power amplifier for satellite load Download PDFInfo
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- CN214177269U CN214177269U CN202120403816.4U CN202120403816U CN214177269U CN 214177269 U CN214177269 U CN 214177269U CN 202120403816 U CN202120403816 U CN 202120403816U CN 214177269 U CN214177269 U CN 214177269U
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Abstract
The utility model discloses a power amplifier for satellite load, include: the device comprises an input blocking capacitor, a broadband input matching network, a GaN type power amplification transistor, a broadband output matching network and an output blocking capacitor; the signal input end of the power amplifier is connected to a broadband input matching network through an input blocking capacitor, the output end of the broadband input matching network is connected with the base electrode of a GaN type power amplification transistor, the drain electrode of the GaN type power amplification transistor is connected with a broadband output matching network, the source electrode of the GaN type power amplification transistor is grounded, the broadband output matching network is connected with the signal output end of the power amplifier through an output blocking capacitor, the broadband input and output matching networks are in a wide and narrow line matching mode and do not comprise any short circuit branch or open circuit branch, the broadband input and output matching networks are formed by cascading microstrip lines with different widths, an impedance transformation band-pass filter is used for matching, the bandwidth of the amplifier can be improved under the condition that the efficiency and the high power output are kept to be improved, and the performance of the amplifier is effectively improved.
Description
Technical Field
The utility model relates to a satellite communication technical field, concretely relates to a power amplifier for satellite load.
Background
The power amplifier is an indispensable device in a transmitting circuit of a microwave frequency band, and is used for amplifying a signal to be transmitted to high power and then transmitting the signal to an antenna for wireless transmission. Because the power output by the power amplifier directly determines the communication distance in the communication link, the transmission distance is long and the channel change is large particularly for the satellite communication link; a high power transmitter is required to meet the communication requirements.
Therefore, for satellite communication, the output power of the power amplifier is the most important index, and the bandwidth and efficiency of the power amplifier are also important indexes of the power amplifier.
(1) Bandwidth of the satellite-borne power amplifier. The traditional communication adopts a narrow-band and low-rate communication mode to ensure the communication quality; with the development of low-earth-orbit satellite communication, the bandwidth requirement for satellite communication is gradually increased. Compared with a medium-high orbit satellite, the communication distance of the low-orbit satellite is greatly reduced, so that the requirement of high-bandwidth communication can be met; also, the satellite-borne power amplifier has a higher bandwidth requirement.
(2) Efficiency of the satellite-borne power amplifier. Due to limited power resources on the satellite and poor heat dissipation in vacuum; the final stage of the power amplifier as the transmission link consumes much dc power, so that the efficiency of the power amplifier is required to be improved to meet the purposes of reducing power resource consumption on the satellite and reducing heat dissipation burden.
Based on the above factors, the conventional method of the conventional high-power amplifier generally adopts an E-type or F-type power amplifier to improve the efficiency, but the impedance matching design is generally performed only on a single frequency point when a matching circuit is implemented, and when the input/output impedance or frequency of the power amplifier is changed due to temperature drift, input power change and other reasons, the matching circuit of the power amplifier will greatly affect the output signal, so that the performance of the power amplifier is attenuated, and the overall communication quality is affected. Therefore, it is necessary to further improve the bandwidth of the satellite-borne power amplifier.
SUMMERY OF THE UTILITY MODEL
In order to solve the technical problem, the utility model provides a power amplifier for satellite load.
The utility model discloses a following technical scheme realizes:
the present solution provides a power amplifier for satellite loads, comprising: the device comprises an input blocking capacitor, a broadband input matching network, a GaN type power amplification transistor, a broadband output matching network and an output blocking capacitor;
the signal input end of the power amplifier is connected to the broadband input matching network through the input blocking capacitor, the output end of the broadband input matching network is connected with the base electrode of the GaN type power amplification transistor, the drain electrode of the GaN type power amplification transistor is connected with the broadband output matching network, the source electrode of the GaN type power amplification transistor is grounded, and the broadband output matching network is connected to the signal output end of the power amplifier through the output blocking capacitor.
The input blocking capacitor, the grid electrode bias network and the drain electrode bias network debug corresponding parameters through simulation so as to reduce the influence on matching as much as possible.
The further optimization scheme is that the device also comprises a grid electrode bias unit and a drain electrode bias unit;
the input end of the grid biasing unit is externally connected with a current pad powered by a grid, and the output end of the grid biasing unit is connected between the input blocking capacitor and the broadband input matching network;
the input end of the drain electrode biasing unit is externally connected with a current pad powered by a drain electrode, and the output end of the drain electrode biasing unit is connected between the broadband output matching network and the output blocking capacitor.
The further optimization scheme is that the gate bias unit further comprises a first choke line F1 and a capacitor C1; one end of the capacitor C1 is connected with the input end of the grid bias unit, and the other end is grounded; the input end of the grid biasing unit is connected between the input blocking capacitor and the broadband input matching network through a first choke line F1;
the drain bias unit further comprises a second choke line F2 and a capacitor C2; one end of the capacitor C2 is connected with the input end of the drain electrode bias unit, and the other end is grounded; the input terminal of the drain bias unit is connected between the broadband output matching network and the output blocking capacitor via a second choke line F2.
In a further preferred embodiment, the gate bias unit further includes a stabilizing resistor R1, and the stabilizing resistor R1 is connected in series to the first choke line F1.
The first stabilizing resistor R1 ensures that the power amplifier works in a stable state
The further optimization scheme is that the broadband input matching network and the broadband output matching network are formed by cascading microstrip lines with different lengths and widths.
The further optimization scheme is that the microstrip lines with different lengths and widths at least comprise: the GaN-based power amplifier comprises a conjugate matching microstrip line, a broadband matching microstrip line, a Norton transformation microstrip line and an impedance matching microstrip line aiming at the GaN-based power amplifier transistor.
The broadband input matching network and the broadband output matching network are both in a wide-narrow line matching mode, do not comprise any short circuit branch or open circuit branch, and are formed by cascading microstrip lines with different widths.
Compared with the prior art, the utility model, following advantage and beneficial effect have:
the utility model provides a power amplifier for satellite load, its broadband input matching network and broadband output matching network all are wide narrow line matching mode, all do not contain any short circuit stub or open a way stub, only cascade with the microstrip line of different width and form, the impedance transformation band pass filter who utilizes broadband input matching network and broadband output matching network to constitute matches, can improve the amplifier bandwidth under keeping raising the efficiency and high power output, effectively promote the performance of amplifier.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention.
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a schematic diagram of a circuit topology of a broadband output matching network;
FIG. 3 is a schematic diagram of a microstrip line topology of a broadband output matching network;
figure 4 is a schematic diagram of an embodiment power amplifier microstrip line;
fig. 5 is a diagram illustrating simulation results of a power amplifier according to an embodiment.
Detailed Description
To make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the following examples and drawings, and the exemplary embodiments and descriptions thereof of the present invention are only used for explaining the present invention, and are not intended as limitations of the present invention.
Example 1
The conventional high-efficiency power amplifier (class E, class F) adopts a half-cosine current waveform, and its normalized output current formula is:
the voltage waveform is expressed as a square waveform formed by overlapping a plurality of odd harmonics, and the normalized voltage output formula is as follows:
the optimal output impedance for each harmonic of the current can be expressed as:
wherein n represents the number of harmonic waves, and the result requires that each harmonic frequency point corresponds to an optimal impedance requirement, thereby providing high difficulty for broadband design. When the operating frequency shifts from the center frequency, the impedance also shifts, which degrades the performance of the amplifier, so the prior art generally performs a narrow-band design.
The modified and normalized voltage formula proposed in the prior art:
the correction factor changes the optimum impedance value from a point (γ ═ 0) to a continuous line, the change trend is a continuous curve extending up and down along the equal impedance circle with γ ═ 0 as the midpoint, and the optimum impedance matching becomes a smooth continuous curved surface, so that a broadband matching network needs to be designed to increase the bandwidth of the power amplifier.
For the broadband matching network, the applicant adopted a broadband matching scheme based on wide and narrow line bandpass filters (broadband input matching network and broadband output matching network).
Corresponding power amplifier configuration as shown in fig. 1, a power amplifier for satellite loading, comprising: the device comprises an input blocking capacitor, a broadband input matching network, a GaN type power amplification transistor, a broadband output matching network and an output blocking capacitor;
the signal input end of the power amplifier is connected to the broadband input matching network through the input blocking capacitor, the output end of the broadband input matching network is connected with the base electrode of the GaN type power amplification transistor, the drain electrode of the GaN type power amplification transistor is connected with the broadband output matching network, the source electrode of the GaN type power amplification transistor is grounded, and the broadband output matching network is connected to the signal output end of the power amplifier through the output blocking capacitor.
The grid bias unit and the drain bias unit are also included;
the input end of the grid biasing unit is externally connected with a current pad powered by a grid, and the output end of the grid biasing unit is connected between the input blocking capacitor and the broadband input matching network;
the input end of the drain electrode biasing unit is externally connected with a current pad powered by a drain electrode, and the output end of the drain electrode biasing unit is connected between the broadband output matching network and the output blocking capacitor.
The gate bias unit further comprises a first choke line F1 and a capacitor C1; one end of the capacitor C1 is connected with the input end of the grid bias unit, and the other end is grounded; the input end of the grid biasing unit is connected between the input blocking capacitor and the broadband input matching network through a first choke line F1;
the drain bias unit further comprises a second choke line F2 and a capacitor C2; one end of the capacitor C2 is connected with the input end of the drain electrode bias unit, and the other end is grounded; the input terminal of the drain bias unit is connected between the broadband output matching network and the output blocking capacitor via a second choke line F2.
The gate bias unit further includes a stabilization resistor R1, the stabilization resistor R1 being connected in series to the first choke line F1.
The broadband input matching network and the broadband output matching network are formed by cascading microstrip lines with different lengths and widths.
Microstrip lines of unequal length and width at least include: conjugate matching microstrip line, broadband matching microstrip line, norton transformation microstrip line and impedance matching microstrip line for GaN type power amplifying transistor
Example 2
For broadband input and output matching networks, applicants have adopted a broadband matching scheme based on wide and narrow line bandpass filters.
The broadband output matching process specifically comprises the following steps:
acquiring an impedance curve of the output end of the GaN power transistor;
conjugate matching is carried out on the GaN power transistor by using L1, a point gamma is 0 and is matched to be intersected with a pure impedance axis, and the whole curve is in a symmetrical form on a Smith chart by taking the pure impedance axis as a central axis;
the impedance is compressed by using a series inductive/capacitive device, so that the impedance has a broadband matching condition; meanwhile, the capacitors C1, C2 and C3 are used for realizing the Norton transformation, so that the impedance is changed to the output load impedance;
using impedance matching after L3, C4, the impedance profile exhibited on the smith chart is both continuous and rotated around the center frequency point.
(broadband output matching circuit topology as shown in FIG. 2)
The schematic diagram after the circuit topology structure in fig. 2 is converted into the microstrip line topology structure is shown in fig. 3; wherein Z1 corresponds to L1, Z2 corresponds to L2, Z3 corresponds to C2, Z4 corresponds to C1, Z5 corresponds to C3, Z6 corresponds to L3, and Z7 corresponds to C4.
The specific conversion process is as follows: analyzing and illustrating the original on a Smith chart, and determining the length and the width of the microstrip line by solving a parameter equation; determining so that it exhibits a desired capacitance characteristic or inductance characteristic within a frequency band; (in this embodiment, the length of the Z1 microstrip line is 5.4mm, the width is 0.8mm, the length of the Z2 microstrip line is 7.0mm, the width is 9.1mm, the length of the Z3 microstrip line is 2.1mm, the width is 15.8mm, the length of the Z4 microstrip line is 10.5mm, the width is 18mm, the length of the Z5 microstrip line is 18.6mm, the width is 9.1mm, the length of the Z6 microstrip line is 3.2mm, the width is 5.0mm, the length of the Z7 microstrip line is 10.1mm, the width is 7.7mm)
Also, the above process can result in wideband input matching.
Fig. 4 is the microstrip line schematic diagram finally established in the present invention, wherein: and a stabilizing resistor is added into the grid biasing network to ensure that the power amplifier works in a stable state.
The current in the drain electrode bias network is large, and a choke microstrip line and a grounding capacitor are added to prevent signals from being connected into the microstrip line without adding a resistor.
The simulation result of this embodiment is shown in fig. 5, and it can be seen that the overall efficiency of the power amplifier is higher than 70%, and reaches 79% at most.
The simulation output power is generally higher than 40dBm in a frequency band between 1.6GHz and 2.6GHz, the 3dB bandwidth is about 1.2GHz, the relative bandwidth is close to 50 percent, and the in-band gain is higher than 10 dB.
The above-mentioned embodiments, further detailed description of the objects, technical solutions and advantages of the present invention, it should be understood that the above description is only the embodiments of the present invention, and is not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (6)
1. A power amplifier for satellite payload, comprising: the device comprises an input blocking capacitor, a broadband input matching network, a GaN type power amplification transistor, a broadband output matching network and an output blocking capacitor;
the signal input end of the power amplifier is connected to the broadband input matching network through the input blocking capacitor, the output end of the broadband input matching network is connected with the base electrode of the GaN type power amplification transistor, the drain electrode of the GaN type power amplification transistor is connected with the broadband output matching network, the source electrode of the GaN type power amplification transistor is grounded, and the broadband output matching network is connected to the signal output end of the power amplifier through the output blocking capacitor.
2. A power amplifier for satellite payload as defined in claim 1, further comprising a gate bias unit and a drain bias unit;
the input end of the grid biasing unit is externally connected with a current pad powered by a grid, and the output end of the grid biasing unit is connected between the input blocking capacitor and the broadband input matching network;
the input end of the drain electrode biasing unit is externally connected with a current pad powered by a drain electrode, and the output end of the drain electrode biasing unit is connected between the broadband output matching network and the output blocking capacitor.
3. A power amplifier for satellite payload as claimed in claim 2,
the gate bias unit further comprises a first choke line F1 and a capacitor C1; one end of the capacitor C1 is connected with the input end of the grid bias unit, and the other end is grounded; the input end of the grid biasing unit is connected between the input blocking capacitor and the broadband input matching network through a first choke line F1;
the drain bias unit further comprises a second choke line F2 and a capacitor C2; one end of the capacitor C2 is connected with the input end of the drain electrode bias unit, and the other end is grounded; the input terminal of the drain bias unit is connected between the broadband output matching network and the output blocking capacitor via a second choke line F2.
4. A power amplifier for satellite loads according to claim 3, characterized in that the gate bias unit further comprises a stabilizing resistor R1, the stabilizing resistor R1 being connected in series to the first choke line F1.
5. The power amplifier of claim 1, wherein the broadband input matching network and the broadband output matching network are formed by cascading microstrip lines with different lengths and widths.
6. A power amplifier for satellite loads according to claim 5, characterized in that the microstrip lines of unequal length and width comprise at least: the GaN-based power amplifier comprises a conjugate matching microstrip line, a broadband matching microstrip line, a Norton transformation microstrip line and an impedance matching microstrip line aiming at the GaN-based power amplifier transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120403816.4U CN214177269U (en) | 2021-02-24 | 2021-02-24 | Power amplifier for satellite load |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120403816.4U CN214177269U (en) | 2021-02-24 | 2021-02-24 | Power amplifier for satellite load |
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| Publication Number | Publication Date |
|---|---|
| CN214177269U true CN214177269U (en) | 2021-09-10 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202120403816.4U Active CN214177269U (en) | 2021-02-24 | 2021-02-24 | Power amplifier for satellite load |
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| Country | Link |
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| CN (1) | CN214177269U (en) |
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2021
- 2021-02-24 CN CN202120403816.4U patent/CN214177269U/en active Active
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