CN214122392U - Semiconductor thermoelectric chip cold and hot impact testing device - Google Patents
Semiconductor thermoelectric chip cold and hot impact testing device Download PDFInfo
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- CN214122392U CN214122392U CN202022816980.6U CN202022816980U CN214122392U CN 214122392 U CN214122392 U CN 214122392U CN 202022816980 U CN202022816980 U CN 202022816980U CN 214122392 U CN214122392 U CN 214122392U
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Abstract
The utility model discloses a cold and hot impact testing arrangement of semiconductor thermoelectric chip, including heat dissipation platform, PLC controller, temperature sensor and touch module, the heat dissipation platform has the bearing face, be provided with the graphite flake on the bearing face, temperature sensor is used for detecting the temperature of the chip that awaits measuring, the PLC controller has one or more pairs of output electrode and all the way or multichannel temperature sensor input interface, output electrode is used for being connected with the chip that awaits measuring, the PLC controller is used for controlling output electrode's polarity, the heat dissipation platform is the high-purity aluminium cavity of surface anodization, has the pure water as heat-dissipating medium in its cavity. The utility model provides a cold and hot impact testing arrangement of semiconductor thermoelectric chip can detect a plurality of objects simultaneously, and control accuracy, detection precision are high, and test condition is stable.
Description
Technical Field
The utility model relates to a semiconductor device aging testing and reliability evaluation device, especially a cold and hot impact testing arrangement of semiconductor thermoelectric chip.
Background
Semiconductor refrigeration originated in the 50's of the 20 th century, and is favored by a large number of industrial applications due to its characteristics of simple structure, no refrigerant, convenient regulation and control, no noise, rapid power-on refrigeration, and the like. The semiconductor material with remarkable thermoelectric effect and high semiconductor refrigeration efficiency has a refrigeration function when passing through direct current, so the semiconductor material is also called semiconductor refrigeration and is very convenient for being used in some special small spaces, and the cost of a micro air conditioning device of dozens of watts is far lower than that of a compression refrigeration device, so the semiconductor material has the advantage that the compression refrigeration device cannot replace the compression refrigeration device in the aspects of electronic equipment cooling and local microenvironment temperature control, and the application of a small and medium semiconductor refrigeration system in the fields of laser, radar, CPU/GPU heat dissipation, high-precision temperature control of a micro-nano test system, high-end intelligence and the like becomes possible. The theoretical life of the semiconductor refrigerating/power generating sheet is long, about 30 ten thousand hours; the actual service life is greatly different according to different use conditions, and the use for 5 ten thousand hours is easily achieved under the conditions of no overcurrent, no overvoltage, good heat dissipation of a cold end (particularly a hot end) and no illegal operation (heavy pressure, beating, sudden switching of a refrigeration and heating mode in the working process and the like). However, the reliability requirement and the crux of the related application fields for the semiconductor refrigeration device are that the failure rate of the semiconductor refrigeration device generally cannot exceed one ten thousandth, so the cold-heat impact aging test of the device is a necessary and important process step before the product leaves a factory, and is also a characteristic index for measuring the durability of the semiconductor thermoelectric chip, most of the existing semiconductor thermoelectric chip cold-heat impact testing devices only switch the polarity of a power supply at equal time intervals or only switch the polarity of the power supply depending on temperature values, one testing system can only test one piece of semiconductor thermoelectric chip, and the related testing devices have the following disadvantages:
1. the same time interval and temperature value of power supply polarity conversion can not be met at the same time in each impact test;
2. the environmental parameters of each impact are different;
3. the testing efficiency is low.
SUMMERY OF THE UTILITY MODEL
In order to solve the problem existing in the prior art, the utility model provides a cold and hot impact testing device of semiconductor thermoelectric chip to overcome the not enough of current cold and hot impact testing device. The utility model discloses a concrete technical scheme as follows:
the utility model provides a cold and hot impact test device of semiconductor thermoelectric chip, cold and hot impact test device includes:
the heat dissipation platform is provided with a bearing surface for bearing a chip to be tested, and the area of the bearing surface is more than or equal to 300mm x 400 mm;
the temperature sensor is used for measuring the temperature of the upper surface of the chip to be measured;
the PLC controller is connected with the temperature sensor, the PLC controller is further provided with a plurality of pairs of output electrodes and a plurality of paths of temperature sensor input interfaces, the output electrodes are respectively used for simultaneously carrying out impact test on a plurality of chips, the output electrodes are used for being connected with the chips to be tested, and the PLC controller is used for controlling the polarity of the output electrodes.
Further, the cold and hot impact testing device comprises
The touch control module is used for controlling the PLC and/or used for displaying the test flow record.
Further, the heat dissipation platform is an aluminum platform with an anodized outer surface, and the heat dissipation platform is provided with a cavity, and a heat dissipation medium is contained in the cavity.
Further, the heat dissipation medium in the cavity is purified water.
Further, a graphite sheet is arranged on the bearing surface, and the area of the graphite sheet is larger than or equal to 300mm x 400 mm.
Further, the temperature sensor is a PT100 resistance temperature sensor.
Further, the touch module includes a touch screen.
Further, the heat dissipation platform is provided with a constant temperature control module, and the constant temperature control module is used for keeping the heat dissipation platform at a constant temperature.
The utility model provides a beneficial effect that technical scheme brought as follows:
a. the test efficiency is high due to the simultaneous test of a plurality of chips;
the PLC has an intelligent control function, and the test precision is higher;
c. the constant-temperature heat dissipation platform has the function of controlling variables during testing, so that a device service life evaluation model is conveniently constructed;
d. the testing device can simultaneously control the polarity and the temperature of the chip to be tested, and can simulate the working condition of an actual device to test impact.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic diagram of a device for testing cold and hot shock of a semiconductor thermoelectric chip according to an embodiment of the present invention.
Wherein the reference numerals are respectively: the method comprises the following steps of 1-a PLC (programmable logic controller), 2-a touch screen, 3-a temperature sensor, 4-a chip to be detected, 5-a graphite sheet, 6-a heat dissipation platform and 7-an output electrode.
Detailed Description
In order to make the technical solution of the present invention better understood, the technical solution of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts shall belong to the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, apparatus, article, or device that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or device.
In an embodiment of the present invention, there is provided a semiconductor thermoelectric chip thermal shock testing apparatus, as shown in fig. 1, the thermal shock testing apparatus includes:
the heat dissipation platform 6 is provided with a bearing surface for bearing the chip 4 to be tested, and the chip 4 to be tested can be a semiconductor refrigerating piece/power generation piece; the area size of the bearing surface is more than or equal to 300mm x 400mm, so that a plurality of chips 4 to be tested can be detected simultaneously;
the temperature sensor 3 is used for measuring the temperature of the upper surface of the chip 4 to be measured; preferably, the temperature sensor 3 is a PT100 resistance temperature sensor, and has high sensitivity and good stability;
Further, the cold and hot impact testing device comprises a touch module, wherein the touch module is used for controlling the PLC 1, and/or the touch module is used for displaying a test flow record, and preferably the touch module comprises a touch screen 2.
In a specific embodiment of the present invention, the heat dissipation platform 6 is an aluminum platform with an anodized outer surface, and the metal aluminum has the advantages of low density and good heat conduction effect, and preferably high-purity aluminum, i.e. aluminum with a purity higher than 99%; the heat dissipation platform 6 is provided with a cavity, and a heat dissipation medium is contained in the cavity and has the function of heat relaxation; the heat dissipation medium is preferably pure water, and the specific heat capacity of water is the largest, so that the heat relaxation effect is good.
Preferably, be provided with graphite flake 5 on the bearing surface, the area of graphite flake 5 is more than or equal to the area of the chip 4 that awaits measuring, and the chip 4 that awaits measuring is placed on graphite flake 5, and its lower surface contacts with graphite flake 5, because graphite flake 5 have special lattice direction, can make heat conduction even to make the temperature distribution of the chip 4 lower surface that awaits measuring even.
The heat dissipation platform 6 is further provided with a constant temperature control module, and the constant temperature control module is used for keeping the heat dissipation platform 6 at a constant temperature.
In a specific application implementation, when carrying out cold and hot shock test, chip 4 that awaits measuring places on graphite flake 5, and output electrode 7 and the chip 4 that awaits measuring of PLC controller 1 are connected, as shown in fig. 1, the PLC controller switches over with polarity according to the circular telegram of the temperature control output electrode of chip upper surface, and the polarity upset can lead to the chip that awaits measuring refrigeration or heat, because the lower surface and the homothermal graphite flake contact of the chip that awaits measuring, consequently can obtain controlling measuring the time rate of change of the upper surface temperature of chip.
In an embodiment of the present invention, the length of the supporting surface is greater than or equal to the sum of the lengths of the three chips 4 to be tested, and the width of the supporting surface is greater than or equal to the sum of the widths of the three chips 4 to be tested; the length of the bearing surface is less than or equal to the sum of the lengths of the five chips 4 to be tested, and the width of the bearing surface is less than or equal to the sum of the widths of the three chips 4 to be tested; therefore, the cold and hot impact testing device can simultaneously detect 9-16 chips, and when higher detection efficiency is ensured, the volume of the device is controlled to a certain degree, and meanwhile, the chips 4 to be tested can be arranged into 3 x 3 or 4 x 4 arrays, so that the space can be further saved, the consumable material of a manufacturing device can be saved, and the cost is reduced.
Realize the utility model discloses a concrete technical scheme of purpose is:
the utility model provides a cold and hot impact testing arrangement of semiconductor thermoelectric chip, test system includes PLC control system, temperature sensor, work piece support heat dissipation platform, touch-sensitive screen, PLC control system is used for controlling semiconductor refrigeration piece/electricity generation piece upper surface temperature and semiconductor refrigeration piece/electricity generation piece power supply polarity upset number of times, temperature sensor be PT100 resistance temperature sensor, be connected to the PLC port through temperature module for measure and control the temperature of semiconductor refrigeration piece/electricity generation piece upper surface, work piece support heat dissipation platform is the high-purity aluminium cavity of surface through anodization, and built-in pure water is used for the heat to relax, the touch-sensitive screen is used for touch control and test flow record to show. The cold and hot impact testing device for the semiconductor thermoelectric chip adopts a PLC control system to automatically control the semiconductor thermoelectric chip to carry out quantitative continuous cold and hot impact, and a testing workbench can simultaneously test 9-16 semiconductor refrigerating/power generating chips at one time.
The embodiment of the utility model provides a pair of semiconductor thermoelectric chip cold and hot impact testing arrangement's work as follows:
firstly, a plurality of devices to be tested (semiconductor refrigeration pieces/power generation pieces) are arranged on a heat dissipation platform.
And secondly, respectively attaching the temperature sensors to the upper surface of the device to be tested.
And thirdly, selecting related programs by using the PLC control system to respectively perform impact tests on the multiple devices by setting the upper and lower limit temperatures and the impact times of the cold and hot impacts according to different requirements.
The utility model relates to a cold and hot test impact device of semiconductor heating electric chip, preferred PLC control system, sensitive temperature sensor, constant temperature semiconductor thermoelectric chip heat dissipation platform can high-efficient accurate cold and hot impact test who accomplishes semiconductor thermoelectric chip, obtains the aging testing data that accords with the reality, provides basic data for the type selection of various application scenario thermoelectric chip. The utility model provides high semiconductor thermoelectric chip aging testing efficiency and reliability add a small amount of test system utensil simultaneously and also can be applied to the aging testing of other semiconductor devices. The utility model discloses utilize PLC programmable control technique and temperature module technique to realize semiconductor thermoelectric device (TEC/TEG) aging testing and reliability test, improved scalable and the scalability of test.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the present invention, and any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included within the protection scope of the present invention.
Claims (9)
1. A semiconductor thermoelectric chip cold and hot shock test device, characterized in that, cold and hot shock test device includes:
the heat dissipation platform (6) is provided with a bearing surface for bearing the chip (4) to be tested, and the size of the bearing surface is larger than or equal to 300mm x 400 mm;
the temperature sensor (3), the said temperature sensor (3) is used for measuring the upper surface temperature of the chip (4) to be measured;
PLC controller (1), PLC controller (1) with temperature sensor (3) are connected, PLC controller (1) has one to or more to output electrode (7) and one or multichannel temperature sensor input interface, many pairs of output electrode with multichannel temperature sensor input interface is used for the multi-disc chip to carry out the impact test simultaneously respectively, output electrode (7) are used for being connected with chip (4) that awaits measuring, PLC controller (1) is used for controlling the polarity of output electrode (7).
2. A cold-thermal shock testing device according to claim 1, wherein the cold-thermal shock testing device comprises a touch module for controlling the PLC controller (1) and/or for displaying a test flow record.
3. A cold-thermal shock testing device according to claim 1, wherein the heat dissipating platform (6) is an aluminum platform with an anodized outer surface, and the heat dissipating platform (6) has a cavity in which a cooling medium is accommodated.
4. A thermal shock testing device according to claim 1 or 3, wherein said chips under test can be arranged in an array of 3 x 3 or 4 x 4 on said support surface.
5. A thermal shock testing apparatus according to claim 3, wherein the cooling medium in the cavity is purified water.
6. A cold-thermal shock testing device according to claim 1 or 3, wherein the support surface is provided with graphite sheets (5), the graphite sheets (5) having the same area as the support surface.
7. A cold-thermal shock testing device according to claim 1, wherein said temperature sensor (3) is a PT100 resistance temperature sensor.
8. A cold-thermal shock testing device according to claim 2, wherein said touch module comprises a touch screen (2).
9. A cold-thermal shock testing device according to claim 6, wherein the heat dissipating platform (6) has a thermostatic control module for keeping the heat dissipating platform (6) at a constant temperature.
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| CN202022816980.6U CN214122392U (en) | 2020-11-30 | 2020-11-30 | Semiconductor thermoelectric chip cold and hot impact testing device |
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| CN202022816980.6U CN214122392U (en) | 2020-11-30 | 2020-11-30 | Semiconductor thermoelectric chip cold and hot impact testing device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114814543A (en) * | 2022-04-22 | 2022-07-29 | 上海晶岳电子有限公司 | Temperature impact resistance test system and method for power management chip |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114814543A (en) * | 2022-04-22 | 2022-07-29 | 上海晶岳电子有限公司 | Temperature impact resistance test system and method for power management chip |
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