CN214101608U - Test system for video board card - Google Patents
Test system for video board card Download PDFInfo
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- CN214101608U CN214101608U CN202023337451.4U CN202023337451U CN214101608U CN 214101608 U CN214101608 U CN 214101608U CN 202023337451 U CN202023337451 U CN 202023337451U CN 214101608 U CN214101608 U CN 214101608U
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Abstract
The utility model discloses a test system for video integrated circuit board relates to video integrated circuit board test field, including main control chip, DVI circuit, LVDS circuit, XGA single-ended circuit and XGA differential circuit, the DVI circuit includes DVI receiver and DVI driver, and the DVI receiver is connected to main control chip. Master control chip drive DVI driver, the DVI driver is used for being connected to outside monitor, LVDS circuit and XGA single-ended circuit are connected to master control chip and outside monitor respectively, XGA differential circuit passes through XGA single-ended circuit connection to master control chip, XGA differential circuit is connected to outside monitor, through with the video signal in this test system can effectively gather the video integrated circuit board that awaits measuring, effectively save test cycle, avoid artificial factor, guarantee the exactness, practice thrift the research and development time.
Description
Technical Field
The utility model belongs to the technical field of the video integrated circuit board test and specifically relates to a test system for video integrated circuit board.
Background
In the process of research and development and production of a display, various performances of the display need to be tested, a video board is used as an important board in the display, the conventional testing method is that the video board is installed in the whole display product and then matched with testing equipment of a corresponding display product to be tested, when the display is tested, related video signals such as DVI signals, LVDS signals, XGA single-ended signals and XGA differential signals are usually externally connected to a monitor to be displayed, a tester observes whether the monitor normally judges, and therefore other boards in the display need to be produced or purchased and then assembled and tested together.
For video signals output by the video board card, testers observe video pictures and judge whether the pictures are normal, fine flaws are easily omitted, and poor products are judged to be qualified products.
When a video board card with a fault is found in the test process, the video board card with the fault can be finally determined by finding other qualified detected board cards to replace the video board cards, when the video board card has the fault, a tester can only tell a research and development worker about the fault, and the research and development worker can perform troubleshooting, so that the time spent on products returned to a factory for maintenance is longer.
SUMMERY OF THE UTILITY MODEL
The inventor provides a test system for video integrated circuit board to above-mentioned problem and technical demand, the technical scheme of the utility model as follows:
a test system for a video board card comprises a master control chip, a DVI circuit, an LVDS circuit, an XGA single-ended circuit and an XGA differential circuit, wherein the DVI circuit comprises a DVI receiver and a DVI driver, the DVI receiver is connected to the master control chip, the master control chip drives the DVI driver, the DVI driver is used for being connected to an external monitor, the LVDS circuit and the XGA single-ended circuit are respectively connected to the master control chip and the external monitor, the XGA differential circuit is connected to the master control chip through the XGA single-ended circuit, and the XGA differential circuit is connected to the external monitor.
The LVDS circuit comprises an LVDS selection chip and an LVDS receiver, the LVDS selection chip is connected to the LVDS receiver and an external monitor, and the LVDS receiver is connected to the main control chip.
The XGA single-ended circuit comprises a single-ended RGB circuit and a single-ended line field signal circuit, the single-ended RGB circuit comprises an analog video single-ended driver, a VGA selection chip and a VGA acquisition chip, the analog video single-ended driver, the VGA selection chip, the VGA acquisition chip and a main control chip are sequentially connected, the single-ended line field signal circuit comprises a single-ended line field selection chip, the single-ended line field selection chip is connected to the VGA selection chip, and the analog video single-ended driver and the single-ended line field selection chip are connected to an external monitor.
The XGA differential circuit comprises a differential RGB circuit and a differential line field signal circuit, the differential RGB circuit comprises an analog video differential driver, a first differential-to-single-ended driver and a second differential-to-single-ended driver, the analog video differential driver is connected to the first differential-to-single-ended driver and the second differential-to-single-ended driver, the first differential-to-single-ended driver is connected to the VGA selection chip, the differential line field signal circuit comprises a digital differential-to-single-ended driver, the digital differential-to-single-ended driver is connected to the single-ended line field selection chip, and the second differential-to-single-ended driver and the single-ended line field selection chip are connected to an external monitor.
The further technical scheme is that the main control chip is an SOC chip, and an ARM processor and an FPGA device are embedded in the SOC chip.
The test system further comprises an Ethernet PHY chip and a network connector, wherein the main control chip, the Ethernet PHY chip and the network connector are sequentially connected.
The technical scheme is that the test system further comprises an RS485 transceiver, and the RS485 transceiver is connected to the main control chip.
The further technical scheme is that the test system is a test circuit board, and the size of the test circuit board is 225mm x 158 mm.
The utility model has the beneficial technical effects that: the test system can effectively acquire the video signals in the video board card to be tested, so that the test period of the video board card to be tested is effectively saved, artificial factors are avoided, the correctness is ensured, and the research and development time is saved; the test system is designed into the test circuit board, so that the portability of the system is improved, and meanwhile, the test circuit board comprises the slide rail slot, so that the drawing and inserting of the boundary are realized.
Drawings
Fig. 1 is a schematic structural diagram of a test system of the present application.
Figure 2 is a circuit schematic of a DVI receiver of the test system of the present application.
Fig. 3 is a circuit schematic diagram of an LVDS receiver of the test system of the present application.
Fig. 4 is a circuit schematic of an analog video single-ended driver of the test system of the present application.
FIG. 5 is a circuit schematic diagram of a single ended row field selection chip of the test system of the present application.
FIG. 6 is a circuit schematic of an analog video differential driver of the test system of the present application.
Detailed Description
The following describes the embodiments of the present invention with reference to the accompanying drawings.
The utility model provides a test system for video integrated circuit board, including main control chip, DVI circuit, LVDS circuit, XGA single-ended circuit and XGA differential circuit, through all passing through DVI signal, LVDS signal, XGA single-ended signal and XGA differential signal that await measuring the video integrated circuit board output after one minute two of respective circuit is handled, one minute two in this application is handled and is referred to corresponding signal and duplicate, export all the way and show in the corresponding outside monitor, another way is obtained by the inside main control chip of test system, furthermore, test system includes ethernet PHY chip and network port connector, the model of ethernet PHY chip is KSZ9031, the model of network port connector is HR911130A, main control chip, ethernet PHY chip and network port connector connect gradually, main control chip can send the signal to external host computer, be used for the automatic contrast of image.
In order to improve the portability of the test system of the application, the test system is designed into a test circuit board, the size is 225mm x 158mm, the card inserting size of the special test box is met, the height of a component on the back of the board card is smaller than 3mm, and meanwhile, the test circuit board comprises a slide rail slot, so that the circuit board is convenient to draw and insert.
Each of the LVDS signals, DVI signals, XGA single-ended signals, and XGA differential signals includes RGB signals and line-field signals.
The main control chip adopts an SOC chip with the model of XC7Z020, an ARM processor and an FPGA device are embedded in the SOC chip, and the SOC chip comprises 198 Programmable (PL) I/O ports and 39 system I/O (PS) ports.
As shown in fig. 1, the DVI circuit includes DVI receiver and DVI driver, as shown in fig. 2, the model of DVI receiver is TFP401A, DVI receiver obtains the DVI signal connection to the main control chip of the video integrated circuit board that awaits measuring, main control chip drive DVI driver, carry out one minute two with the DVI signal through main control chip and handle, DVI driver is used for being connected to outside monitor, wherein, the model of DVI driver is TFP410, DVI receiver gives main control chip with DVI signal output, this main control chip exports the DVI driver again and converts DVI signal back output to and monitors, simultaneously with the data cache in main control chip convenient follow-up data acquisition handles.
The LVDS circuit comprises an LVDS selection chip and an LVDS receiver, the LVDS selection chip acquires an LVDS signal of a video board to be detected, the LVDS signal is subjected to one-to-two processing in the LVDS selection chip, the LVDS selection chip is connected to the LVDS receiver and an external monitor, the LVDS receiver is connected to the main control chip, the LVDS signal is selected to be the LVDS selection chip with the model of DS10CP152 according to the one-to-two scheme, one path of the LVDS signal is output and monitored, and the other path of the LVDS signal is output to the LVDS receiver, as shown in FIG. 3, the type of the LVDS receiver is DS90CF366, and the LVDS signal is finally connected to the main control chip to be subjected to data caching and convenient data acquisition processing.
The XGA single-ended circuit comprises a single-ended RGB circuit and a single-ended line field signal circuit, the single-ended RGB circuit comprises an analog video single-ended driver, a VGA selection chip and a VGA acquisition chip, the analog video single-ended driver, the VGA selection chip, the VGA acquisition chip and a main control chip are sequentially connected, the analog video single-ended driver acquires a single-ended RGB signal in an XGA signal of a video board card to be detected, and is connected to an external monitor, as shown in figure 4, the analog video single-ended driver with the model of LMH6738 is selected according to a one-to-two scheme of the single-ended RGB circuit, the model of the VGA selection switch is TS3V712E, the model of the VGA acquisition chip is AD9985, the VGA acquisition chip performs analog-to-digital conversion on the signal, and the converted signal is transmitted to the main control chip to perform data caching so as to facilitate data acquisition and processing.
The single-ended line field signal circuit comprises a single-ended line field selection chip, as shown in fig. 5, the model of the single-ended line field selection chip is SN74ACT245, the single-ended line field signal is subjected to one-to-two processing through the single-ended line field selection chip, the single-ended line field selection chip is connected to a VGA selection chip, an analog video single-ended driver obtains a single-ended RGB signal in an XGA signal of a video board to be detected, the single-ended line field selection chip obtains a single-ended line field signal in the XGA signal of the video board to be detected, and the analog video single-ended driver and the single-ended line field selection chip are connected to an external monitor.
The XGA differential circuit includes a differential RGB circuit and a differential line-field signal circuit, the differential RGB circuit includes an analog video differential driver, a first differential to single-ended driver and a second differential to single-ended driver, the analog video differential driver acquires a differential RGB signal of the XGA signal in the video board to be detected and connects to the first differential to single-ended driver and the second differential to single-ended driver, the first differential to single-ended driver and the second differential to single-ended driver are both AD8130 types, the first differential to single-ended driver is connected to the VGA selection chip, as shown in fig. 6, the analog video differential driver with the AD8133 type is selected as a differential RGB signal one-to-two scheme.
The differential horizontal field signal circuit comprises a digital differential-to-single-ended driver, the digital differential-to-single-ended driver acquires differential horizontal field signals in XGA signals of the video board to be tested, the digital differential-to-single-ended driver with the model number of AM26C32 is selected to divide the differential horizontal field signals into two parts, the digital differential-to-single-ended driver is connected to a single-ended horizontal field selection chip, and the second differential-to-single-ended driver and the single-ended horizontal field selection chip are connected to an external monitor.
The test system of the test system further comprises an RS485 transceiver, wherein the RS485 transceiver is connected to the main control chip, the model of the RS485 transceiver is SN65HVD11, and the RS485 transceiver is used for connecting an upper computer to perform corresponding command software control input.
What has been described above is only a preferred embodiment of the present application, and the present invention is not limited to the above embodiments. It is to be understood that other modifications and variations directly derivable or suggested by those skilled in the art without departing from the spirit and scope of the present invention are to be considered as included within the scope of the present invention.
Claims (8)
1. A test system for a video board comprises a master control chip, a DVI circuit, an LVDS circuit, an XGA single-ended circuit and an XGA differential circuit, wherein the DVI circuit comprises a DVI receiver and a DVI driver, the DVI receiver is connected to the master control chip, the master control chip drives the DVI driver, the DVI driver is used for being connected to an external monitor, the LVDS circuit and the XGA single-ended circuit are respectively connected to the master control chip and the external monitor, the XGA differential circuit is connected to the master control chip through the XGA single-ended circuit, and the XGA differential circuit is connected to the external monitor.
2. The test system according to claim 1, wherein the LVDS circuit includes an LVDS selection chip and an LVDS receiver, the LVDS selection chip being connected to the LVDS receiver and an external monitor, the LVDS receiver being connected to the main control chip.
3. The test system of claim 1, wherein the XGA single-ended circuit comprises a single-ended RGB circuit and a single-ended line-field signal circuit, the single-ended RGB circuit comprises an analog video single-ended driver, a VGA selection chip, and a VGA acquisition chip, the analog video single-ended driver, the VGA selection chip, the VGA acquisition chip, and the host chip are connected in sequence, the single-ended line-field signal circuit comprises a single-ended line-field selection chip, the single-ended line-field selection chip is connected to the VGA selection chip, and the analog video single-ended driver and the single-ended line-field selection chip are connected to an external monitor.
4. The test system of claim 3, wherein the XGA differencing circuit comprises a differential RGB circuit and a differential line-to-field signaling circuit, the differential RGB circuit comprising an analog video differential driver, a first differential-to-single-ended driver, and a second differential-to-single-ended driver, the analog video differential driver connected to the first differential-to-single-ended driver and the second differential-to-single-ended driver, the first differential-to-single-ended driver connected to the VGA selection chip, the differential line-to-field signaling circuit comprising a digital differential-to-single-ended driver, the digital differential-to-single-ended driver connected to the single-ended line-to-field selection chip, the second differential-to-single-ended driver and the single-ended line-to-field selection chip connected to an external monitor.
5. The test system of claim 1, wherein the master control chip is an SOC chip having an ARM processor and an FPGA device embedded therein.
6. The testing system of claim 1, further comprising an ethernet PHY chip and a network port connector, wherein the main control chip, the ethernet PHY chip and the network port connector are connected in sequence.
7. The test system of claim 1, further comprising an RS485 transceiver, the RS485 transceiver connected to the master control chip.
8. The test system according to any one of claims 1 to 7, wherein the test system is a test circuit board having a size of 225mm by 158 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023337451.4U CN214101608U (en) | 2020-12-30 | 2020-12-30 | Test system for video board card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202023337451.4U CN214101608U (en) | 2020-12-30 | 2020-12-30 | Test system for video board card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN214101608U true CN214101608U (en) | 2021-08-31 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202023337451.4U Active CN214101608U (en) | 2020-12-30 | 2020-12-30 | Test system for video board card |
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| CN (1) | CN214101608U (en) |
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- 2020-12-30 CN CN202023337451.4U patent/CN214101608U/en active Active
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