CN213987479U - Clamp for verifying influence on eye pattern caused by unequal lengths of USB3.0 differential line pairs - Google Patents
Clamp for verifying influence on eye pattern caused by unequal lengths of USB3.0 differential line pairs Download PDFInfo
- Publication number
- CN213987479U CN213987479U CN202022931308.1U CN202022931308U CN213987479U CN 213987479 U CN213987479 U CN 213987479U CN 202022931308 U CN202022931308 U CN 202022931308U CN 213987479 U CN213987479 U CN 213987479U
- Authority
- CN
- China
- Prior art keywords
- triode
- connecting wire
- output
- length
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Dc Digital Transmission (AREA)
Abstract
The utility model discloses a verify anchor clamps of USB3.0 differential line pair unequal length influence eye pattern, including the PCB board, be equipped with first input on the PCB board, the second input, first output and second output, first input respectively with triode Q1, triode Q2 and triode Q4's collecting electrode links to each other, triode Q1's projecting pole passes through first connecting wire and is connected with first output, triode Q2's projecting pole passes through the second connecting wire and is connected with first output, triode Q4's projecting pole passes through the fourth connecting wire and is connected with first output, first connecting wire, the length of second connecting wire and fourth connecting wire is different, the second input links to each other with triode Q3's collecting electrode, triode Q3's projecting pole passes through the third connecting wire and is connected with the second output, the length of third connecting wire is the same with the length of second connecting wire. The eye diagram states of the USB3.0 bus under different clock delays can be verified, whether the USB3.0 bus can work normally or not can be verified, and the scheme is low in cost and extremely high in cost performance.
Description
Technical Field
The utility model relates to the field of communication technology, especially, relate to a verify that USB3.0 differential line pair influences anchor clamps of eye pattern not isometric. The method is used for verifying whether the eye pattern is normal under the influence of unequal lengths of the USB3.0 differential line pairs and whether the USB3.0 can work normally.
Background
In order to ensure that the USB3.0 bus timing (i.e. the USB3.0 eye diagram) can work normally, it is necessary to perform verification under different environments, for example, extreme environments such as high temperature and low temperature, etc., and the normal verification cannot be performed, and it is necessary to change the thinking and replace the difference in timing caused under such extreme environments by some means, and it is possible to verify the maximum tolerance that the USB3.0 bus can bear by changing the time delay between the TX + and TX-signals of the USB3.0 bus, and it is possible to verify whether the bus timing (i.e. the USB3.0 eye diagram) can work normally by this means.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a to the not enough of above-mentioned prior art, provide a verify USB3.0 differential line pair not isometric anchor clamps that influence the eye pattern, verify the influence of USB3.0 bus differential line pair not isometric to the eye pattern through the time delay between the TX + that changes USB3.0 bus and two signals, just can verify out the condition that bus chronogenesis (USB 3.0 eye pattern promptly) can normally work through this kind of mode.
In order to solve the above problems, the utility model adopts the following technical proposal:
a clamp for verifying different-length influence eye diagrams of USB3.0 differential lines comprises a PCB, wherein a first input end, a second input end, a first output end and a second output end are arranged on the PCB, the first input end is respectively connected with collectors of a triode Q1, a triode Q2 and a triode Q4, an emitter of the triode Q1 is connected with the first output end through a first connecting line, an emitter of the triode Q2 is connected with the first output end through a second connecting line, an emitter of the triode Q4 is connected with the first output end through a fourth connecting line, the lengths of the first connecting line, the second connecting line and the fourth connecting line are different, a base of the triode Q1 is connected with an external control circuit through a first control line, a base of the triode Q2 is connected with the external control circuit through a second control line, and a base of the triode Q4 is connected with the external control circuit through the fourth control line, the second input end is connected with a collector electrode of a triode Q3, an emitting electrode of the triode Q3 is connected with the second output end through a third connecting line, the length of the third connecting line is the same as that of the second connecting line, and a base electrode of the triode Q3 is connected with an external control circuit through a third control line.
According to a further technical scheme, the first input end, the second input end, the first output end and the second output end are all 3.5mm SMA female head seats.
A further technical scheme is that the length of the second connecting line and the length of the third connecting line are 1000 mils, the length of the first connecting line is 1600 mils, and the length of the fourth connecting line is 2200 mils.
Adopt the produced beneficial effect of above-mentioned technical scheme to lie in: the method is easy to realize, can verify the eye pattern states of the USB3.0 bus under different clock delays, and can verify whether the USB3.0 bus can normally work, and the scheme has low cost and high cost performance.
Drawings
Fig. 1 is a schematic diagram of the present invention.
In the figure: 1. a PCB board; 2. a first input terminal; 3. a second input terminal; 4. a first output terminal; 5. a second output terminal; 6. a first connecting line; 7. a second connecting line; 8. a fourth connecting line; 9. a first control line; 10. a second control line; 11. a fourth control line; 12. a third connecting line; 13. a third control line.
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings and examples. The following examples are intended to illustrate the invention, but are not intended to limit the scope of the invention.
As shown in fig. 1, a clamp for verifying whether an eye diagram is normal under the influence of unequal lengths of USB3.0 differential lines, and whether the USB3.0 differential lines can work normally, includes a PCB 1, the PCB 1 is provided with a first input end 2, a second input end 3, a first output end 4, and a second output end 5, the first input end 2 is respectively connected to collectors of a transistor Q1, a transistor Q2, and a transistor Q4, an emitter of the transistor Q1 is connected to the first output end 4 through a first connection line 6, an emitter of the transistor Q2 is connected to the first output end 4 through a second connection line 7, an emitter of the transistor Q4 is connected to the first output end 4 through a fourth connection line 8, the lengths of the first connection line 6, the second connection line 7, and the fourth connection line 8 are different, a base of the transistor Q1 is connected to an external control circuit through a first control line 9, the base of the triode Q2 is connected with an external control circuit through a second control line 10, the base of the triode Q4 is connected with the external control circuit through a fourth control line 11, the second input end 3 is connected with the collector of the triode Q3, the emitter of the triode Q3 is connected with the second output end 5 through a third connecting line 12, the length of the third connecting line 12 is the same as that of the second connecting line 7, and the base of the triode Q3 is connected with the external control circuit through a third control line 13.
The first input end 2, the second input end 3, the first output end 4 and the second output end 5 are all SMA female head seats with the length of 3.5 mm.
The length of second connecting wire 7 and third connecting wire 12 is 1000 mils, the length of first connecting wire 6 is 1600 mils, the length of fourth connecting wire 8 is 2200 mils.
The working principle is as follows: 1. the first input terminal 2 and the second input terminal 3 are respectively used as input terminals of USB3.0 TX +/-and are connected through coaxial cables, and the first output terminal 4 and the second output terminal 5 are respectively used as output terminals of USB3.0 TX +/-and are also connected through coaxial cables. 2. The USB3.0 signals appear in pairs in a differential signal mode, and comprise a TX part and an RX part, only the TX part is verified in a clamp, wherein the lengths of a first connecting line 6, a second connecting line 7, a third connecting line 12 and a fourth connecting line 8 are set as follows, the lengths of the second connecting line 7 and the third connecting line 12 are equal to each other and are both 1000 mils, the first connecting line 6 is a longer section of transmission line, the length of the transmission line is 1600 mils, the fourth connecting line 8 is a longest section of transmission line, the length of the transmission line is 2200 mils, and the purpose is to verify the influence of time delay caused by different lengths of differential line pairs on an eye diagram of a USB3.0 bus by changing different TX + line lengths, and further verify whether the USB3.0E bus can work normally. 3. The first control line 9, the second control line 10, the third control line 13 and the fourth control line 11 respectively control the conduction and the disconnection of the triode Q1, the triode Q2, the triode Q3 and the triode Q4, so as to control the conduction of the first connecting line 6, the second connecting line 7, the third connecting line 12 and the fourth connecting line 8, and the combination of the USB3.0 TX + with different line lengths and the USB3.0 TX-with fixed line length is selected.
When the circuit board clamp is used for verification, a USB3.0 signal is input to the first input end 2 and the second input end 3, the second control line 10 and the third control line 13 are set to be at a high level, the first control line 9 and the fourth control line 11 are set to be at a low level, the second connecting line 7 and the third connecting line 12 are in an equal length state at the moment and are both 1000 mils, TX +/-is sent to an output end through the second connecting line 7 and the third connecting line 12, an eye diagram of the USB3.0 signal in the TX +/-equal length state is normal, and the USB3.0 function is normal at the moment. The first control line 9 is set to be high level again, the second control line 10 and the fourth control line 11 are low level, at this time, TX + is switched to the first connecting line 6, the length of the TX-line is 1600mil, the length of the TX-line is unchanged, the length of the TX-line is still 1000mil, the state of the USB3.0 signal eye diagram is verified in this state, it is found that the USB3.0 signal eye diagram is worse than that in the equal length state, but the USB3.0 signal eye diagram still can pass the test of the eye diagram template, and the USB3.0 function is verified to be normal, which indicates that a certain margin still exists at this time. And finally, the line length is switched to a 2200mil fourth connecting line 8, namely the fourth control line 11 is set to be at a high level, the first control line 9 and the second control line 10 are at a low level, the TX-line length is still unchanged and is still 1000 mils, the state of the USB3.0 signal eye diagram at the moment is verified, the signal eye diagram is completely closed without margin, the function of the USB3.0 is verified, the operation cannot be performed at the moment, the function loss of the USB3.0 under the condition of unequal length is shown, and therefore the influence of the unequal length of the differential line on the eye diagram can be obtained. The scheme is simple to realize, the cost is saved, the cost of the clamp plate is only dozens of money, and the operation is convenient.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present invention.
Claims (3)
1. The utility model provides a verify that USB3.0 differential line pair is not isometric influences anchor clamps of eye pattern which characterized in that: including PCB board (1), be equipped with first input (2), second input (3), first output (4) and second output (5) on PCB board (1), first input (2) link to each other with triode Q1, triode Q2 and triode Q4's collecting electrode respectively, triode Q1's projecting pole passes through first connecting wire (6) and is connected with first output (4), triode Q2's projecting pole passes through second connecting wire (7) and is connected with first output (4), triode Q4's projecting pole passes through fourth connecting wire (8) and is connected with first output (4), the length of first connecting wire (6), second connecting wire (7) and fourth connecting wire (8) is different, triode Q1's base passes through first control line (9) and is connected with external control circuit, triode Q2's base passes through second control line (10) and is connected with external control circuit, the base of triode Q4 passes through fourth control line (11) and is connected with external control circuit, second input (3) link to each other with triode Q3's collecting electrode, triode Q3's projecting pole passes through third connecting wire (12) and is connected with second output (5), the length of third connecting wire (12) is the same with the length of second connecting wire (7), triode Q3's base passes through third control line (13) and is connected with external control circuit.
2. The fixture of claim 1, wherein the fixture is configured to verify that different lengths of USB3.0 differential lines affect an eye diagram, and wherein: the first input end (2), the second input end (3), the first output end (4) and the second output end (5) are all 3.5mm SMA female head seats.
3. The fixture of claim 1, wherein the fixture is configured to verify that different lengths of USB3.0 differential lines affect an eye diagram, and wherein: the length of second connecting wire (7) and third connecting wire (12) is 1000 mils, the length of first connecting wire (6) is 1600 mils, the length of fourth connecting wire (8) is 2200 mils.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202022931308.1U CN213987479U (en) | 2020-12-09 | 2020-12-09 | Clamp for verifying influence on eye pattern caused by unequal lengths of USB3.0 differential line pairs |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202022931308.1U CN213987479U (en) | 2020-12-09 | 2020-12-09 | Clamp for verifying influence on eye pattern caused by unequal lengths of USB3.0 differential line pairs |
Publications (1)
Publication Number | Publication Date |
---|---|
CN213987479U true CN213987479U (en) | 2021-08-17 |
Family
ID=77241319
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202022931308.1U Active CN213987479U (en) | 2020-12-09 | 2020-12-09 | Clamp for verifying influence on eye pattern caused by unequal lengths of USB3.0 differential line pairs |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN213987479U (en) |
-
2020
- 2020-12-09 CN CN202022931308.1U patent/CN213987479U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103178405A (en) | Connecting device capable of detecting connecting states, electric connection assembly and electronic device | |
CN113394531A (en) | Same-frequency combiner compatible with 5G frequency band | |
CN214799506U (en) | Bus board level protocol test circuit | |
CN213987479U (en) | Clamp for verifying influence on eye pattern caused by unequal lengths of USB3.0 differential line pairs | |
CN113740703B (en) | Test board and test system of Retimer chip | |
CN109144929B (en) | RS232 communication interface circuit supporting hot plug | |
CN101667991B (en) | Method and device for setting pre-emphasis and/or equalization parameters | |
CN112600626A (en) | Optical module and communication device | |
CN213545256U (en) | Clamp for verifying influence of PCIE reference clock time delay on eye pattern | |
CN213986580U (en) | Clamp for verifying influence of PCIE3.0 differential lines on eye diagram with unequal lengths | |
CN213717970U (en) | Clamp for verifying clock phase noise | |
CN113742146B (en) | Test jig and test device | |
CN213024379U (en) | Clamp for verifying I2C bus clock back-channel tolerance | |
CN209030220U (en) | A kind of transmitting of smooth fitting and receive detection device simultaneously | |
CN212846775U (en) | Clamp for verifying timing sequence tolerance of SPI bus | |
CN211956465U (en) | TTL and RS232 support double-level serial port extension circuit | |
CN212256300U (en) | Convenient multi-serial port card | |
CN213715352U (en) | Clamp for verifying influence of ground level span segmentation on high-speed serdes eye pattern | |
CN211179914U (en) | Diode array test fixture | |
CN221884304U (en) | Signal path switching circuit applied to Type-C interface | |
CN112072257A (en) | Waveguide synthesis network with ET structure | |
CN102243481B (en) | Device, method and circuit for realizing interconnection between modules powered by different power supplies | |
CN213023530U (en) | Sampling oscilloscope Deskew calibration fixture | |
CN204389994U (en) | A kind of node apparatus for RS422 bus | |
CN209572216U (en) | A kind of circuit board being convenient for changing |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |