CN213850722U

CN213850722U - Four-lead impedance waveform reconstruction heart function instrument

Info

Publication number: CN213850722U
Application number: CN201920481179.5U
Authority: CN
Inventors: 肖秋金; 况世江
Original assignee: Individual
Current assignee: Individual
Priority date: 2019-03-29
Filing date: 2019-03-29
Publication date: 2021-08-03
Anticipated expiration: 2029-03-29

Abstract

The utility model discloses a four lead impedance waveform reconstruction heart function appearance, including high frequency constant current source circuit, four ways identical impedance synchronous detection circuit, two way identical difference calculating circuit, electrocardio detection circuit, heart sound detection circuit, piezoelectricity heart sound sensor, electrocardio detection electrode, constant current output lead line, impedance input lead line, AD card and direct current isolation steady voltage power supply module. Compared with the prior art, the utility model discloses circuit structure is simple, and the interference killing feature is strong, and constant current's range and frequency are stable, and the common mode rejection ratio can not appear circuit blocking. The instrument can measure conventional cardiac function parameters such as cardiac output, ejection fraction, cardiac contractility index, total peripheral resistance, aortic compliance and the like of the left ventricle, and can also measure important cardiac function parameters such as left ventricle cardiac efficiency, heart internal work, total heart work, myocardial oxygen consumption and the like which are not possessed by the Chinese patent ZL 200710028378.2.

Description

Four-lead impedance waveform reconstruction heart function instrument

Technical Field

The utility model belongs to the technical field of human electricity biological impedance information detects, concretely relates to four impedance waveform reconstruction heart function appearance that leads.

Background

The thoracic impedance map, also known as an impedance cardiogram, is a curve of impedance variation measured non-invasively from a thoracic body surface. Since the thoracic impedance map indirectly reflects the volume changes of the heart and great vessels in the thoracic cavity, carrying rich information on the cardiovascular activity, it is widely used medically to measure cardiac function and monitor hemodynamic changes of patients. The method has the advantages of good detection repeatability, low cost, no wound, continuous monitoring and convenient measurement, thereby arousing wide attention of medical workers at home and abroad and the bioinformation detection engineering world. For the thoracic impedance chart, currently, the annular quadrupole method proposed by Kubicek et al in 1966 is generally adopted at home and abroad for measurement, and the Kubicek formula is used for calculating the cardiac output. In the seventh and eighties of the last century, the research and application of home and abroad impedance charts have formed a climax, and at that time, over ten manufacturers producing impedance meters exist in China. In the early and middle eighties, a multi-channel physiological recorder is used for synchronously tracing an impedance cardiogram, an electrocardiogram and a phonocardiogram, and manually measuring and calculating heart function data. In the late eighties and early nineties, impedance cardiac function detection is introduced in the computer technology, and manual measurement and calculation are replaced by automatic analysis, for example, a cardiac function automatic multi-item detector (patent number: CN88205368.X) developed by a system computer for Li Shiming, a portable impedance method cardiac output monitor (patent number: CN96116641.X) designed by a singlechip for Linzhongxiang and the like. As for a small-circulation cardiac function detector (patent No. CN92110266.6) developed by Li Hezhen et al in 1992, the cardiac function of the pulmonary circulation is analyzed and diagnosed by detecting a pulmonary impedance blood flow diagram (inventor's named as a pneumohemogram), but the detector cannot provide commonly used left ventricular cardiac function data such as cardiac output, ejection fraction, myocardial contractility index and the like. In addition, with the continuous and intensive basic research and the wide spread of clinical applications, some problems of measuring cardiac function by impedance method are revealed. Summarizing, there are three main aspects: theory and experimental research prove that the chest impedance graph measured by the Kubicek annular quadrupole method is mainlyThe mixed impedance change is generated by the volume change of the artery, the pulmonary vessel and the ventricle. It is clear that the cardiac function data measured with this mixed signal, which has the effect of both the left and right cardiac cycles, is used to evaluate left ventricular cardiac function, and lacks uniqueness. A large amount of measurement data shows that the influence of the chest circumference (or the weight) on the measurement result of the impedance method is large, the heart index measured by the Kubicek impedance method is low for the examinee with large chest circumference (or large weight), and the heart index measured by the impedance method is high for the examinee with small chest circumference (or small weight). The cardiac output measured by thermodilution is medically considered as the "gold standard" for measuring cardiac output, and the normal value range of the cardiac index CI is 2.7-4.3L/min/m². As for the measurement results of the Kubicek method, the mean value of CI measured by 21 authors at home and abroad on 2680 normal subjects by the Kubicek method was 3.47. + -. 0.81L/min/m²The normal value range is 1.9-5.1L/min/m². The CI measured by the inventor by a Kubicek method for 180 normal adults is 3.61 +/-0.86L/min/m²It was found that the normal value range was 1.9-5.3L/min/m². It can be seen that, compared with the above "gold standard", the measurement result of the Kubicek method is large in dispersion, and normal values are crossed with abnormal values seriously. For some patients with cardiac insufficiency capable of walking freely in bed, the heart index measured by the Kubicek method is too low, and some patients are even less than 1.1L/min/m²Such a test result cannot objectively reflect the cardiac function state of the patient.

In order to solve the first problem, the inventor and others have conducted long-term research, and in 2001, the assumption of thoracic impedance waveform reconstruction was proposed, a measurement method and a mathematical model for thoracic impedance waveform reconstruction were established, five waveform diagrams of the impedance change components AO, PL, PR, LV, RV were separated from the mixed impedance change of the thoracic body surface of six leads, the waveform diagrams of these components are collectively called reconstructed impedance diagrams, and differential waveform diagrams corresponding to each component can be obtained by software differentiation. Accordingly, another calculation method for measuring the left ventricular function by reconstructing an impedance cardiogram has been proposed by Deutsche et al, and a digital reconstruction type cardiac output instrument (patent No. ZL200710028378.2) has been developed. The waveform diagram of the impedance change components of AO, PL, PR, LV and RV separated by the instrument can reflect the change of the cardiovascular physiological activity of a human body, and the measured cardiac function result can reflect the actual condition of a patient. However, the above-mentioned six-lead "digital reconstruction type cardiac output instrument" also has found some problems in actual measurement: firstly, a six-lead detection mode consists of 15 electrodes, and the high-frequency impedance detection electrodes are too many, so that the operation is troublesome and the popularization and the application are inconvenient; secondly, a specially-made disposable Ag/AgCl high-frequency impedance detection electrode belt is needed in measurement, the electrode belt is not compatible with a single Ag/AgCl primary electrode produced in large scale at present, and the manufacturing cost of the electrode belt is higher; the two current electrodes are attached to the crus, and for the thin and high population, the amplitude of the impedance change component of the aorta obtained by separation is small, so that the measured cardiac function parameters such as cardiac output and the like are low; currently, only the traditional cardiac function parameters of the left ventricle such as cardiac output, ejection fraction, total peripheral resistance and the like can be measured, and the important parameters of heart efficiency, internal work and total work done by the left ventricle, oxygen consumption of the myocardium of the left ventricle and the like cannot be measured.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the utility model is to the not enough of present digital reconstruction formula cardiac output appearance, provide one kind and utilize four to lead and rebuild the medical detection instrument that twenty cardiac function indexes such as chest impedance graph measurement left ventricle's cardiac output, ejection of blood fraction, heart contractility index, heart efficiency, left ventricle do internal work and total work, left ventricle cardiac muscle oxygen consumption, total peripheral resistance, aorta compliance, left ventricle relaxation do not press.

The utility model solves the technical problems through the following technical proposal,

a four-lead impedance waveform reconstruction heart function instrument comprises a high-frequency constant current source circuit, four paths of completely same impedance synchronous detection circuits, two paths of completely same difference calculation circuits, an electrocardio detection circuit, a heart sound detection circuit, a piezoelectric heart sound sensor, an electrocardio detection electrode, a constant current output lead wire, an impedance input lead wire, an A/D card and a direct current isolation voltage stabilization power supply assembly,

the constant current output lead wire comprises a head constant current output lead wire and an abdomen constant current output lead wire;

the high-frequency constant current source circuit outputs high-frequency constant current signals and is respectively connected with the head and the abdomen of a patient through two constant current output lead wires;

each impedance synchronous detection circuit is connected with two impedance input lead wires, the two impedance input lead wires are divided into a neck impedance input lead wire and a chest impedance input lead wire, and four completely same impedance synchronous detection circuits respectively obtain four basic impedances Z between the neck and the chest_0s1、Z_0s2、Z_0s3、Z_0s4And four fundamental impedance variation amplitudes Δ Z_s1、ΔZ_s2、ΔZ_s3、ΔZ_s4And sending the data to an A/D card for collection;

four paths of completely same impedance synchronous detection circuits are divided into two groups, wherein each group of impedance synchronous detection circuits is connected with a difference value calculation circuit, and four obtained basic impedances Z are divided into two groups_0s1、Z_0s2、Z_0s3、Z_0s4And four fundamental impedance variation amplitudes Δ Z_s1、ΔZ_s2、ΔZ_s3、ΔZ_s4Sending the difference value to the corresponding difference value calculation circuit;

the difference value calculating circuit receives the basic impedance and the basic impedance change value sent by the two paths of impedance synchronous detection circuits, and then carries out averaging operation to respectively obtain difference value basic impedance Z_0s12、Z_0s34Sum-difference base impedance variation amplitude Δ Z_s12、ΔZ_s34And sending the data to an A/D card for collection;

the electrocardio detection circuit is connected with a patient through three electrocardio detection electrodes in a two-lead mode to obtain electrocardio voltage ECG and sends the electrocardio voltage ECG to an A/D card for collection;

the heart sound detection circuit is connected with a patient through a piezoelectric heart sound sensor to obtain a heart sound signal PCG and sends the heart sound signal PCG to an A/D card for collection;

the constant current output lead wire outputs a high-frequency constant current signal output by the high-frequency constant current source circuit to a patient;

the impedance input lead wire detects the basic impedance and the change amplitude of the basic impedance between the neck and the chest of the patient;

the A/D card receives an ECG signal and four paths of completely same four basic impedances Z acquired by the impedance synchronous detection circuit_0s1、Z_0s2、Z_0s3、Z_0s4And the amplitude of change Δ Z of the fundamental impedance_s1、ΔZ_s2、ΔZ_s3、ΔZ_s4Two difference basic impedances Z acquired by signal and two paths of completely same difference calculation circuits_0s12、Z_0s34Sum-difference base impedance variation amplitude Δ Z_s12、ΔZ_s34The signal and the heart sound signal PCG are sent to an upper computer;

the direct current isolation voltage stabilization power supply assembly supplies power to the equipment.

In order to obtain better technical effect, the circuit also comprises a basic impedance temperature correction circuit, wherein the basic impedance temperature correction circuit outputs correction output voltage changing along with temperature and sends the correction output voltage to the A/D card for collection.

In order to obtain better technical effects, the basic impedance temperature correction circuit comprises a 51 st resistor R51, 51 st, 52 th, 53 th, 54 th, 55 th detection diodes D51, D52, D53, D54, D55, a 51 st capacitor C51 and a 51 st potentiometer W51, wherein one end of the 51 st resistor R51 is connected with an input end, the input end is connected with the positive voltage + V2 output by the DC isolation stabilized voltage power supply assembly, the other end of the 51 st resistor R51 is divided into two paths, one path is connected to the input end of the 51 st potentiometer W51, the other path is connected with the positive electrode of the 51 st detection diode D51, the 51 st, 52 th, 53 th, 54 th, 55 th detection diodes D51, D52, D53, D54 and D55 are sequentially connected according to the order of negative electrode connection, and the negative electrode end of the 55 th detection diode D55 is grounded; the input end of the 51 st potentiometer W51 is also grounded through a 51 st capacitor C51, the ground end is grounded, and the output end is sent to the A/D card for collection.

In order to obtain better technical effect, the high-frequency constant current source circuit comprises a crystal oscillator, a square wave-trapezoidal wave conversion circuit and a constant current output circuit;

the crystal oscillator comprises a1 st digital chip IC31, a crystal, a31 st resistor R31 and 31 st and 32 th capacitors C31 and C32; the crystal is connected with a first resistor R31 in parallel, and two ends of the crystal are respectively connected with pins 10 and 11 in a31 st digital chip IC31 and then are respectively grounded through capacitors C31 and C32 of 31 st and 32 th; the 31 st digital chip IC31 is internally integrated with a frequency division circuit, and the output signal of the crystal oscillator is subjected to frequency division by the frequency division circuit to obtain a low-frequency acquisition timing inquiry pulse main frequency signal and a high-frequency impedance detection main frequency signal; the low-frequency acquisition timing inquiry pulse main frequency signal is led out from a pin 4 of a31 st digital chip IC31 and is sent to an A/D card for acquisition and inquiry; the high-frequency impedance detection main frequency signal is led out from a pin 5 of a31 st digital chip IC31 and is output in two paths;

the square wave-trapezoidal wave conversion circuit comprises a32 nd chip IC32, 33 th, 34 th, 35 th and 36 th capacitors C33, C34, C35 and C36, 31 th and 32 th potentiometers W31 and W32, 32 th, 33 th, 34 th and 35 th resistors R32, R33, R34 and R35, and 31 th and 32 th operational amplifiers A31 and A32; the grounding end of the 31 st potentiometer W31 is grounded, and the input end of the 31 st potentiometer W31 is connected with the pin 5 of the 31 st digital chip IC31 through a 33 rd capacitor C33 and a32 th chip IC32 in sequence; the grounding end of the 32 nd potentiometer W32 is grounded, and the input end is directly connected with the 5 th pin of the 31 st digital chip IC31 through a 34 th capacitor C34; the 31 st operational amplifier A31, the 35 th capacitor C35 and the 32 th and 33 th resistors R32 and R33 form a first integrating circuit; one end of the 32 nd resistor R32 is connected with the output end of the 31 st potentiometer W31, and the other end of the 32 nd resistor R32 is connected with the inverting input end of the 31 th operational amplifier A31; one end of the 33 th resistor R33 is grounded, and the other end of the 33 th resistor R33 is connected with the non-inverting input end of the 31 th operational amplifier A31; two ends of the 35 th capacitor C35 are respectively connected with the inverting input end and the output end of the 31 st operational amplifier A31; the 32 nd operational amplifier A32, the 36 th capacitor C36 and the 34 th and 35 th resistors R34 and R35 form a second integrating circuit; one end of the 34 th resistor R34 is connected with the output end of the 32 th potentiometer W32, and the other end of the 34 th resistor R34 is connected with the inverting input end of the 32 th operational amplifier A32; one end of the 35 th resistor R35 is grounded, and the other end of the 35 th resistor R35 is connected with the non-inverting input end of the 32 nd operational amplifier A32; two ends of the 36 th capacitor C36 are respectively connected with the inverting input end and the output end of the 32 nd operational amplifier A32;

the constant current output circuit comprises 37 th and 38 th capacitors C37 and C38 and 36 th and 37 th resistors R36 and R37, wherein one end of the 36 th resistor R36 is connected with the output end of the 31 st operational amplifier A31 through the 37 th capacitor C37, and the other end of the 36 th resistor R36 is connected with a head constant current output lead wire; one end of the 37 th resistor R37 is connected with the output end of the 32 th operational amplifier A32 through a 38 th capacitor C38, and the other end is connected with an abdominal constant-current output lead wire.

In order to obtain better technical effect, the four paths of impedance synchronous detection circuits have the same structure and performance and comprise an impedance preamplifier, a multiplication synchronous detection circuit, a basic impedance peak detection circuit, an impedance intermediate amplifier, an impedance 50Hz active trap circuit and an impedance final amplifier;

wherein, the input and the output of the impedance preamplifier are coupled without a transformer; the multiplication synchronous detection circuit is designed for resisting external strong electromagnetic interference; the basic impedance peak detection circuit aims at converting an alternating current signal into a direct current signal; amplifying the impedance intermediate amplifier signal; an impedance 50Hz active trap circuit removes the influence of mains supply interference; the impedance final amplifier is used for re-amplifying the signal;

the impedance preamplifier comprises two paths of high-frequency filter circuits and a high-frequency amplifier; the two high-frequency filter circuits are used for inhibiting external high-frequency interference and comprise 41-44 capacitors C41-C44 and 41-44 resistors R41-R44; the high-frequency amplifier comprises a 45 th resistor R45 and a41 th operational amplifier A41; one end of the 41 th capacitor C41 is connected with the neck impedance input lead wire, and the other end is connected with the inverting input end of the 41 th operational amplifier A41 through a41 th resistor R41; one end of the 43 rd resistor R43 is grounded, and the other end of the 43 th resistor R43 is connected with the inverting input end of the 41 th operational amplifier A41; one end of the 43 th capacitor C43 is grounded, and the other end of the 43 th capacitor C43 is connected with the inverting input end of the 41 th operational amplifier A41; one end of the 42 th capacitor C42 is connected with a thoracic impedance input lead wire, and the other end is connected with the non-inverting input end of the 41 th operational amplifier A41 through a42 th resistor R42; one end of the 44 th resistor R44 is grounded, and the other end of the 44 th resistor R44 is connected with the non-inverting input end of the 41 th operational amplifier A41; one end of the 44 th capacitor C44 is grounded, and the other end of the 44 th capacitor C44 is connected with the non-inverting input end of the 41 th operational amplifier A41; two ends of the 45 th resistor R45 are respectively connected with the inverting input end and the non-inverting input end of the 41 th operational amplifier A41; the output signal of the 41 st operational amplifier A41 is output in two paths, wherein one path is coupled with a 46 th resistor R46 through a 46 th capacitor C46, and is sent to a multiplication synchronous detection circuit for detection; the other path is coupled through a 45 th capacitor C45 and is sent to a basic impedance peak detection circuit;

the basic impedance peak detection circuit comprises 41-42 detection diodes D41-D42, a 48 th capacitor C48 and a 49 th resistor R49; the direct current voltage output by the basic impedance peak detection circuit reflects the magnitude of basic impedance, and is divided into two paths to be output after voltage division correction by the potentiometer W41, wherein one path is sent to the A/D card for collection, and the other path is sent to the difference value calculation circuit shown in figure 6. The output end of the 41 st operational amplifier A41 is connected with one end of a 45 th capacitor C45, the other end of the 45 th capacitor C45 is divided into two paths, one path is connected with the cathode of a42 th detection diode D42, and the other path is connected with the anode of a41 th detection diode D41; the anode of the 42 th detection diode D42 is grounded, the cathode of the 41 th detection diode D41 is divided into two paths, one path is grounded through a 48 th capacitor C48, and the other path is connected with the input end of the 41 th potentiometer W41 through a 49 th resistor R49; the grounding end of the 41 th potentiometer W41 is grounded, and the output end thereof obtains Z_0sThe circuit is divided into two paths, wherein one path is sent to the A/D card, and the other path is connected with a difference value calculating circuit;

the multiplication synchronous detection circuit comprises an integrated analog multiplier chip MC41, 46 th to 48 th resistors R46 to R48 and a 47 th capacitor C47; the output end of the 41 st operational amplifier A41 is connected with a 46 th resistor R46 through a 46 th capacitor C46, and the other end of the 46 th resistor R46 is grounded; two multiplication input ends of the integrated analog multiplier chip MC41 are grounded through the 46 th resistor R46, the three grounded ends are grounded, the output end of the integrated analog multiplier chip MC41 is connected with one end of the 47 th resistor R47, the other end of the resistor R47 is connected with one ends of the 48 th resistor R48 and the 47 th capacitor C47 and then connected to the intermediate amplifier, and the other ends of the 48 th resistor R48 and the 47 th capacitor C47 are grounded respectively;

the impedance intermediate amplifier comprises 49-411 capacitors C49-C411, 42 operational amplifier A42 and 410-413 resistors R410-R413; the positive pole of the 49 th capacitor C49 is connected with the 47 th resistor R47, the negative pole of the 49 th capacitor C49 is connected with the negative pole of the 410 th capacitor C410, the positive pole of the 410 th capacitor C410 is connected with the non-inverting input end of the 42 th operational amplifier A42, and the non-inverting input end of the 42 th operational amplifier A42 is also grounded through the 410 th resistor R410; the inverting input end of the 42 th operational amplifier A42 is connected with the output end of the 42 th operational amplifier A42 through a 411 th capacitor C411; one end of the 411 th resistor R411 is connected with the inverted input end of the 42 th operational amplifier A42, the other end of the 411 th resistor R411 is divided into two paths, one path is grounded through the 413 th resistor R413, and the other path is connected with the output end of the 42 th operational amplifier A42 through the 412 th resistor R412;

the impedance 50Hz active trap circuit comprises 414 th and 416 th resistors R414-R416 and 412 th and 414 th capacitors C412-C414, and is used for inhibiting 50Hz mains interference; one end of a 414 th resistor R414 is connected with the output end of a42 th operational amplifier A42, the other end of the 414 th resistor R414 is divided into two paths, one path is grounded through a 414 th capacitor C414 and a 420 th resistor R420, and the other path is connected with the non-inverting input end of a43 th operational amplifier A43 through a 415 th resistor R415; one end of a 412 th capacitor C412 is connected with the output end of a42 th operational amplifier A42, the other end of the 412 th capacitor C is divided into two paths, wherein one path is grounded through a 416 th resistor R416 and a 420 th resistor R420, and the other path is connected with the non-inverting input end of a43 th operational amplifier A43 through a 413 th capacitor C413;

the impedance final stage amplifier comprises a43 rd operational amplifier A43, a 415 th capacitor C415 and 417 nd and 420 th resistors R417-R420, and an output signal of the 43 th operational amplifier A43 is divided into two paths to be output after voltage division correction by a potentiometer W42, wherein one path is sent to an A/D card for collection, and the other path is sent to a difference value calculation circuit. The inverting input end of the 43 rd operational amplifier A43 is connected with the output end of the 43 th operational amplifier A43 through a 415 th capacitor C415; one end of a 417 resistor R417 is connected with the inverting input end of the 43 rd operational amplifier A43, the other end of the 417 resistor R417 is divided into two paths, one path is grounded through a 419 resistor R419 and a 420 resistor R420, and the other path is connected with the output end of the 43 th operational amplifier A43 through a 418 resistor R418; the output end of the 43 rd operational amplifier A43 is connected with the input end of the 42 th potentiometer W42; the ground terminal of the 42 th potentiometer W42 is grounded, and the output terminal thereof obtains Delta Z_sAnd is divided into two paths, wherein one path is sent to the A/D card, and the other path is connected with a difference value calculating circuit.

In order to obtain better technical effect, one end of the head constant current output lead wire is connected with the high-frequency constant current source circuit, and the other end of the head constant current output lead wire is connected with a semi-annular electrode, is 2cm multiplied by 35cm in size and is positioned at the forehead; one end of the abdomen constant current output lead wire is connected with the high-frequency constant current source circuit, the other end of the abdomen constant current output lead wire is connected with the annular electrode, the size of the abdomen constant current output lead wire is 2cm multiplied by 90cm, and the abdomen constant current output lead wire is 5-7cm away from the lower edge of the chest xiphoid process.

In order to obtain better technical effect, one end of the neck impedance input lead wire is connected with the impedance synchronous detection circuit, and the other end of the neck impedance input lead wire is connected with a neck impedance voltage detection electrode E₁、E₂、E₃、E₄(ii) a One end of the thoracic impedance input lead wire is connected with the impedance synchronous detection circuit, and the other end is connected with a thoracic impedance voltage detection electrode E₁′、E₂′、E₃′、E₄'; the neck impedance voltage detection electrode E₁、E₂、E₃、E₄At the root of the neck, the thoracic impedance voltage detection electrode E₁′、E₂′、 E₃′、E₄' the lower edge of the xiphoid process is at the same level; four pairs of impedance voltage detection electrodes E₁-E₁′、E₂-E₂′、E₃-E₃′、E₄-E₄' the chest is respectively placed at the symmetrical positions of 45 degrees, 135 degrees, 225 degrees and 315 degrees, the lower edge of the chest body surface xiphoid process is 0 degree, and the angle is calculated according to the left-handed direction.

In order to obtain better technical effect, the cervical four-lead impedance detection electrode belt and the chest four-lead impedance detection electrode belt are also arranged; the neck four-lead impedance detection electrode band is an adhesive band with the width of 3cm, and the neck impedance voltage detection electrode E₁、E₂、E₃、E₄The neck four-lead impedance detection electrode belts are fixed on the neck at equal intervals; the chest four-lead impedance detection electrode band is an adhesive band with the width of 4cm, and the chest impedance voltage detection electrode E₁′、E₂′、E₃′、E₄' fixing on the chest four-lead impedance detection electrode belt at equal intervals; and the middle parts of the neck four-lead impedance detection electrode belt and the chest four-lead impedance detection electrode belt are respectively provided with a positioning mark.

In order to obtain better technical effect, the neck four-lead impedance detection electrode has four length specifications of 30cm, 34cm, 38cm and 42 cm; the chest four-lead impedance detection electrode has four length specifications of 70cm, 80cm, 90cm and 100 cm.

For better technical effect, the neck impedance voltage detection electrode E₁、E₂、E₃、E₄And a thoracic impedance voltage detecting electrode E₁′、E₂′、E₃′、E₄' both were Ag/AgCl disposable electrodes with a conductive disc size of 15 mm.

In order to obtain better technical effects, the two paths of difference calculating circuits have the same structure and performance and both consist of an adding operational amplifier and an inverting circuit, each path of difference calculating circuit comprises two paths of adders, and each adder comprises an adding operational amplifier, an inverter and a61 st potentiometer W61, wherein the adding operational amplifier comprises 61 st, 62 nd, 63 th and 64 th resistors R61, R62, R63, R64 and a61 st operational amplifier A61; two ends of the 63 rd resistor R63 are respectively connected with the output end and the inverting input end of the 61 st operational amplifier A61; one end of the 64 th resistor R64 is grounded, and the other end of the 64 th resistor R64 is connected with the non-inverting input end of the 61 st operational amplifier A61; the A input end of the difference value calculation circuit is connected with the inverting input end of a61 st operational amplifier A61 through a61 st resistor R61; the B input end of the difference value calculation circuit is connected with the inverting input end of a62 nd operational amplifier A62 through a62 nd resistor R62; the resistance values of the 61 st resistor R61 and the 62 nd resistor R62 are equal, the resistance value of the 63 st resistor R63 is one half of that of the 61 st resistor R61, and the 64 th resistor R64 is a balance resistor at the same phase end of the 61 st operational amplifier A61; since the output signal of the 61 st operational amplifier A61 is opposite in phase to its input signal, an inverter is added, which comprises 65 th, 66 th and 67 th resistors R65, R66, R67 and 62 th operational amplifier A62; two ends of the 67 th resistor R67 are respectively connected with the output end and the inverting input end of the 62 th operational amplifier A62; one end of the 65 th resistor R65 is connected with the output end of the 61 st operational amplifier A61 of the addition operational amplifier, and the other end thereof is connected with the inverting input end of the 62 th operational amplifier A62; one end of the 66 th resistor R66 is grounded, and the other end of the 66 th resistor R66 is connected with the non-inverting input end of the 62 nd operational amplifier A62; the grounding end of the 61 st potentiometer W61 is grounded, the input end of the 61 st potentiometer W61 is connected with the output end of the 62 nd operational amplifier A62 of the inverter, and the output end of the 61 st potentiometer W61 is transmitted to an A/D card for collection.

In order to obtain better technical effect, the electrocardio measuring circuit comprises an electrocardio preamplifier, an electrocardio intermediate amplifier, an electrocardio 50Hz active trap circuit, an electrocardio final amplifier, a71 th potentiometer W71, two electrocardio lead wires and three electrocardio detection electrodes;

the electrocardio preamplifier comprises two same input filter circuits, a 75 th resistor R75 and a71 th operational amplifier A71; the two identical input filter circuits comprise 71-74 resistors R71-R74 and 71-72 capacitors C71-C72, wherein the first input filter circuit comprises 71-73 resistors R71, R73 and 71-71 capacitors C71, one end of the 71-71 resistor R71 is connected with a first electrocardiogram detection electrode through a first electrocardiogram lead, and the other end of the 71-71 operational amplifier A71 is directly connected with the inverting input end of the 71-71 operational amplifier; one end of the 72 th resistor R72 is directly connected with the inverting input end of the 71 th operational amplifier A71, and the other end of the 72 th resistor R72 is directly grounded; one end of the 71 th capacitor C71 is directly connected with the inverting input end of the 71 th operational amplifier A71, and the other end of the 71 th capacitor C71 is directly grounded; the second input filter circuit comprises 72 th and 74 th resistors R72 and R74 and a72 th capacitor C72, one end of the 72 th resistor R72 is connected with the second electrocardio detection electrode through a second electrocardio connecting wire, and the other end of the 72 th resistor R72 is directly connected with the non-inverting input end of the 71 th operational amplifier A71; one end of the 74 th resistor R74 is directly connected with the non-inverting input end of the 71 th operational amplifier A71, and the other end of the 74 th resistor R74 is directly grounded; one end of the 72 th capacitor C72 is directly connected with the non-inverting input end of the 71 th operational amplifier A71, and the other end of the 72 th capacitor C72 is directly grounded; two ends of the 75 th resistor R75 are respectively connected with the inverting input end and the non-inverting input end of the 71 th operational amplifier A71;

the electrocardio intermediate amplifier comprises 73 th and 74 th capacitors C73 and C74, 76 th to 79 th resistors R76 to R79 and 72 th operational amplifier A72; the positive electrode of the 73 th capacitor C73 is connected with the output end of the 71 th operational amplifier A71, and the negative electrode of the 73 th capacitor C73 is connected with the negative electrode of the 74 th capacitor C74; the positive electrode of the 74 th capacitor C74 is directly connected with the non-inverting input end of the 72 th operational amplifier A72; two ends of the 76 th resistor R76 are respectively grounded and connected with the non-inverting input end of the 72 th operational amplifier A72; the inverting input end of the 72 th operational amplifier A72 is connected with one end of a 79 th resistor R79 through a 77 th resistor R77, and the other end of the 79 th resistor R79 is grounded; the output end of the 72 th operational amplifier A72 is connected with the non-ground end of the 79 th resistor R79 through a 78 th resistor R78;

the electrocardio 50Hz active trap circuit comprises 710 th and 712 th resistors R710-712 and 76 th and 78 th capacitors C76-C78, and is used for inhibiting 50Hz mains supply interference; one end of the 710 th resistor R710 is connected with the output end of the 72 th operational amplifier A72, the other end of the 710 th resistor R710 is divided into two paths, one path is connected with the non-inverting input end of the 73 th operational amplifier A73 through a 711 th resistor R711, the other path is connected with a 716 th resistor R716 through a 78 th capacitor C78, and the other end of the 716 th resistor R716 is grounded; one end of the 76 th capacitor C76 is connected with the output end of the 72 th operational amplifier A72, the other end of the 76 th capacitor C76 is divided into two paths, one path is connected with the non-inverting input end of the 73 th operational amplifier A73 through a 77 th capacitor C77, the other path is connected with the 716 th resistor R716 through a 712 resistor R712, and the other end of the 716 th resistor R716 is grounded;

the electrocardio final amplifier comprises a73 rd operational amplifier A73 and 713 th and 716 th resistors R713-R716, wherein the inverting input end of the 73 th operational amplifier A73 is connected with one end of the 713 th resistor R713, the other end of the 713 th resistor R713 is divided into two paths, one path is connected with the output end of the 73 th operational amplifier A73 through a 714 th resistor R714, and the other path is sequentially connected with a 715 th resistor R715 and a 716 th resistor R716 to be grounded;

the output end of the 73 th operational amplifier A73 is connected with the input end of the 71 th potentiometer W71, the ground end of the 71 th potentiometer W71 is grounded, and the output end of the 71 th potentiometer W71 is sent to an A/D card for collection; the third electrocardiographic detection electrode is grounded.

For better technical effect, the heart sound measuring circuit comprises a piezoelectric heart sound sensor, a two-stage resistance-capacitance coupling amplifier and an 81 st potentiometer W81,

the piezoelectric heart sound sensor converts mechanical vibration signals of the heart into heart sound electrical signals;

the first-stage resistance-capacitance coupling amplifier comprises 81 st capacitors C81-C82, 81 st-84 th resistors R81-R82 and an 81 st operational amplifier A81, one end of the 81 st capacitor C81 is connected with the piezoelectric heart sound sensor, the other end of the 81 st capacitor C81 is divided into two paths, one path is grounded through the 81 st resistor R81, and the other path is directly connected with the non-inverting input end of the 81 st operational amplifier A81; two ends of the 82 nd capacitor C82 are respectively connected with the inverting input end and the output end of the 81 th operational amplifier A81; one end of the 82 th resistor R82 is connected with the inverting input end of the 81 th operational amplifier A81, the other end of the 82 th resistor R82 is divided into two paths, one path is connected with the 84 th resistor R84 and then grounded, and the other path is connected with the 83 th resistor R83 and then connected with the output end of the 81 th operational amplifier A81;

the second stage of the resistance-capacitance coupled amplifier comprises an 83 th capacitor C83, 85 th-88 th resistors R85-R85 and an 82 th operational amplifier A82, one end of the 83 th capacitor C83 is connected with the 81 st operational amplifier A81 output end of the first stage of the resistance-capacitance coupled amplifier, the other end of the 83 th capacitor C83 is divided into two paths, one path is grounded through the 85 th resistor R85, and the other path is directly connected with the non-inverting input end of the 82 th operational amplifier A82; one end of the 86 th resistor R86 is connected with the inverted input end of the 82 th operational amplifier A82, the other end of the 86 th resistor R86 is divided into two paths, one path is connected with the 88 th resistor R88 and then grounded, and the other path is connected with the 87 th resistor R87 and then connected with the output end of the 82 th operational amplifier A82;

the output end of the 82 nd operational amplifier A82 is connected with the input end of the 81 th potentiometer W81, the grounding end of the 81 th potentiometer W81 is grounded, and the output end of the 81 th potentiometer W81 is sent to an A/D card for collection.

In order to obtain better technical effect, the DC isolation voltage-stabilized power supply assembly comprises two groups of DC isolation power supplies;

the 1 st direct current isolation power supply comprises a direct current isolation power supply component IC91, 91 st to 96 th capacitors C91 to C96 and 93 nd to 94 th integrated voltage regulation chips IC93 to IC94, wherein the input end of the direct current isolation power supply component IC91 is connected with the output end + Vi of the computer switching power supply, the grounding input end is grounded, the positive voltage output end outputs + V0 voltage, the positive voltage output end is divided into three paths, the first path is grounded through a 91 th capacitor C91, the second path is grounded through a 92 th capacitor C92, and the third path is connected with the input end of a 93 th integrated voltage regulation chip IC 93; the output common terminal of the DC isolation power supply component IC91 is grounded; the output negative voltage end of the direct current isolation power supply module IC91 outputs-V0 voltage, the output negative voltage end is divided into three paths, the first path is grounded through a 93-th capacitor C93, the second path is grounded through a 94-th capacitor C94, and the third path is connected with the input end of a 94-th integrated voltage stabilizing chip IC 94; the common end of the 93 th and 94 th integrated voltage stabilization chips IC93-IC94 is grounded after being shorted; the output end of the 93 th integrated voltage-stabilizing chip IC93 is divided into two paths, one path is grounded through a 95 th capacitor C95, and the other path outputs positive voltage + V1; the output end of the 94 th integrated voltage-stabilizing chip IC94 is divided into two paths, one path is grounded through a 96 th capacitor C96, and the other path outputs negative voltage-V1;

the 2 nd direct current isolation power supply comprises a direct current isolation power supply component IC102 and a 101 st-104 th capacitor C101-104, wherein the input end of the direct current isolation power supply component IC102 is connected with the output end + Vi of the computer switching power supply, the grounding input end is grounded, the positive voltage output end outputs + V2 voltage, the positive voltage output end is divided into three paths, and the first path is grounded through the 101 st capacitor C101; the second path is grounded through a second 102 capacitor C102; the third path outputs positive voltage; the output common end of the DC isolation power supply component IC102 is grounded; the output negative voltage end of the DC isolation power supply component IC102 outputs-V2 voltage, the output negative voltage end is divided into three paths, the first path is grounded through a 103 th capacitor C101, the second path is grounded through a 104 th capacitor C104, and the third path outputs negative voltage.

The four-lead measurement mode is adopted in the patent, only four chest body surface mixed impedance signals are synchronously detected, compared with the Chinese patent ZL200710028378.2, two detection circuits are omitted, and in addition, two difference calculation circuits are designed. To demonstrate the feasibility of the difference method, the applicant compared the six leads of the Chinese patent ZL200710028378.2 with the four leads of the present application to measure the heart index of 120 subjects with a correlation coefficient of 0.93 (P)<0.001). This shows that the measurement results of the two are highly correlated, and the four-lead measurement mode of the present application can replace the original six-lead measurement mode. Compared with the six-lead measurement mode of the Chinese patent ZL200710028378.2, the chest body surface mixed impedance signal is synchronously measured by adopting the four-lead mode, two pairs of electrocardio detection electrodes at the left and right axillary middle lines (namely the 90-degree and 270-degree positions in the figure 1 of the specification) of the original six-lead mode are eliminated, and the current electrode I is eliminated₂The original shank is moved to the abdomen, the two square sheet electrodes are replaced by one annular electrode, the total number of the electrodes is reduced from 15 to 10, and the operation steps are simplified.

Compared with the prior art, the utility model discloses circuit structure is simple, and the interference killing feature is strong, and constant current's range and frequency are stable, and the common mode rejection ratio can not appear circuit blocking. The instrument can measure conventional cardiac function parameters such as cardiac output, ejection fraction, cardiac contractility index, total peripheral resistance, aortic compliance and the like of the left ventricle, and can also measure important cardiac function parameters such as left ventricle cardiac efficiency, heart internal work, total heart work, myocardial oxygen consumption and the like which are not possessed by the Chinese patent ZL 200710028378.2.

Drawings

FIG. 1 is a schematic view of an embodiment of the present invention in use;

FIG. 2 is a schematic structural diagram of an embodiment of the present invention;

fig. 3 is a circuit diagram of a high-frequency constant current source according to an embodiment of the present invention;

fig. 4 is a circuit diagram of the impedance synchronous detection circuit according to the embodiment of the present invention;

FIG. 5 is a circuit diagram of a basic impedance temperature correction circuit according to an embodiment of the present invention;

fig. 6 is a circuit diagram of a differential value calculation circuit according to an embodiment of the present invention;

FIG. 7 is a circuit diagram of an embodiment of the electrocardiograph detection circuit of the present invention;

fig. 8 is a circuit diagram of a heart sound detection circuit according to an embodiment of the present invention;

fig. 9 is a circuit diagram of a first dc isolated power supply of the present invention;

fig. 10 is a circuit diagram of a second dc isolated power supply of the present invention;

FIG. 11 is a schematic diagram of the structure of a 38cm neck four-lead impedance detection electrode band of the present invention;

fig. 12 is a schematic diagram of the structure of the 80cm chest four-lead impedance detection electrode band of the present invention.

Detailed Description

The following describes the present invention in further detail with reference to the drawings and examples.

A four-lead impedance waveform reconstruction heart function instrument is shown in figure 2 and comprises a high-frequency constant-current source circuit, four paths of completely same impedance synchronous detection circuits, two paths of completely same difference calculation circuits, a basic impedance temperature correction circuit, an electrocardio detection circuit, a heart sound detection circuit, a piezoelectric heart sound sensor, an electrocardio detection electrode, a constant-current output lead wire, an impedance input lead wire, an A/D card, a computer, an input/output device and a direct-current isolation voltage stabilization power supply assembly;

as shown in fig. 1, the constant current output lead line includes a head constant current output lead line and an abdomen constant current output lead line; one end of the head constant current output lead wire is connected with the high-frequency constant current source circuit, and the other end of the head constant current output lead wire is connected with the semi-annular electrode, is 2cm multiplied by 35cm in size and is positioned at the forehead; one end of the abdomen constant current output lead wire is connected with the high-frequency constant current source circuit, the other end of the abdomen constant current output lead wire is connected with the annular electrode, the size of the abdomen constant current output lead wire is 2cm multiplied by 90cm, and the abdomen constant current output lead wire is 5-7cm away from the lower edge of the chest xiphoid process.

The high-frequency constant current source circuit outputs a high-frequency constant current signal and is respectively connected with the head and the abdomen of the patient through a head constant current output lead wire and an abdomen constant current output lead wire;

as shown in fig. 3, the high-frequency constant current source circuit includes a crystal oscillator, a square wave-trapezoidal wave conversion circuit, and a constant current output circuit;

the crystal oscillator comprises a1 st digital chip IC31, a crystal, a31 st resistor R31, 31 st and 32 th capacitors C31 and C32; the 31 st and 32 nd capacitors C31 and C32 are nonpolar capacitors, preferably small-capacity capacitors; the crystal is connected with a first resistor R31 in parallel, and two ends of the crystal are respectively connected with pins 10 and 11 in a31 st digital chip IC31 and then are respectively grounded through capacitors C31 and C32 of 31 st and 32 th; the 31 st digital chip IC31 is internally integrated with a frequency division circuit, and the output signal of the crystal oscillator is subjected to frequency division by the frequency division circuit to obtain a low-frequency acquisition timing inquiry pulse main frequency signal and a high-frequency impedance detection main frequency signal; the low-frequency acquisition timing inquiry pulse main frequency signal is led out from a pin 4 of a31 st digital chip IC31 and is sent to an A/D card for acquisition and inquiry; the high-frequency impedance detection main frequency signal is led out from a pin 5 of a31 st digital chip IC31 and is output in two paths;

the square wave-trapezoidal wave conversion circuit comprises a32 nd chip IC32, 33 th, 34 th, 35 th and 36 th capacitors C33, C34, C35 and C36, 31 th and 32 th potentiometers W31 and W32, 32 th, 33 th, 34 th and 35 th resistors R32, R33, R34 and R35, and 31 th and 32 th operational amplifiers A31 and A32; the 33 th capacitor, the 34 th capacitor, the C33 capacitor and the C34 capacitor are nonpolar capacitors; the 32 nd chip IC32 is an inverter IC; the grounding end of the 31 st potentiometer W31 is grounded, and the input end of the 31 st potentiometer W31 is connected with the pin 5 of the 31 st digital chip IC31 through a 33 rd capacitor C33 and a32 th chip IC32 in sequence; the grounding end of the 32 nd potentiometer W32 is grounded, and the input end is directly connected with the 5 th pin of the 31 st digital chip IC31 through a 34 th capacitor C34; the 31 st operational amplifier A31, the 35 th capacitor C35 and the 32 th and 33 th resistors R32 and R33 form a first integrating circuit; one end of the 32 nd resistor R32 is connected with the output end of the 31 st potentiometer W31, and the other end of the 32 nd resistor R32 is connected with the inverting input end of the 31 th operational amplifier A31; one end of the 33 th resistor R33 is grounded, and the other end of the 33 th resistor R33 is connected with the non-inverting input end of the 31 th operational amplifier A31; two ends of the 35 th capacitor C35 are respectively connected with the inverting input end and the output end of the 31 st operational amplifier A31; the 32 nd operational amplifier A32, the 36 th capacitor C36 and the 34 th and 35 th resistors R34 and R35 form a second integrating circuit; one end of the 34 th resistor R34 is connected with the output end of the 32 th potentiometer W32, and the other end of the 34 th resistor R34 is connected with the inverting input end of the 32 th operational amplifier A32; one end of the 35 th resistor R35 is grounded, and the other end of the 35 th resistor R35 is connected with the non-inverting input end of the 32 nd operational amplifier A32; two ends of the 36 th capacitor C36 are respectively connected with the inverting input end and the output end of the 32 nd operational amplifier A32;

the constant current output circuit comprises 37 th and 38 th capacitors C37 and C38 and 36 th and 37 th resistors R36 and R37, wherein one end of the 36 th resistor R36 is connected with the output end of the 31 st operational amplifier A31 through the 37 th capacitor C37, and the other end of the 36 th resistor R36 is connected with a head constant current output lead wire; one end of the 37 th resistor R37 is connected with the output end of the 32 th operational amplifier A32 through a 38 th capacitor C38, and the other end of the 37 th resistor R37 is connected with an abdominal constant-current output lead wire; the head constant current output lead wire and the abdomen constant current output lead wire are respectively connected with a current electrode I₁、I₂Said current electrode I₁、I₂Respectively connected with the forehead and the abdomen of the patient to supply constant weak high-frequency current I₀Is delivered into the chest of the human body from the forehead and is delivered from the abdomen; the 37 th to 38 th capacitors C37 to C38 are coupling capacitors and are nonpolar capacitors, and the withstand voltage of the capacitors is more than 100V. For keeping constant the high-frequency current passing through the human body during measurementThe resistances of the 36 th to 37 th resistors R36 to R37 should be relatively large.

From the above analysis and fig. 3, it can be known that the signal output by the crystal oscillator (pins 10 and 11 of the 1 st digital chip IC31, the crystal, the resistor R31, and the capacitors C31-C32) is divided by counting frequency inside the 1 st digital chip IC31 to obtain two paths of signals, wherein one path is a low-frequency acquisition timing inquiry pulse main frequency signal, which is led out from pin 3 of the 1 st digital chip IC31 and sent to the a/D card for acquisition; the other path is a high-frequency impedance detection main frequency signal, is led out from a pin 4 of a1 st digital chip IC31 and is output in two paths, wherein one path is sent to a31 st potentiometer W31 for voltage division output, and is input to a32 nd operational amplifier A32 for truncated integration to output trapezoidal waves; the other path is inverted by the 32 nd chip IC32, and then sent to the 31 st operational amplifier A31 for truncated integration to output trapezoidal wave, but it is in opposite phase with the trapezoidal wave output by the 32 nd operational amplifier A32. The output signal is coupled by capacitors C37-C38 and current-limited by resistors R36-R37 to obtain weak high-frequency current I with constant effective value₀Then passes through a head constant current output lead wire, an abdomen constant current output lead wire and a semi-annular electrode I₁Ring electrode I₂Respectively sent into the chest of the human body from the forehead and the abdomen.

The four impedance synchronous detection circuits are completely identical in structure and performance, each impedance synchronous detection circuit is connected with two impedance input lead wires, the two impedance input lead wires are divided into a neck impedance input lead wire and a chest impedance input lead wire, and the four completely identical impedance synchronous detection circuits respectively obtain four basic impedances Z between the neck and the chest_0s1、Z_0s2、Z_0s3、 Z_0s4And four fundamental impedance variation amplitudes Δ Z_s1、ΔZ_s2、ΔZ_s3、ΔZ_s4And sending the data to an A/D card for collection.

As shown in fig. 1, one end of the neck impedance input lead is connected to the impedance synchronous detection circuit, and the other end is connected to a neck impedance voltage detection electrode E₁、E₂、E₃、E₄(ii) a One end of the thoracic impedance input lead wire is connected with the impedance synchronous detection circuit, and the other end is connected with a thoracic impedance voltage detection electrode E₁′、E₂′、E₃′、E₄'; the neck impedance voltage detection electrode E₁、E₂、E₃、E₄At the root of the neck, the thoracic impedance voltage detection electrode E₁′、E₂′、E₃′、E₄' the lower edge of the xiphoid process is at the same level; four pairs of impedance voltage detection electrodes E₁-E₁′、E₂-E₂′、E₃-E₃′、E₄-E₄' the chest is respectively placed at the symmetrical positions of 45 degrees, 135 degrees, 225 degrees and 315 degrees, the lower edge of the chest body surface xiphoid process is 0 degree, and the angle is calculated according to the left-handed direction.

The neck impedance voltage detection electrode E₁、E₂、E₃、E₄And a thoracic impedance voltage detecting electrode E₁′、E₂′、E₃′、 E₄' both are Ag/AgCl disposable electrodes, and the conductive disc of the Ag/AgCl disposable electrode has the size phi of 15 mm;

as shown in fig. 10 and 11, as a preferred technical solution, there are also a neck four-lead impedance detection electrode belt and a chest four-lead impedance detection electrode belt; the neck four-lead impedance detection electrode band is an adhesive band with the width of 3cm, and the neck impedance voltage detection electrode E₁、E₂、E₃、E₄The neck four-lead impedance detection electrode belts are fixed on the neck at equal intervals; the chest four-lead impedance detection electrode band is an adhesive band with the width of 4cm, and the chest impedance voltage detection electrode E₁′、E₂′、 E₃′、E₄' fixing on the chest four-lead impedance detection electrode belt at equal intervals; the middle parts of the neck four-lead impedance detection electrode belt and the chest four-lead impedance detection electrode belt are respectively provided with a positioning mark,

as a preferred technical solution, the positioning mark is a through hole;

the neck four-lead impedance detection electrode has four length specifications of 30cm, 34cm, 38cm and 42 cm; FIG. 11 is a 38cm length neck four-lead impedance detection electrode strip, in which the large black dots are neck impedance voltage detection electrodes E₁、E₂、 E₃、E₄And fixed on the neck four-lead impedance detection electrode band at equal intervals of 9.5cm, and two neck impedance voltage detection electrodes E at two ends of the neck four-lead impedance detection electrode band₁、E₄The distance from the edge of the neck in the length direction of the four-lead impedance detection electrode belt is 3.5 cm; the neck four-lead impedance detection electrode belt is an elastic belt with the width of 3.0cm, so that the position of the electrode is convenient to adjust, and magic tapes or snap buttons or hasps are respectively fixed at the two ends of the neck four-lead impedance detection electrode belt, so that the neck four-lead impedance detection electrode belt is convenient to quickly and fixedly connect; a positioning mark, namely a black circle in the figure, is arranged at the center of the length direction of the neck four-lead impedance detection electrode belt; the neck four-lead impedance detection electrode bands with other length specifications are changed in proportion;

the chest four-lead impedance detection electrode has four length specifications of 70cm, 80cm, 90cm and 100cm, the chest four-lead impedance detection electrode belt with the length specification of 80cm is taken as an example in the figure 12, and the big black point in the figure is a chest impedance voltage detection electrode E₁′、 E₂′、E₃′、E₄', and are fixed on the chest four-lead impedance detection electrode belt at equal intervals of 20cm, and two chest impedance voltage detection electrodes E at two ends of the chest four-lead impedance detection electrode belt₁′、E₄' 5.0cm from the length-direction edge of the chest four-lead impedance detection electrode belt; the chest four-lead impedance detection electrode belt is an elastic belt with the width of 4.0cm, so that the position of the electrode is convenient to adjust, and magic tapes or snap buttons or hasps are respectively fixed at the two ends of the chest four-lead impedance detection electrode belt, so that the quick fixed connection is convenient; a positioning mark, namely a black circle in the figure, is arranged at the center of the chest four-lead impedance detection electrode belt in the length direction; the chest four-lead impedance detection electrode bands with other length specifications are changed in proportion.

As shown in fig. 4, each impedance synchronous detection circuit comprises an impedance preamplifier, a multiplication synchronous detection circuit, a base impedance peak detection circuit, an impedance intermediate amplifier, an impedance 50Hz active trap circuit and an impedance final amplifier;

the input and the output of the impedance preamplifier are coupled without a transformer, the multiplication synchronous detection circuit is designed for resisting external strong electromagnetic interference, and the basic impedance peak detection circuit aims at converting an alternating current signal into a direct current signal; amplifying the impedance intermediate amplifier signal; an impedance 50Hz active trap circuit removes the influence of mains supply interference; the impedance final amplifier is used for re-amplifying the signal; the 41 th to 44 th capacitors C41 to C44 are all nonpolar capacitors, and the 41 th to 42 th capacitors C41 to C42 are coupling capacitors. The 41 st operational amplifier A41 is designed by using an instrument operational amplifier, and is characterized by few configuration components, high input impedance, low noise, high common mode rejection ratio, low power consumption and large dynamic working range. The amplification factor of A41 can be changed by adjusting the 45 th resistor R45;

the basic impedance peak detection circuit comprises 41-42 detection diodes D41-D42, a 48 th capacitor C48 and a 49 th resistor R49; the output end of the 41 st operational amplifier A41One end of a 45 th capacitor C45 is connected, and the other end of the 45 th capacitor C45 is divided into two paths, wherein one path is connected with the cathode of a42 th detection diode D42, and the other path is connected with the anode of a41 th detection diode D41; the anode of the 42 th detection diode D42 is grounded, the cathode of the 41 th detection diode D41 is divided into two paths, one path is grounded through a 48 th capacitor C48, and the other path is connected with the input end of the 41 th potentiometer W41 through a 49 th resistor R49; the grounding end of the 41 th potentiometer W41 is grounded, and the output end thereof obtains Z_0sAnd divided into two paths, wherein one path is sent to the A/D card, and the other path is sent to the difference value calculating circuit; the direct-current voltage output by the basic impedance peak detection circuit reflects the magnitude of basic impedance, and is divided into two paths for output after voltage division correction by a potentiometer W41, wherein one path is sent to an A/D card for collection, and the other path is sent to a difference value calculation circuit;

the multiplication synchronous detection circuit comprises an integrated analog multiplier chip MC41, 46 th to 48 th resistors R46 to R48 and a 47 th capacitor C47; the output end of the 41 st operational amplifier A41 is connected with a 46 th resistor R46 through a 46 th capacitor C46, and the other end of the 46 th resistor R46 is grounded; two multiplication input ends of the integrated analog multiplier chip MC41 are grounded through the 46 th resistor R46, the three grounded ends are grounded, the output end of the integrated analog multiplier chip MC41 is connected with one end of the 47 th resistor R47, the other end of the resistor R47 is connected with one ends of the 48 th resistor R48 and the 47 th capacitor C47 and then connected to the intermediate amplifier, and the other ends of the 48 th resistor R48 and the 47 th capacitor C47 are grounded respectively; the 46 th to 47 th capacitors C46 to C47 are all nonpolar capacitors. According to the working principle of the analog multiplication synchronous detection circuit, the detection circuit can detect signals reflecting the change of the chest body surface impedance, and has the outstanding advantage of strong anti-interference performance on external interference signals;

the impedance intermediate amplifier comprises 49-411 capacitors C49-C411, 42 operational amplifier A42 and 410-413 resistors R410-R413; the positive pole of the 49 th capacitor C49 is connected with the 47 th resistor R47, the negative pole of the 49 th capacitor C49 is connected with the negative pole of the 410 th capacitor C410, the positive pole of the 410 th capacitor C410 is connected with the non-inverting input end of the 42 th operational amplifier A42, and the non-inverting input end of the 42 th operational amplifier A42 is also grounded through the 410 th resistor R410; the inverting input end of the 42 th operational amplifier A42 is connected with the output end of the 42 th operational amplifier A42 through a 411 th capacitor C411; one end of the 411 th resistor R411 is connected with the inverted input end of the 42 th operational amplifier A42, the other end of the 411 th resistor R411 is divided into two paths, one path is grounded through the 413 th resistor R413, and the other path is connected with the output end of the 42 th operational amplifier A42 through the 412 th resistor R412; the 49 th to 410 th capacitors C49 to C410 are polar coupling capacitors, and are required to have large capacity and small leakage current; the 411 th capacitor C411 is a nonpolar capacitor and is used for smoothing an impedance change waveform diagram; the amplification factor of the 42 th operational amplifier A42 can be changed by adjusting the ratio of the 412 th resistor R412 to the 413 th resistor R413;

the impedance final stage amplifier comprises a43 rd operational amplifier A43, a 415 th capacitor C415 and 417 nd 420 resistors R417-R420, wherein the inverting input end of the 43 th operational amplifier A43 is connected with the output end thereof through the 415 th capacitor C415; one end of a 417 resistor R417 is connected with the inverting input end of the 43 rd operational amplifier A43, the other end of the 417 resistor R417 is divided into two paths, one path is grounded through a 419 resistor R419 and a 420 resistor R420, and the other path is connected with the output end of the 43 th operational amplifier A43 through a 418 resistor R418; the output end of the 43 rd operational amplifier A43 is connected with the input end of the 42 th potentiometer W42; the ground terminal of the 42 th potentiometer W42 is grounded, and the output terminal thereof obtains Delta Z_sThe circuit is divided into two paths, wherein one path is sent to the A/D card, and the other path is connected with a difference value calculating circuit; the 415 th capacitor C415 is a nonpolar capacitor and is used for smoothing an impedance change waveform diagram, and the amplification factor of the 43 th operational amplifier A43 can be changed by adjusting the ratio of the 418 th resistor R418 to the 420 th resistor R420; the output signal of the 43 rd operational amplifier A43 is divided into two paths for output after being subjected to voltage division correction by a potentiometer W42, one path is sent to an A/D card for collection, and the other path is sent to the difference calculation of the figure 6An electrical circuit.

From the above analysis and fig. 4, it can be seen that the human body input signal between the electrocardiograph detection electrodes E-E' is sent to the high-frequency filter circuit (resistor R41-R44 and capacitor C43-C44) through the neck impedance input lead wire, the chest impedance input lead wire and the coupling capacitors C41, C42, after the high-frequency interference is filtered out, the input operational amplifier a41 amplifies, and the output signal is output in two paths. One path is coupled by a capacitor C45 and is transmitted to a basic impedance peak detection circuit (detection diodes D41, D42, a capacitor C48 and a resistor R49) for detection, and the basic impedance Z is obtained₄₀The direct current voltage in direct proportion is subjected to voltage division correction by a potentiometer W42, and the output voltage UT is sent to an A/D card for collection. The other path of the output signal of the operational amplifier A41 is coupled with a resistor R46 through a capacitor C46, and is sent to an analog multiplier synchronous detection circuit (an analog multiplier chip MC41, resistors R46-R48 and a capacitor C47) for detection, so that an ultralow frequency voltage signal which is in direct proportion to the impedance change delta Z is obtained. The signal is coupled by a capacitor C49-C410 and a resistor R410, is amplified by an operational amplifier A42, and an output signal of the signal is sent to an impedance 50Hz active trap circuit (the resistor R414-R416 and the capacitor C412-C414) to suppress the interference of 50Hz mains supply. Then, the signal is sent to an operational amplifier A43 for amplification, and the output signal is sent to an A/D card for collection after being subjected to voltage division correction by a potentiometer W41;

dividing the four paths of completely identical impedance synchronous detection circuits into two groups, wherein the two paths of impedance synchronous detection circuits in each group are connected with a path of difference value calculation circuit, and obtaining four basic impedances Z_0s1、Z_0s2、Z_0s3、Z_0s4And four fundamental impedance variation amplitudes Δ Z_s1、ΔZ_s2、ΔZ_s3、ΔZ_s4Sending the difference value to the corresponding difference value calculation circuit;

as shown in fig. 6, the two paths of difference calculating circuits have the same structure and performance, and each of the two paths of difference calculating circuits includes two paths of adders, each of which includes an adding operational amplifier, an inverter and a61 st potentiometer W61, wherein the adding operational amplifier includes 61 st, 62 nd, 63 th and 64 th resistors R61, R62, R63, R64 and a61 st operational amplifier a 61; two ends of the 63 rd resistor R63 are respectively connected with the output end and the inverting input end of the 61 st operational amplifier A61; one end of the 64 th resistor R64 is grounded, and the other end of the 64 th resistor R64 is connected with the non-inverting input end of the 61 st operational amplifier A61; the A input end of the difference value calculation circuit is connected with the inverting input end of a61 st operational amplifier A61 through a61 st resistor R61; the B input end of the difference value calculation circuit is connected with the inverting input end of a62 nd operational amplifier A62 through a62 nd resistor R62; the resistance values of the 61 st resistor R61 and the 62 nd resistor R62 are equal, the resistance value of the 63 st resistor R63 is one half of that of the 61 st resistor R61, and the 64 th resistor R64 is a balance resistor at the same phase end of the 61 st operational amplifier A61; since the output signal of the 61 st operational amplifier A61 is opposite in phase to its input signal, an inverter is added, which comprises 65 th, 66 th and 67 th resistors R65, R66, R67 and 62 th operational amplifier A62; two ends of the 67 th resistor R67 are respectively connected with the output end and the inverting input end of the 62 th operational amplifier A62; one end of the 65 th resistor R65 is connected with the output end of the 61 st operational amplifier A61 of the addition operational amplifier, and the other end thereof is connected with the inverting input end of the 62 th operational amplifier A62; one end of the 66 th resistor R66 is grounded, and the other end of the 66 th resistor R66 is connected with the non-inverting input end of the 62 nd operational amplifier A62; the grounding end of the 61 st potentiometer W61 is grounded, the input end of the 61 st potentiometer W61 is connected with the output end of the 62 nd operational amplifier A62 of the inverter, and the output end of the 61 st potentiometer W61 is transmitted to an A/D card for collection;

the voltage amplification factor of the difference calculation circuit is determined by the ratio of R67/R65, and the amplification factor of the 62 nd operational amplifier A62 is about 1.5 in order to facilitate the correction of the 61 st potentiometer W61;

as can be seen from fig. 2, 4 and 6, the corrected impedance change signals Δ Z output from the first and second impedance synchronous detection circuits (or the third and fourth impedance synchronous detection circuits), respectively_s1、ΔZ_s2(or. DELTA.Z_s3、ΔZ_s4Or Z_0s1、Z_0s2Or Z_0s3、Z_0s4) Through A, B both endsThe output signal of the operational amplifier A1 is subjected to phase inversion amplification by the operational amplifier A2 to obtain delta Z_s1、ΔZ_s2(or. DELTA.Z_s3、ΔZ_s4Or Z_0s1、Z_0sOr Z_0s3、Z_0s4) Average value of (a) < delta > Z_s12(or. DELTA.Z_s34Or Z_0s12Or Z_0s34) After the voltage is divided and corrected by a61 st potentiometer W61, the signal is sent to an A/D card for collection.

The basic impedance temperature correction circuit outputs correction output voltage changing along with temperature and sends the correction output voltage to an A/D card for collection;

as shown in fig. 5, the basic impedance temperature correction circuit includes a 51 st resistor R51, 51 st, 52 nd, 53 th, 54 th, 55 th detection diodes D51, D52 th, D53 th, D54 th, D55 th, a 51 st capacitor C51 th, and a 51 st potentiometer W51, one end of the 51 st resistor R51 is connected to an input terminal, the input terminal is connected to the positive voltage + V2 output from the dc isolation regulator power supply module, the other end of the input terminal is divided into two paths, one path is connected to the input terminal of the 51 st potentiometer W51, the other path is connected to the positive electrode of the 51 st detection diode D51, the 51 st, 52 th, 53 th, 54 th, 55 th detection diodes D51, D52 th, D53, D54 th, and D55 are sequentially connected in the order of connecting the negative electrodes, and the negative electrode of the 55 th detection diode D55 is grounded; the input end of the 51 st potentiometer W51 is also grounded through a 51 st capacitor C51, the ground end is grounded, and the output end is sent to an A/D card for collection;

experiments show that the impedance synchronous detection circuit (41-42 detection diodes D41-D42, 48 th capacitor C48 and 49 th resistor R49 in FIG. 4) can cause the difference basic impedance Z_0sThe measured value of (1-3%) is reduced with temperature, so that said instrument is designed with a basic impedance temperature correction circuit as shown in fig. 5, it is formed from 51-th resistor R51, 51-55 th diodes D51-D55, 51-th capacitor C51 and 51-th potentiometer W51, and the model numbers of 51-55 th diodes D51-D55 are identical to those of 41-42 th detection diodes D41-D42 in fig. 4, and the correction output voltage UT of said circuit can be collected by A/D card, and the correction process can be implemented by computer.

the electrocardio detection circuit comprises an electrocardio preamplifier, an electrocardio intermediate amplifier, an electrocardio 50Hz active trap circuit, an electrocardio final amplifier, a71 th potentiometer W71, two electrocardio lead wires and three electrocardio detection electrodes;

71 th, 72 th electric capacity C71, C72 are nonpolarity electric capacity for filtering extraneous high frequency interference. The 71 th operational amplifier A71 is designed by using an instrument operational amplifier and is characterized by few configuration elements, high input impedance, low noise, high common mode rejection ratio and low power consumption. The amplification factor of A71 can be changed by adjusting the 75 th resistor R75;

the 73 rd and 74 th capacitors C73 and C74 are polar coupling capacitors, and are required to have large capacity and small leakage. By adjusting the ratio of the 78 th resistor R78 to the 79 th resistor R79, the amplification of the 72 th operational amplifier A72 can be changed.

Preferably, a 75 th capacitor C75 is further provided, and two ends of the 75 th capacitor C75 are respectively connected with the inverting input end and the output end of the 72 th operational amplifier A72; the 75 th capacitor C75 is a non-polar capacitor for smoothing the electrocardiographic waveform.

the amplification factor of the 3 rd operational amplifier A3 can be changed by adjusting the ratio of the resistor R14 to the resistor R16;

as an optimization, a 79 th capacitor C79 is also provided, and the 9 th capacitor C9 is a nonpolar capacitor and is used for smoothing an electrocardiogram waveform;

the output end of the 73 th operational amplifier A73 is connected with the input end of the 71 th potentiometer W71, the ground end of the 71 th potentiometer W71 is grounded, and the output end of the 71 th potentiometer W71 is sent to an A/D card for collection; the third electrocardiogram detection electrode is grounded;

as can be seen from fig. 7, the weak electrocardiographic signals between the first electrocardiographic detection electrode and the second electrocardiographic detection electrode are respectively input to the electrocardiograph preamplifier through the first electrocardiographic lead and the second electrocardiographic lead, high-frequency interference is filtered through an input filter circuit of the electrocardiograph preamplifier, then the weak electrocardiographic signals are sent to the 71 th operational amplifier A71 for amplification, output signals of the 71 th operational amplifier A71 are coupled through an intermediate amplifier, the 72 th operational amplifier A72 for amplification, then the 50Hz mains supply interference is inhibited through an electrocardiograph 50Hz active trap circuit, then the 73 th operational amplifier A73 for amplification, and the output signals are subjected to voltage division correction through the 71 th potentiometer W71 and then are sent to the A/D card for collection.

the heart sound measuring circuit comprises a piezoelectric heart sound sensor, a two-stage resistance-capacitance coupled amplifier and an 81 st potentiometer W81,

the piezoelectric heart sound sensor converts mechanical vibration signals of a heart into heart sound electric signals, and is high in sensitivity, low in noise, internally provided with an amplifier, low in output impedance and low in power consumption;

the output end of the 82 nd operational amplifier A82 is connected with the input end of the 81 th potentiometer W81, the grounding end of the 81 th potentiometer W81 is grounded, and the output end of the 81 th potentiometer W81 is sent to an A/D card for collection;

as shown in fig. 8, the utility model discloses a high-grade piezoelectric heart sound sensor of performance, sensitivity is high, and the signal-to-noise ratio is high, and anti-interference ability is strong, and output impedance is little, and the heart sound signal of piezoelectric heart sound sensor itself output is bigger, so the heart sound amplifier that matches with piezoelectric heart sound sensor has only adopted general resistance-capacitance coupling amplifier circuit, in first order resistance-capacitance coupling amplifier, through adjusting the ratio of 83 rd resistance R83 and 84 th resistance R84, can change the magnification of 81 th operational amplifier A81; in the second stage of the resistance-capacitance coupled amplifier, the amplification factor of an 82 nd operational amplifier A82 can be changed by adjusting the ratio of an 87 th resistor R87 to an 88 th resistor R88; the 81 th to 83 th capacitors C81 to C83 are all nonpolar capacitors, the 81 th and 83 th capacitors C81 and C83 are used for coupling heart sound signals, and the 82 th capacitor C82 is used for filtering signals with overhigh frequency. From the above analysis, the electrical signal of the heart sound converted and output by the piezoelectric heart sound sensor is coupled by the 81 st capacitor C81 and the 81 st resistor R81, and then sent to the first-stage 81 st operational amplifier a81 for amplification, the output signal is coupled by the 83 st capacitor C83 and the 85 th resistor R85, and then sent to the second-stage 82 nd operational amplifier a82 for amplification, and the output voltage heart sound signal is subjected to voltage division correction by the 81 st potentiometer W81, and then sent to the a/D card for collection.

the A/D card receives an ECG signal and four paths of completely same four basic impedances Z acquired by the impedance synchronous detection circuit_0s1、Z_0s2、Z_0s3、Z_0s4And the amplitude of change Δ Z of the fundamental impedance_s1、ΔZ_s2、ΔZ_s3、ΔZ_s4Two difference basic impedances Z acquired by signal and two paths of completely same difference calculation circuits_0s12、Z_0s34Sum-difference base impedance variation amplitude Δ Z_s12、ΔZ_s34And the signal and the heart sound signal PCG are sent to an upper computer, the upper computer is a computer in the existing equipment, and a sixteen-bit optical isolation acquisition card is adopted as an A/D card.

Each detection circuit is powered by a direct current isolation voltage-stabilized power supply component, and according to the characteristics and the requirements of different measurement circuits, the utility model designs two groups of direct current isolation power supplies;

as shown in fig. 9, the 1 st dc isolated power supply comprises a dc isolated power supply component IC91, 91 st to 96 th capacitors C91-C96 and 93 nd to 94 th integrated regulator chips IC93-IC94, the input terminal of the dc isolated power supply component IC91 is connected to the output terminal + Vi of the computer switching power supply, the ground input terminal is grounded, the output positive voltage terminal outputs + V0 voltage, the output positive voltage terminal is divided into three paths, the first path is grounded through a 91 th capacitor C91, the second path is grounded through a 92 th capacitor C92, and the third path is connected to the input terminal of a 93 th integrated regulator chip IC 93; the output common terminal of the DC isolation power supply component IC91 is grounded; the output negative voltage end of the direct current isolation power supply module IC91 outputs-V0 voltage, the output negative voltage end is divided into three paths, the first path is grounded through a 93-th capacitor C93, the second path is grounded through a 94-th capacitor C94, and the third path is connected with the input end of a 94-th integrated voltage stabilizing chip IC 94; the common end of the 93 th and 94 th integrated voltage stabilization chips IC93-IC94 is grounded after being shorted; the output end of the 93 th integrated voltage-stabilizing chip IC93 is divided into two paths, one path is grounded through a 95 th capacitor C95, and the other path outputs positive voltage + V1; the output end of the 94 th integrated voltage-stabilizing chip IC94 is divided into two paths, one path is grounded through a 96 th capacitor C96, and the other path outputs negative voltage-V1;

the 91-94 capacitors C91-C96 are used for power supply filtering, and the 95-96 capacitors C95-C96 are used for eliminating self excitation which may occur; the input voltage + Vi of the DC isolation power supply assembly IC91 is the output voltage of the computer switching power supply, the output positive voltage is + V0, the output negative voltage is-V0, the positive voltage + V1 and the negative voltage-V1 are obtained after the voltage of the positive voltage + V and the negative voltage-V0 are stabilized by a 93-94 three-terminal voltage stabilizer IC93-IC94 respectively, and the power supply voltage is provided for the high-frequency constant current source circuit in the figure 3; the 91 st capacitor C91 and the 93 th capacitor C93 are polar capacitors, and the 92 th, 94 th, 95 th and 96 th capacitors C92, C94, C95 and C96 are nonpolar capacitors.

As shown in fig. 10, the 2 nd dc isolation power supply includes a dc isolation power supply component IC102 and a 101 st and 104 th capacitors C101-104, an input terminal of the dc isolation power supply component IC102 is connected to + Vi of an output terminal of the computer switching power supply, a ground input terminal is grounded, a positive voltage terminal thereof outputs + V2 voltage, the positive voltage terminal is divided into three paths, a first path is connected to an anode of the 101 th capacitor C101, a cathode of the 101 th capacitor C101 is grounded, a second path is grounded through the 102 th capacitor C102, and a third path outputs a positive voltage; the output common end of the DC isolation power supply component IC102 is grounded; the output negative voltage end of the direct current isolation power supply component IC102 outputs-V2 voltage, the output negative voltage end is divided into three paths, the first path is connected with the negative electrode of a 103 th capacitor C101, the positive electrode of the 103 th capacitor C103 is grounded, the second path is grounded through a 104 th capacitor C104, and the third path outputs negative voltage; the 101 th capacitor C101 and the 103 th capacitor C103 are polar capacitors, the 102 th capacitor C102 and the 104 th capacitor C104 are nonpolar capacitors, the 101 th capacitor C101 is connected with the 102 th capacitor C102 in parallel, and the 103 th capacitor C103 is connected with the 104 th capacitor C104 in parallel, and the capacitors are used for power supply filtering; the input voltage + Vi of the dc isolation power supply module IC102 is the output voltage of the computer switching power supply, the positive voltage output by the dc isolation power supply module IC102 is + V2, and the negative voltage is-V2, which provides the power supply voltage for the measurement circuits in fig. 4, 5, 6, 7, and 8.

The utility model discloses each detection circuitry is kept apart steady voltage power supply module by the direct current and is supplied power, and the AD card adopts the AD card of high-grade. Therefore, the detection circuits of electrocardio, heart sound, impedance and the like connected with the human body are not grounded with the computer, so that the safety of the measurement of the human body can be ensured, and the anti-interference performance of each detection circuit can be improved.

In the patent of ZL200710028378.2 'digital reconstruction type cardiac output instrument', the applicant establishes a thoracic impedance equation set consisting of six equations, wherein constant terms of the equations are six thoracic body surface mixed impedance signals synchronously measured in a six-lead mode, in order to separate five impedance change components of AO, PL, PR, LV and RV from thoracic body surface mixed impedance changes. However, the utility model discloses in adopted four to lead the measuring method, only detected four ways chest body surface mixed impedance signal in step, lacked two tunnel. In order to be compatible with an interface circuit, measurement software and the like of the original six-lead mode, two paths of mixed impedance signals are also needed. Therefore, the patent designs two paths of difference calculating circuits (see figure 2) by referring to a difference method for X-CT image reconstruction. Wherein the output signal Δ Z of a two-difference calculation circuit_s12Is Δ Z_s1And Δ Z_s2Average value of, output signal Z_0s12Is Z_0s1And Z_0s2Average value of (d); output signal delta Z of three-four difference value calculating circuit_s34Is Δ Z_s3And Δ Z_s4Average value of (2), Z_0s34Is Z_0s3And Z_0s4Average value of (a). To demonstrate the feasibility of the difference method, we compared the cardiac index of 120 subjects using six leads and four leads, and the correlation coefficient was 0.93 (P)<0.001). This shows that the measurement results of the two are highly correlated, and the four-lead measurement mode of the patent can replace the original six-lead measurement mode.

The utility model discloses a four lead mode synchronous detection four ways chest body surface mixed impedance changes. By data conversion and waveform reconstruction of the difference calculation circuit, impedance change components of the Aorta (AO), the left pulmonary blood vessel (PL), the right pulmonary blood vessel (PR), the Left Ventricle (LV) and the Right Ventricle (RV) are separated from the mixed impedance change of the surface of the chest. And then differential maps of AO, PL, PR, LV and RV components can be obtained respectively through software differential processing. The computer automatically measures related waveform parameters, and calculates, displays and prints 20 cardiac function parameters such as cardiac output, ejection fraction, cardiac contractility index, aortic compliance, cardiac efficiency, intra-cardiac work and total work, myocardial oxygen consumption, total peripheral resistance, left ventricular diastolic non-pressure, etc. of the left ventricle.

The utility model provides a present a great deal of problem that exists in the heart function measuring apparatu of impedance:

1. design idea of instrument

In order to solve the problems of the digital reconstruction type cardiac output instrument in practical application, the instrument adopts a four-lead detection mode formed by 10 electrodes to synchronously measure four paths of chest body surface mixed impedance signals, substitutes a chest impedance equation set formed by six equations after being processed by a difference value calculation circuit, and solves point by an algebraic reconstruction technology to separate impedance change components of AO, PL, PR, LV and RV. After software differentiation, differential maps of corresponding components can be obtained respectively. Then, the computer automatically measures the related wave amplitude and time interval of the aorta impedance differential oscillogram, and calculates twenty cardiac function indexes of the left ventricle, such as cardiac output, ejection fraction, cardiac contractility index, cardiac efficiency, intracardiac function and total function, myocardial oxygen consumption, total peripheral resistance, left ventricular diastolic non-pressure and the like according to the related formula for determining the left ventricular cardiac function by the reconstructed cardiac impedance map. The instrument can automatically judge the normality or abnormality of the measurement result, can also judge the mild, moderate and severe grades of the abnormal measurement data, and provides objective basis for the diagnosis of the patient's condition by a clinician.

2. Method for placing impedance electrocardio detection electrode

The instrument adopts a four-lead mode consisting of 10 electrodes to synchronously measure four paths of chest body surface mixed impedance changes (delta Z)_s1、△Z_s2、△Z_s3、△Z_s4) And a base impedance (Z)_0s1、Z_0s2、Z_0s3、Z_0s4) The lead-based electrode placement method is shown in fig. 1. High-frequency current I with constant effective value₀Through 2 current electrodes I₁、I₂Is delivered into the chest of a human body, wherein I₁Is a semi-annular electrode with the size of 2cm multiplied by 35cm and is positioned at the forehead; i is₂Is a ring electrode with the size of 2cm multiplied by 90cm and is 5-7cm away from the lower edge level of the chest xiphoid process. 8 voltage electrocardio detection electrodes E₁、E₂、E₃、E₄、E₁′、E₂′、E₃′、E₄The' all are Ag/AgCl disposable electrodes, the conductive disc size is phi 15mm, the neck voltage electrocardio detection electrode E₁、E₂、E₃、E₄Chest voltage electrocardio detection electrode E at neck root₁′、E₂′、E₃′、E₄' is located at the same level as the lower edge of the xiphoid process. Four pairs of voltage electrocardio detection electrodes E₁-E₁′、E₂-E₂′、E₃-E₃′、E₄-E₄' are respectively placed at the symmetrical positions of 45 degrees, 135 degrees, 225 degrees and 315 degrees (the lower edge of the chest body surface xiphoid process is 0 degree, and the angle is calculated according to the left-handed direction).

Compared with the six-lead measurement mode of the Chinese patent ZL200710028378.2 named as a digital reconstruction type cardiac output measuring instrument, the four-lead cardiac output measuring instrument synchronously measures chest body surface mixed impedance signals in a four-lead mode, two pairs of electrocardio detection electrodes at the left and right axillary middle lines (namely the 90-degree and 270-degree positions in figure 1) in the original six-lead mode are eliminated, and a current electrode I₂The lower leg is moved to the abdomen, the original two square sheet electrodes are replaced by one annular electrode, and the total number of the electrodes is reduced from the original 15 to 10.

Claims

1. A four-lead impedance waveform reconstruction heart function instrument comprises a high-frequency constant current source circuit, four paths of completely same impedance synchronous detection circuits, two paths of completely same difference calculation circuits, an electrocardio detection circuit, a heart sound detection circuit, a piezoelectric heart sound sensor, an electrocardio detection electrode, a constant current output lead wire, an impedance input lead wire, an A/D card and a direct current isolation voltage stabilization power supply component,

each path of impedance synchronous detection circuit is connected with two impedance input lead wires, two impedance input leadsThe connecting line is divided into a neck impedance input connecting line and a chest impedance input connecting line, and four paths of completely same impedance synchronous detection circuits respectively obtain four basic impedances Z between the neck and the chest_0s1、Z_0s2、Z_0s3、Z_0s4And four fundamental impedance variation amplitudes Δ Z_s1、ΔZ_s2、ΔZ_s3、ΔZ_s4And sending the data to an A/D card for collection;

2. The four-lead impedance waveform reconstruction cardiac function device of claim 1, wherein the high frequency constant current source circuit comprises a crystal oscillator, a square wave-trapezoidal wave conversion circuit and a constant current output circuit;

3. The four-lead impedance waveform reconstruction cardiac function device of claim 1 or 2, wherein four of said impedance synchronous detection circuits are identical in structure and performance, and comprise an impedance preamplifier, a multiply synchronous detection circuit, a fundamental impedance peak detection circuit, an impedance intermediate amplifier, an impedance 50Hz active trap circuit, and an impedance final amplifier;

the basic impedance peak detection circuit comprises 41-42 detection diodes D41-D42, a 48 th capacitor C48 and a 49 th resistor R49; the output end of the 41 st operational amplifier A41 is connected with one end of a 45 th capacitor C45, the other end of the 45 th capacitor C45 is divided into two paths, one path is connected with the cathode of a42 th detection diode D42, and the other path is connected with the anode of a41 th detection diode D41; the anode of the 42 th detection diode D42 is grounded, the cathode of the 41 th detection diode D41 is divided into two paths, one path is grounded through a 48 th capacitor C48, and the other path is connected with the input end of the 41 th potentiometer W41 through a 49 th resistor R49; the grounding end of the 41 th potentiometer W41 is grounded, and the output end thereof obtains Z_0sThe circuit is divided into two paths, wherein one path is sent to the A/D card, and the other path is connected with a difference value calculating circuit;

the impedance final stage amplifier comprises a43 rd operational amplifier A43, a 415 th capacitor C415 and 417 nd 420 resistors R417-R420, wherein the inverting input end of the 43 th operational amplifier A43 is connected with the output end thereof through the 415 th capacitor C415; one end of a 417 resistor R417 is connected with the inverting input end of the 43 rd operational amplifier A43, the other end of the 417 resistor R417 is divided into two paths, one path is grounded through a 419 resistor R419 and a 420 resistor R420, and the other path is connected with the output end of the 43 th operational amplifier A43 through a 418 resistor R418; the output end of the 43 th operational amplifier A43 is connected with the 42 th potentiometerAn input terminal of W42; the ground terminal of the 42 th potentiometer W42 is grounded, and the output terminal thereof obtains Delta Z_sAnd is divided into two paths, wherein one path is sent to the A/D card, and the other path is connected with a difference value calculating circuit.

4. The four-lead impedance waveform reconstruction cardiac function instrument according to claim 1 or 2, wherein one end of the head constant current output lead is connected to the high frequency constant current source circuit, and the other end thereof is connected to a semi-annular electrode, having a size of 2cm x 35cm, and located at the forehead; one end of the abdomen constant current output lead wire is connected with the high-frequency constant current source circuit, the other end of the abdomen constant current output lead wire is connected with the annular electrode, the size of the abdomen constant current output lead wire is 2cm multiplied by 90cm, and the abdomen constant current output lead wire is 5-7cm away from the lower edge of the chest xiphoid process.

5. The four-lead impedance waveform reconstruction cardiac function device according to claim 1 or 2, wherein the neck impedance input lead has one end connected to the impedance synchronous detection circuit and the other end connected to a neck impedance voltage detection electrode E₁、E₂、E₃、E₄(ii) a One end of the thoracic impedance input lead wire is connected with the impedance synchronous detection circuit, and the other end is connected with a thoracic impedance voltage detection electrode E₁′、E₂′、E₃′、E₄'; the neck impedance voltage detection electrode E₁、E₂、E₃、E₄At the root of the neck, the thoracic impedance voltage detection electrode E₁′、E₂′、E₃′、E₄' the lower edge of the xiphoid process is at the same level; four pairs of impedance voltage detection electrodes E₁-E₁′、E₂-E₂′、E₃-E₃′、E₄-E₄' the chest is respectively placed at the symmetrical positions of 45 degrees, 135 degrees, 225 degrees and 315 degrees, the lower edge of the chest body surface xiphoid process is 0 degree, and the angle is calculated according to the left-handed direction.

6. The four-lead impedance waveform reconstruction cardiac function device of claim 5 wherein the neck impedance voltage sensing electrode E₁、E₂、E₃、E₄And a thoracic impedance voltage detecting electrode E₁′、E₂′、E₃′、E₄' both were Ag/AgCl disposable electrodes with a conductive disc size of 15 mm.

7. The four-lead impedance waveform reconstruction cardiac function device of claim 5 further comprising neck four-lead impedance detection electrode strips and chest four-lead impedance detection electrode strips; the neck four-lead impedance detection electrode band is an adhesive band with the width of 3cm, and the neck impedance voltage detection electrode E₁、E₂、E₃、E₄The neck four-lead impedance detection electrode belts are fixed on the neck at equal intervals; the chest four-lead impedance detection electrode band is an adhesive band with the width of 4cm, and the chest impedance voltage detection electrode E₁′、E₂′、E₃′、E₄' fixing on the chest four-lead impedance detection electrode belt at equal intervals; and the middle parts of the neck four-lead impedance detection electrode belt and the chest four-lead impedance detection electrode belt are respectively provided with a positioning mark.

8. The four-lead impedance waveform reconstruction cardiac function device of claim 7 wherein said cervical four-lead impedance sensing electrodes have four length specifications of 30cm, 34cm, 38cm, 42 cm; the chest four-lead impedance detection electrode has four length specifications of 70cm, 80cm, 90cm and 100 cm.

9. The four-lead impedance waveform reconstruction cardiac function instrument of claim 1 or 2, wherein the two paths of said difference calculating circuits are identical in structure and performance and each comprise a summing operational amplifier and an inverting circuit, each of said difference calculating circuits comprises two paths of adders, said adders comprising a summing operational amplifier, an inverter and a61 st potentiometer W61, wherein said summing operational amplifier comprises 61 st, 62 st, 63 st, 64 th resistors R61, R62, R63, R64 and a61 st operational amplifier a 61; two ends of the 63 rd resistor R63 are respectively connected with the output end and the inverting input end of the 61 st operational amplifier A61; one end of the 64 th resistor R64 is grounded, and the other end of the 64 th resistor R64 is connected with the non-inverting input end of the 61 st operational amplifier A61; the A input end of the difference value calculation circuit is connected with the inverting input end of a61 st operational amplifier A61 through a61 st resistor R61; the B input end of the difference value calculation circuit is connected with the inverting input end of a62 nd operational amplifier A62 through a62 nd resistor R62; the resistance values of the 61 st resistor R61 and the 62 nd resistor R62 are equal, the resistance value of the 63 st resistor R63 is one half of that of the 61 st resistor R61, and the 64 th resistor R64 is a balance resistor at the same phase end of the 61 st operational amplifier A61; the inverter comprises 65 th, 66 th and 67 th resistors R65, R66, R67 and 62 th operational amplifier A62; two ends of the 67 th resistor R67 are respectively connected with the output end and the inverting input end of the 62 th operational amplifier A62; one end of the 65 th resistor R65 is connected with the output end of the 61 st operational amplifier A61 of the addition operational amplifier, and the other end thereof is connected with the inverting input end of the 62 th operational amplifier A62; one end of the 66 th resistor R66 is grounded, and the other end of the 66 th resistor R66 is connected with the non-inverting input end of the 62 nd operational amplifier A62; the grounding end of the 61 st potentiometer W61 is grounded, the input end of the 61 st potentiometer W61 is connected with the output end of the 62 nd operational amplifier A62 of the inverter, and the output end of the 61 st potentiometer W61 is transmitted to an A/D card for collection.

10. The four-lead impedance waveform reconstruction cardiac function instrument according to claim 1 or 2, wherein the electrocardiograph detection circuit comprises an electrocardiograph preamplifier, an electrocardiograph intermediate amplifier, an electrocardiograph 50Hz active trap circuit, an electrocardiograph final amplifier, a71 th potentiometer W71, two electrocardiograph lead wires and three electrocardiograph detection electrodes;

11. The four-lead impedance waveform reconstruction cardiac function device of claim 1 or 2, wherein the dc isolated regulated power supply assembly comprises two dc isolated power supplies;

the 1 st direct current isolation power supply comprises a direct current isolation power supply component IC91, 91 st to 96 th capacitors C91 to C96 and 93 nd to 94 th integrated voltage regulation chips IC93 to IC94, wherein the input end of the direct current isolation power supply component IC91 is connected with the output end + Vi of the computer switching power supply, the grounding input end is grounded, the positive voltage output end outputs + V0 voltage, the positive voltage output end is divided into three paths, the first path is grounded through a 91 th capacitor C91, the second path is grounded through a 92 th capacitor C92, and the third path is connected with the input end of a 93 th integrated voltage regulation chip IC 93; the output common terminal of the DC isolation power supply component IC91 is grounded; the output negative voltage end of the direct current isolation power supply module IC91 outputs-V0 voltage, the output negative voltage end is divided into three paths, the first path is grounded through a 93-th capacitor C93, the second path is grounded through a 94-th capacitor C94, and the third path is connected with the input end of a 94-th integrated voltage stabilizing chip IC 94; the common end of the 93 th and 94 th integrated voltage-stabilizing chips IC93-IC94 is grounded after being short-circuited; the output end of the 93 th integrated voltage-stabilizing chip IC93 is divided into two paths, one path is grounded through a 95 th capacitor C95, and the other path outputs positive voltage + V1; the output end of the 94 th integrated voltage-stabilizing chip IC94 is divided into two paths, one path is grounded through a 96 th capacitor C96, and the other path outputs negative voltage-V1;