CN213817282U - Battery management system and battery pack - Google Patents

Battery management system and battery pack Download PDF

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Publication number
CN213817282U
CN213817282U CN202022575422.5U CN202022575422U CN213817282U CN 213817282 U CN213817282 U CN 213817282U CN 202022575422 U CN202022575422 U CN 202022575422U CN 213817282 U CN213817282 U CN 213817282U
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chip
analog
pin
control unit
battery
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李保安
庄宪
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Globe Jiangsu Co Ltd
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Globe Jiangsu Co Ltd
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Abstract

The utility model provides a battery management system and battery package, battery management system, include: the analog front-end chips are used for acquiring the output voltage, the output current or the working temperature of the battery; the control unit controls the analog front-end chip to be powered on and powered off; when any analog front-end chip is awakened by an external interference signal, the analog front-end chip directly or indirectly supplies power to the control unit so as to enable the control unit to work, and at the moment, the control unit sends a power-down signal to the analog front-end chip so as to enable the analog front-end chip to be powered down. Compared with the prior art, the battery management system can send the power-off signal to the analog front-end chip awakened by the external interference signal in time, so that the analog front-end chip awakened by the external interference signal can be normally powered off, and the problem that the battery cell is overdischarged due to the fact that the analog front-end chip awakened by the external interference signal cannot be powered off is avoided.

Description

Battery management system and battery pack
Technical Field
The utility model relates to a battery management system and have this battery management system's battery package.
Background
With the progress of society, portable electric tools are more and more widely used in our lives, and battery technology as a power source thereof is also continuously developed. The demand for secondary batteries is increasing from the viewpoint of environmental protection and repetitive use, and lithium batteries are ideal for portable power tools due to their unique advantages, such as high energy density, long service life, high discharge voltage, no memory effect, etc. To meet the voltage and capacity requirements of portable power tools, lithium batteries may be used to supply power.
In order to prolong the service life of the lithium battery pack and improve the reliability of the use of the lithium battery pack, it is necessary to manage the battery using a Battery Management System (BMS). The battery management system generally uses an analog front end chip (AFE) to sample the battery to obtain information such as output voltage, output current, and operating temperature of the battery. When the number of the battery cells is large, a plurality of analog front-end chips are generally cascaded, so that the sampling of a plurality of battery cells is completed. The power-on of the analog front-end chip is awakened through a TS pin hardware signal, and the power-off of the analog front-end chip is completed by a control unit (MCU) sending a power-off instruction through an I2C chip. When the battery is in the environment with serious interference, the high-string analog front-end chip can be abnormally awakened, and the control unit is in the non-working state at the moment, so that the analog front-end chip cannot be powered off, the over-discharge problem of the high-string electric core is caused, and even the whole battery pack can be scrapped.
In view of the above problems, there is a need to provide a new battery management system to solve the above problems.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a battery management system, this battery management system can in time send down the signal of telecommunication to the analog front end chip awaken up by external interference signal to make the analog front end chip awaken up by external interference signal can normally descend the electricity, avoid causing the electricity core to appear the overdischarge problem because of the analog front end chip that awakens up by external interference signal can not descend the electricity.
In order to achieve the above object, the present invention provides a battery management system, including: the analog front-end chips are used for acquiring the output voltage, the output current or the working temperature of the battery; the control unit controls the analog front-end chip to be powered on and powered off; when any analog front-end chip is awakened by an external interference signal, the analog front-end chip directly or indirectly supplies power to the control unit so as to enable the control unit to work, and at the moment, the control unit sends a power-down signal to the analog front-end chip so as to enable the analog front-end chip to be powered down.
As a further improvement of the present invention, the at least two analog front end chips include a primary analog front end chip and at least one advanced analog front end chip; when the advanced analog front-end chip is awakened by an external interference signal, the advanced analog front-end chip directly or indirectly sends an awakening signal to the primary analog front-end chip to awaken the primary analog front-end chip, and then the primary analog front-end chip supplies power to the control unit to enable the control unit to work; at this time, the control unit sends a power-down signal to the primary analog front-end chip and the advanced analog front-end chip, so that the primary analog front-end chip and the advanced analog front-end chip are powered down.
As a further improvement of the present invention, the control unit has a communication pin; the analog front-end chip is provided with a TS pin connected with the communication pin; and the control unit sends a wake-up signal to the TS pin through the communication pin so as to wake up the analog front-end chip.
As a further improvement of the present invention, the battery management system includes a coupling wake-up circuit, the analog front-end chip has a 3V3 pin and a TS pin, and the control unit has a VCC pin; the 3V3 pin of the primary analog front end chip is connected to the VCC pin of the control unit, and the 3V3 pin of the advanced analog front end chip is connected to the TS pin of the primary analog front end chip through the coupling wake-up circuit.
As a further improvement of the present invention, the analog front-end chip further includes a GND pin, and the coupling wake-up circuit includes a first resistor, a second resistor, a first capacitor, and a second capacitor; two ends of the first resistor are respectively connected to a 3V3 pin and a GND pin of the advanced analog front-end chip; two ends of the second resistor are respectively connected to a TS pin and a GND pin of the primary analog front-end chip; two ends of the first capacitor are respectively connected to a TS pin of the primary analog front-end chip and a 3V3 pin of the advanced analog front-end chip; and two ends of the second capacitor are respectively connected to the GND pin of the primary analog front-end chip and the GND pin of the advanced analog front-end chip.
As a further improvement of the present invention, the battery management system further includes an LDO chip for supplying power to the control unit; when any analog front-end chip is awakened by an external interference signal, the analog front-end chip sends an awakening signal to the LDO chip so that the LDO chip supplies power to the control unit and the control unit works; at this time, the control unit sends a power-down signal to the analog front-end chip to power down the analog front-end chip.
As a further improvement of the present invention, the control unit has a communication pin and an EN pin, and the LDO chip has an EN pin; the communication pin is connected to an EN pin of the LDO chip; and an EN pin of the control unit is connected to a TS pin of the analog front-end chip.
As a further improvement of the present invention, the pin 3V3 of the analog front end chip is connected to the EN pin of the LDO chip through a coupling wake-up circuit.
As a further improvement of the present invention, the coupling wake-up circuit includes a third resistor, a fourth resistor, a third capacitor and a fourth capacitor; two ends of the third resistor are respectively connected to a 3V3 pin and a GND pin of an analog front-end chip; two ends of the fourth resistor are respectively connected to an EN pin of the LDO chip and a GND pin of the other analog front-end chip; one end of the third capacitor is connected to one end, close to a pin 3V3, of the third resistor, and the other end of the third capacitor is connected to an EN pin of the LDO; one end of the fourth capacitor is connected to one end, close to a GND pin, of the third resistor, and the other end of the fourth capacitor is connected to the GND pin of the LDO; the 3V3 pins of the remaining analog front end chips are connected to the EN pin of the LDO chip.
As a further improvement of the utility model, the 3V3 pin of all the other analog front end chips with still be provided with the diode between the EN pin of LDO chip to make the electric current can only flow in the EN pin of LDO chip.
As a further improvement of the present invention, before the control unit sends the lower electric signal, the control unit detects whether the peripheral device is connected to the battery; if not, the control unit sends a power-down signal to the analog front-end chip so as to power down the analog front-end chip.
As a further improvement, if there is no peripheral equipment connected with the battery, then the control unit waits for a preset time, and then sends down the signal of telecommunication for the simulation front end chip.
The utility model also discloses a battery package, including a plurality of batteries and aforementioned battery management system.
The utility model has the advantages that: the utility model discloses battery management system can in time send down the signal of telecommunication to the simulation front end chip awaken up by external interference signal to make the simulation front end chip awaken up by external interference signal can normally descend the electricity, avoid causing the electricity core to appear the overdischarge problem because of the simulation front end chip that is awaken up by external interference signal can not descend the electricity.
Drawings
Fig. 1 is a schematic diagram of a battery management system module according to a first embodiment of the present invention.
Fig. 2 is a schematic structural diagram of the coupled wake-up circuit according to the first embodiment.
Fig. 3 is a schematic diagram of a battery management system module according to a second embodiment of the present invention.
Fig. 4 is a schematic block diagram of a battery management system according to a third embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a coupled wake-up circuit according to a third embodiment.
Fig. 6 is a schematic block diagram of a battery management system according to a fourth embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in detail with reference to the accompanying drawings and specific embodiments.
The utility model discloses a battery management system, including two at least analog front end chips (AFE) and the control unit. The analog front-end chip is used for collecting the output voltage, the output current or the working temperature of the battery. The battery can be a single battery cell, and also can be a battery cell string formed by connecting a plurality of battery cells in series or in parallel. The control unit is used for controlling the analog front end chip to be powered on and powered off. When any one of the analog front-end chips is awakened by an external interference signal, the analog front-end chip directly or indirectly supplies power to the control unit so as to enable the control unit to work. At this time, the control unit detects whether there is a peripheral connected to the battery. If not, the control unit sends a power-down signal to the analog front-end chip to power down the analog front-end chip, so that the problem that the battery is over-discharged due to the fact that the analog front-end chip wakened up by an external interference signal cannot be powered down is avoided. Preferably, if no peripheral device is connected to the battery, the control unit waits for a preset time and then sends a down electric signal to the analog front-end chip. The following is a detailed description of specific embodiments.
Referring to fig. 1 and 2, the present invention discloses a battery management system 100 for monitoring the output voltage, the output current or the operating temperature of a battery 70. The battery 70 includes a first battery 71 and a second battery 72. The battery management system 100 includes an analog front end chip 110, a wake-up circuit 120 for waking up the analog front end chip 110, a control unit 130, an I2C unit 140, a coupled wake-up circuit 150, and an output component 160. Referring to fig. 1, the analog front-end chip 110 is used for detecting the output voltage, the output current or the operating temperature of the battery 70. Each analog front end chip 110 includes a TS pin, an SDA pin, an SCL pin, and a 3V3 pin. The analog front end chip 110 includes a primary analog front end chip 111 and at least one advanced analog front end chip 112. The primary analog front end chip 111 is used for detecting the first battery 71, and the advanced analog front end chip 112 is used for detecting the second battery 72. In the present embodiment, the number of the advanced analog front end chips 112 is 1, but in other embodiments, the number of the advanced analog front end chips 112 may be set according to the number of the batteries 70. The wake-up circuit 120 includes a primary wake-up circuit 121 that cooperates with the primary analog front-end chip 111 and an advanced wake-up circuit 122 that cooperates with the advanced analog front-end chip 112. The primary wake-up circuit 121 and the advanced wake-up circuit 122 both have a signal output pin and an EN pin. The signal output pin of the primary wake-up circuit 121 is connected to the TS pin of the primary analog front-end chip 111, and the EN pin thereof is connected to the 3V3 pin of the advanced analog front-end chip 112 through the coupling wake-up circuit 150. The signal output pin of the advanced wake-up circuit 122 is connected to the TS pin of the advanced analog front end chip 112, and the EN pin thereof is connected to the EN pin of the primary wake-up circuit 121. In the present embodiment, the control unit 130 is a Micro Control Unit (MCU). The micro control unit 130 is connected to the SDA pin and the SCL pin of the primary analog front end chip 111 for communication with the primary analog front end chip 111. The micro control unit 130 is also connected to the SDA pin, SCL pin of the advanced analog front end chip 112 through the I2C unit 140 in order to communicate with the advanced analog front end chip 112. The 3V3 pin of the primary analog front end chip 111 is connected to the VCC pin of the micro control unit 130 to supply power to the micro control unit 130. The coupled wake-up circuit 150 has one end connected to the EN pin of the primary wake-up circuit 121 and the other end connected to the 3V3 pin of the advanced analog front-end chip 112. Referring to fig. 2, the coupling wake-up circuit 150 includes a first resistor 151, a second resistor 152, a first capacitor 153, and a second capacitor 154. Two ends of the first resistor 151 are respectively connected to the pin 3V3 and the pin GND of the advanced analog front-end chip 112, and two ends of the second resistor 152 are respectively connected to the pin TS and the pin GND of the primary analog front-end chip 111. In this embodiment, one end of the second resistor 152 is connected to the EN pin of the primary wake-up circuit 121, so as to be connected to the TS pin of the primary analog front-end chip 111 through the primary wake-up circuit 121. Two ends of the first capacitor 153 are respectively connected to the TS pin of the primary analog front-end chip 111 and the 3V3 pin of the advanced analog front-end chip 112, and two ends of the second capacitor 154 are respectively connected to the GND pin of the primary analog front-end chip 111 and the GND pin of the advanced analog front-end chip 112. Referring to fig. 1, the output element 160 includes a first positive terminal 161, a first negative terminal 162, a second positive terminal 163, a second negative terminal 164, and a communication terminal 165. The first positive terminal 161 and the first negative terminal 162 are connected to two ends of the first battery 71, and the second positive terminal 163 and the second negative terminal 164 are connected to two ends of the second battery 72, so that electric energy of the first battery 71 and the second battery 72 is output through the first positive terminal 161, the first negative terminal 162, the second positive terminal 163 and the second negative terminal 164. The communication terminal 165 is connected to a COM communication pin of the micro control unit 130. Preferably, the EN pin of the primary wake-up circuit 121 is connected to the KEY terminal through a first diode D1, and is connected to the COM communication pin of the micro control unit 130 through a second diode D2. With such a configuration, the micro control unit 130 can wake up the primary analog front-end chip 111 and the advanced analog front-end chip 112 directly through the COM communication pin, or a user can wake up the primary analog front-end chip 111 and the advanced analog front-end chip 112 directly through a KEY.
Referring to fig. 1, when the mcu 130 does not operate and the primary analog front-end chip 111 is awakened by an external interference signal, the pin 3V3 of the primary analog front-end chip 111 supplies power to the mcu 130, so that the mcu 130 can operate normally. At this time, the micro control unit 130 detects whether there is a peripheral connected to the input module 160. If not, the micro control unit 130 sends a power-down signal to the primary analog front-end chip 111, so that the primary analog front-end chip 111 is powered down, and then the micro control unit 130 is powered off. This is the case when the primary analog front end chip 111 directly powers the mcu 130. Preferably, if no peripheral device is connected to the input component 60, the micro control unit 30 waits for a preset time and then sends a down electric signal to the primary analog front-end chip 111. The preset time can be set by a user according to needs.
When the micro control unit 130 does not operate and the advanced analog front end chip 112 is awakened by an external interference signal, the pin 3V3 of the advanced analog front end chip 112 sends an awakening signal to the TS pin of the primary analog front end chip 111 through the coupling awakening circuit 150 to awaken the primary analog front end chip 111, and at this time, the pin 3V3 of the primary analog front end chip 111 supplies power to the micro control unit 130, so that the micro control unit 130 operates normally. At this time, the micro control unit 130 detects whether there is a peripheral connected to the input module 160. If not, the micro control unit 130 sends a down electrical signal directly to the primary analog front end chip 111 and sends a down electrical signal through the I2C unit 140 to the advanced analog front end chip 112, and then the micro control unit 130 is powered down. This is the case where the advanced analog front end chip 112 indirectly powers the micro control unit 130. Preferably, if no peripheral device is connected to the input module 160, the micro control unit 130 waits for a preset time and then sends the lower electric signal to the primary analog front-end chip 111 and the advanced analog front-end chip 112. In this embodiment, the advanced analog front end chip 112 directly sends the wake-up signal to the primary analog front end chip 111. However, in other embodiments, the advanced analog front end chip 112 may also indirectly send a wake-up signal to the primary analog front end chip 111. For example, the advanced analog front-end chip 112 sends a wake-up signal to a third analog front-end chip, and then the third analog front-end chip sends the wake-up signal to the primary analog front-end chip 111, so as to indirectly wake up the primary analog front-end chip 111.
In this embodiment, two ends of the first battery 71 are respectively connected to the first positive terminal 161 and the first negative terminal 162, and two ends of the second battery 72 are respectively connected to the second positive terminal 163 and the second negative terminal 164, so that a user can conveniently cooperate with the output assembly 160 through different pairs of terminals to enable the battery 70 to output a series voltage or a parallel voltage. However, in other embodiments, the battery 70 may be directly configured to output a series voltage. Fig. 3 shows a battery management system 200 of a second embodiment. The structure of the battery management system 200 is substantially the same as the structure of the battery management system 100, except that: the positive electrode of the first battery 71 is directly connected to the negative electrode of the second battery 72, so that the battery 70 outputs a series voltage.
Compared with the prior art, the utility model discloses battery management system 100 can in time send down the signal of telecommunication to the simulation front end chip 110 awaken up by external interference signal to make the simulation front end chip 110 awaken up by external interference signal can normally descend the electricity, avoid the simulation front end chip 110 awaken up by external interference signal to cause the electricity core to appear the overdischarge problem because of unable power down.
Fig. 4 shows a battery management system 300 according to a third embodiment of the present invention. The battery management system 300 includes an analog front end chip 310, a wake-up circuit 320 to wake up the analog front end chip 310, a control unit 330, an I2C unit 340, a coupled wake-up circuit 350, an LDO chip 360 to power the control unit 330, and an output component 370. Referring to fig. 4, the analog front-end chip 310 is used for detecting the output voltage, the output current or the operating temperature of the battery 70. Each analog front end chip 310 includes a TS pin, an SDA pin, an SCL pin, and a 3V3 pin. The analog front end chip 310 includes a first analog front end chip 311 and a second analog front end chip 312. The first analog front end chip 311 is used for detecting the first battery 71, and the second analog front end chip 312 is used for detecting the second battery 72. In the present embodiment, the number of the analog front end chips 310 is 2, but in other embodiments, the number of the analog front end chips 310 may be set according to the number of the batteries 70. The wake-up circuit 320 includes a first wake-up circuit 321 coupled to the first analog front end chip 311 and a second wake-up circuit 322 coupled to the second analog front end chip 312. The first wake-up circuit 321 and the second wake-up circuit 322 both have a signal output pin and an EN pin. The signal output pin of the first wake-up circuit 321 is connected to the TS pin of the first analog front end chip 311, and the signal output pin of the second wake-up circuit 322 is connected to the TS pin of the second analog front end chip 312. The EN pins of the first wake-up circuit 321 and the second wake-up circuit 322 are commonly connected to the EN pin of the control unit 330, so that the control unit 330 can wake up the first analog front-end chip 311 and the second analog front-end chip 312. In this embodiment, the control unit 330 is a Micro Control Unit (MCU). The control unit 330 is connected to the SDA pin, SCL pin of the first analog front end chip 311 to communicate with the first analog front end chip 311. The control unit 330 is also connected to the SDA pin and the SCL pin of the second analog front end chip 312 through the I2C unit 340 to communicate with the second analog front end chip 312. The coupled wake-up circuit 350 includes a signal input and a signal output. Pins 3V3 of the first analog front-end chip 311 and the second analog front-end chip 312 are connected to a signal input terminal of the coupling wake-up circuit 350, and a signal output terminal of the coupling wake-up circuit 350 is connected to the LDO chip 360. The LDO chip 360 is used to supply power to the control unit 330. The LDO chip 360 includes a BAT pin, an EN pin, and a 3V3 pin. The BAT pin of the LDO chip 360 is connected to a power supply, the EN pin is connected to the signal output terminal of the coupled wake-up circuit 350, and the 3V3 pin is connected to the VCC pin of the control unit 330. The output member 370 includes a positive terminal 371, a negative terminal 372, and a communication terminal 373. The positive terminal 371 is connected to the positive electrode of the second battery 72, the negative electrode of the second battery 72 is connected to the positive electrode of the first battery 71, the negative electrode of the first battery 71 is connected to the negative terminal 372, and the communication terminal 373 is connected to the COM communication pin of the control unit 330.
Referring to fig. 5, the coupled wake-up circuit 350 includes a third resistor 351, a fourth resistor 352, a third capacitor 353 and a fourth capacitor 354. Two ends of the third resistor 351 are respectively connected to the 3V3 pin and the GND pin of the second analog front-end chip 312; one end of the fourth resistor 352 is connected to the GND pin of the first analog front end chip 311, and the other end is connected to the EN pin of the LDO chip 360. Two ends of the third capacitor 353 are respectively connected to the pin 3V3 of the second analog front end chip 312 and the EN pin of the LDO chip 360; two ends of the fourth capacitor 354 are respectively connected to the GND pin of the first analog front end chip 311 and the GND pin of the second analog front end chip 312. The 3V3 pin of the first analog front end chip 311 is connected to the EN pin of the LDO chip 360. Preferably, the first analog front end chip 311 is connected to the EN pin of the LDO chip 360 through a sixth diode D6, so that current can only flow into the EN pin of the LDO chip 360.
Preferably, the EN pin of the LDO chip is connected to the COM communication pin of the control unit 330 through a fourth diode D4, so that the control unit 330 wakes up the LDO chip 360. The EN pin of the LDO chip 360 is also connected to KEY through a fifth diode D5, so that a user can wake up the LDO chip 360 directly through KEY.
Referring to fig. 4, when the control unit 330 does not operate and any one of the analog front-end chips 310 is awakened by an external interference signal, the 3V3 pin of the analog front-end chip 310 sends a signal to the coupling awakening circuit 350, so as to awaken the LDO chip 360, and the LDO chip 360 supplies power to the control unit 330, so that the control unit 330 operates normally. Then, the control unit 330 detects whether there is a peripheral connected to the battery 70. If not, the control unit 330 sends a power-down signal to the analog front-end chip 310, so that the analog front-end chip 310 is powered down.
In the present embodiment, the first battery 71 and the second battery 72 are directly connected in series, so that only the series voltage can be output. However, in other embodiments, the first battery 71 and the second battery 72 may be configured to output parallel voltages. Fig. 6 shows a battery management system 400 according to a fourth embodiment of the present invention, which has a structure substantially the same as the battery management system 300, except that the first battery 71 and the second battery 72 are independent of each other. The first battery 71 outputs electric power through a first terminal 461 and a second terminal 462, and the second battery 72 outputs electric power through a third terminal 463 and a fourth terminal 464. With this configuration, it is convenient for a user to mate the first terminal 461, the second terminal 462, the third terminal 463 and the fourth terminal 464 through different butt-joint terminals, so that the battery 70 outputs a series voltage or a parallel voltage.
The utility model also discloses a battery package, including battery 70 and control battery 70's battery management system 100/200/300/400.
The above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that the technical solutions of the present invention can be modified or replaced equivalently without departing from the spirit and scope of the technical solutions of the present invention.

Claims (13)

1. A battery management system, comprising:
the analog front-end chips are used for acquiring the output voltage, the output current or the working temperature of the battery; and
the control unit controls the analog front-end chip to be powered on and powered off;
when any analog front-end chip is awakened by an external interference signal, the analog front-end chip directly or indirectly supplies power to the control unit so as to enable the control unit to work, and at the moment, the control unit sends a power-down signal to the analog front-end chip so as to enable the analog front-end chip to be powered down.
2. The battery management system of claim 1, wherein: the at least two analog front-end chips comprise a primary analog front-end chip and at least one advanced analog front-end chip; when the advanced analog front-end chip is awakened by an external interference signal, the advanced analog front-end chip directly or indirectly sends an awakening signal to the primary analog front-end chip to awaken the primary analog front-end chip, and then the primary analog front-end chip supplies power to the control unit to enable the control unit to work; at this time, the control unit sends a power-down signal to the primary analog front-end chip and the advanced analog front-end chip, so that the primary analog front-end chip and the advanced analog front-end chip are powered down.
3. The battery management system of claim 2, wherein: the control unit is provided with a communication pin; the analog front-end chip is provided with a TS pin connected with the communication pin; and the control unit sends a wake-up signal to the TS pin through the communication pin so as to wake up the analog front-end chip.
4. The battery management system of claim 2, wherein: the battery management system comprises a coupling wake-up circuit, the analog front-end chip is provided with a pin 3V3 and a pin TS, and the control unit is provided with a pin VCC; the 3V3 pin of the primary analog front end chip is connected to the VCC pin of the control unit, and the 3V3 pin of the advanced analog front end chip is connected to the TS pin of the primary analog front end chip through the coupling wake-up circuit.
5. The battery management system of claim 4, wherein: the analog front-end chip further comprises a GND pin, and the coupling awakening circuit comprises a first resistor, a second resistor, a first capacitor and a second capacitor; two ends of the first resistor are respectively connected to a 3V3 pin and a GND pin of the advanced analog front-end chip; two ends of the second resistor are respectively connected to a TS pin and a GND pin of the primary analog front-end chip; two ends of the first capacitor are respectively connected to a TS pin of the primary analog front-end chip and a 3V3 pin of the advanced analog front-end chip; and two ends of the second capacitor are respectively connected to the GND pin of the primary analog front-end chip and the GND pin of the advanced analog front-end chip.
6. The battery management system of claim 1, wherein: the battery management system also comprises an LDO chip for supplying power to the control unit; when any analog front-end chip is awakened by an external interference signal, the analog front-end chip sends an awakening signal to the LDO chip so that the LDO chip supplies power to the control unit and the control unit works; at this time, the control unit sends a power-down signal to the analog front-end chip to power down the analog front-end chip.
7. The battery management system of claim 6, wherein: the control unit is provided with a communication pin and an EN pin, and the LDO chip is provided with an EN pin; the communication pin is connected to an EN pin of the LDO chip; and an EN pin of the control unit is connected to a TS pin of the analog front-end chip.
8. The battery management system of claim 6, wherein: the 3V3 pin of the analog front-end chip is connected to the EN pin of the LDO chip through a coupling wake-up circuit.
9. The battery management system of claim 8, wherein: the coupling wake-up circuit comprises a third resistor, a fourth resistor, a third capacitor and a fourth capacitor; two ends of the third resistor are respectively connected to a 3V3 pin and a GND pin of an analog front-end chip; two ends of the fourth resistor are respectively connected to an EN pin of the LDO chip and a GND pin of the other analog front-end chip; one end of the third capacitor is connected to one end, close to a pin 3V3, of the third resistor, and the other end of the third capacitor is connected to an EN pin of the LDO; one end of the fourth capacitor is connected to one end, close to a GND pin, of the third resistor, and the other end of the fourth capacitor is connected to the GND pin of the LDO; the 3V3 pins of the remaining analog front end chips are connected to the EN pin of the LDO chip.
10. The battery management system of claim 9, wherein: and a diode is arranged between the 3V3 pin of the rest analog front-end chips and the EN pin of the LDO chip, so that current can only flow into the EN pin of the LDO chip.
11. The battery management system of claim 1, wherein: before the control unit sends a down electric signal, the control unit detects whether a peripheral device is connected with the battery; if not, the control unit sends a power-down signal to the analog front-end chip so as to power down the analog front-end chip.
12. The battery management system of claim 11, wherein: and if no external equipment is connected with the battery, the control unit waits for a preset time and then sends a down electric signal to the analog front-end chip.
13. A battery pack, comprising:
a plurality of batteries; and
the battery management system of any one of claims 1 to 12.
CN202022575422.5U 2020-11-10 2020-11-10 Battery management system and battery pack Active CN213817282U (en)

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CN213817282U true CN213817282U (en) 2021-07-27

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