CN213816140U

CN213816140U - Copper electrode structure

Info

Publication number: CN213816140U
Application number: CN202022467460.9U
Authority: CN
Inventors: 潘远杰; 周祖源; 薛兴涛
Original assignee: Shenghejing Micro Semiconductor Jiangyin Co Ltd
Current assignee: SJ Semiconductor Jiangyin Corp
Priority date: 2020-10-30
Filing date: 2020-10-30
Publication date: 2021-07-27
Anticipated expiration: 2030-10-30

Abstract

The utility model provides a copper electrode structure, structure are including the base that has the TSV deep hole, the copper packed column has in the TSV deep hole, the contact interface of copper packed column and base has the oxide isolation layer, the first side of base passes through the glue film bonding on the base plate, copper packed column protrusion in the base, base second side covers there is PI photoresist layer, PI photoresist layer has and shows the development region of copper packed column, the development region is formed with the copper-plated electrode, be formed with metal convex block on the copper-plated electrode, realize the electrical property through copper electrode and metal convex block and draw forth. The scheme obtains the PI photoresist layer, effectively avoids stress fracture and forms a good side wall covering form, obviously reduces the cost in the process and improves the yield.

Description

Copper electrode structure

Technical Field

The utility model belongs to the technical field of the advanced encapsulation of semiconductor, especially relate to a copper electrode structure and manufacturing method thereof.

Background

Packaging technology is an important component of integrated circuit development, and its main functions are to complete power distribution, signal distribution, heat dissipation and protection. The advanced packaging technology has important significance for breaking through the limit dimension obstacle of wafer manufacturing and continuing the Moore's law. With the rapid development of integrated circuit technology and the continuous improvement of chip performance, people also put higher and higher demands on corresponding packaging technology, and innovative packaging interconnection density is continuously increased and packaging thickness is continuously reduced. Since 2010, the emergence of intermediate packaging technologies such as Wafer Level Packaging (WLP), Through Silicon Vias (TSV), 2.5D interposer, 3DIC, fan-out, etc., has greatly improved the level of advanced packaging technologies. Currently, with the slow down of moore's law, the packaging technology has become an important means for miniaturization, multifunction, power consumption reduction and bandwidth improvement of electronic products. Advanced packaging technologies are moving towards system integration, high speed, high frequency and 3D.

The 2.5D adapter plate packaging technology has the advantages of good performance, large capacity, high yield and the like, and the copper electrode structure manufactured by the copper exposure process is an important process in the 2.5D adapter plate packaging technology, and an insulating layer needs to be formed on the surface of a thinned silicon wafer in the process. Currently, silicon Chemical Mechanical Polishing (CMP), silicon etching, nitride/oxide CVD, oxide CMP are used to obtain the final insulating layer. The process is complex and the processor is expensive. In addition, the film stress of silicon nitride and silicon oxide is large, which results in the risk of local cracking of the silicon wafer, affecting the process stability, and reducing the yield. Therefore, reducing the stress cracking of the insulating layer and realizing good coverage of the side wall are the difficulties in manufacturing the copper electrode structure by the 2.5D adapter plate packaging technology and are the key for improving the quality competitiveness of the packaged product.

SUMMERY OF THE UTILITY MODEL

In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a method for manufacturing a copper electrode structure, which is used to solve the problems of stress cracking of the insulating layer and poor coverage of the sidewall in the prior art.

To achieve the above and other related objects, the present invention provides a method for manufacturing a copper electrode structure, comprising:

1) providing a bonding structure which comprises a substrate and a base bonded on the substrate through an adhesive layer and provided with a copper filled column TSV deep hole, wherein an oxide isolation layer is arranged at a contact interface of the copper filled column and the base, the first side of the base is bonded on the adhesive layer, the second side of the base, which is far away from the substrate, is thinned, and the copper top surface in the TSV deep hole at the second side of the base is exposed;

2) chemically etching the second side of the substrate to enable the copper filling columns in the TSV deep holes to protrude out of the substrate;

3) covering a PI photoresist layer on the second side of the substrate;

4) exposing the PI photoresist layer;

5) developing the PI photoresist layer to expose the top surface of the copper filling column in the TSV hole;

6) and plating copper on the top surface of the copper filling column exposed in the developing area to form a copper electrode, and forming a metal bump on the copper electrode.

Optionally, the substrate comprises one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate; the substrate is one of a silicon substrate, a silicon carbide substrate and a silicon nitride substrate.

Optionally, the adhesive layer includes one of PI adhesive, PVB adhesive, and EVA adhesive, and the bonding method includes one of compression molding, transfer molding, liquid seal molding, plastic seal process, and vacuum lamination process.

Optionally, the thinning in step 1) is mechanical thinning.

Optionally, the process of covering the PI photoresist layer includes:

3-1) placing a PI dry film with a release film on the second side of the substrate;

and 3-2) carrying out vacuum hot pressing to ensure that the PI film is attached to the substrate, and stripping the release film.

Optionally, the method of copper plating comprises one of electroless plating and electroplating.

Optionally, the metal bump comprises one of a tin solder, a silver solder, and a gold-tin alloy solder.

The utility model also provides a copper electrode structure, the structure includes: the substrate with the TSV deep hole is provided with a copper filling column, a contact interface of the copper filling column and the substrate is provided with an oxide isolation layer, the first side of the substrate is bonded on the substrate through an adhesive layer, the copper filling column protrudes out of the substrate, the second side of the substrate is covered with a PI photoresist layer, the PI photoresist layer is provided with a developing area exposing the copper filling column, a copper-plated electrode is formed in the developing area, a metal bump is formed on the copper-plated electrode, and electrical leading-out is achieved through the copper electrode and the metal bump.

Optionally, the development region is funnel-shaped.

As described above, the copper electrode structure and the manufacturing method thereof of the present invention have the following beneficial effects: the insulating layer is obtained through PI coating, exposure and developing processes, stress cracking can be effectively avoided, a good side wall covering form is formed, the cost is obviously reduced in the process, and the yield is improved.

Drawings

Fig. 1-5 are schematic structural diagrams showing steps of a conventional method for fabricating a copper electrode structure.

Fig. 6 to 11 show the schematic structural diagrams of the steps of the manufacturing method of a copper electrode structure of the present invention, wherein fig. 11 shows the schematic structural diagram of a copper electrode obtained after the manufacturing method of a copper electrode structure of the present invention is completed.

FIG. 12 is a flow chart of a method for fabricating a copper electrode structure.

Element number description:

100 bonded structure

101 substrate

102 glue layer

103 base

104 copper packed column

105 oxide isolation layer

200 SiN/SiO₂Insulating layer

300 PI photoetching adhesive layer

400 copper electrode

500 metal bump

S1-S6

Detailed Description

The following description is provided for the purpose of illustrating the embodiments of the present invention and is not intended to limit the invention to the particular embodiments disclosed herein. The present invention can also be implemented or applied through other different specific embodiments, and various details in the present specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

Refer to FIGS. 1-12. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, the form, quantity and proportion of each component may be changed arbitrarily in actual implementation, and the layout of the components may be more complicated.

The manufacturing method of the existing copper electrode structure is shown in figures 1-5:

as shown in fig. 1, a bonding structure 100 is first provided, which includes a substrate 101 and a base 103 bonded to the substrate 101 through a glue layer 102 and having a copper filled pillar 104 filling a TSV deep hole, the copper filled pillar 104 and the base 103 have an oxide isolation layer 105 at a contact interface, a first side of the TSV deep hole opening in the base 103 is bonded to the glue layer 102, a second side of the base 103 facing away from the substrate 101 is thinned, and a top surface of the copper filled pillar 104 in the TSV deep hole on the second side of the base 103 is exposed. The substrate 101 includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate. The substrate 103 is one of a silicon substrate, a silicon carbide substrate, and a silicon nitride substrate. The glue layer 102 may be one of PI glue, PVB glue, and EVA glue. The bonding method can be one of compression molding, transfer molding, liquid sealing, plastic packaging and vacuum laminating. The thinning mode is mechanical thinning.

As shown in fig. 2, the second side of the substrate 103 is then chemically etched, so that the copper filled pillars 104 in the TSV deep holes protrude from the substrate.

As shown in FIG. 3, SiN/SiO is then chemical vapor deposited on the second side of the substrate 103₂An insulating layer 200.

As shown in FIG. 4, followed by SiN/SiO₂ The insulating layer 200 is subjected to chemical mechanical polishing to expose the top surface of the copper filled pillars 104 in the TSV deep holes.

As shown in FIG. 5, followed by a SiN/SiO phase₂The insulating layer 200 is covered with a PI photoresist layer 300, the top surfaces of the copper filled pillars 104 in the TSV deep holes are exposed through exposure and development, copper is plated on the top surfaces of the copper filled pillars 104 exposed in the development area to form a copper electrode 400, and a metal bump 500 is formed on the copper electrode 400.

The method uses SiN/SiO₂The film serves as an insulating layer, the film stress is large, the adhesive sheet is easily broken in the subsequent process, and the process involves CVD and oxide CMP, the equipment is expensive and the production cost is high.

The present embodiment provides a method for manufacturing a copper electrode structure, and the flow of steps is shown in fig. 12. The specific process of the method for manufacturing the copper electrode structure of the embodiment is shown in fig. 6-11, and comprises the following steps:

as shown in fig. 6, a bonding structure 100 is first provided, which includes a substrate 101 and a base 103 bonded to the substrate 101 through a glue layer 102 and having a copper filled pillar 104 filling a TSV deep hole, the copper filled pillar 104 and the base 103 have a contact interface with an oxide isolation layer 105, a first side of the TSV deep hole opening in the base 103 is bonded to the glue layer 102, a second side of the base 103 facing away from the substrate 101 is thinned, and a top surface of the copper filled pillar 104 in the TSV deep hole on the second side of the base 103 is exposed. The substrate 101 includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate. The substrate 103 is one of a silicon substrate, a silicon carbide substrate, and a silicon nitride substrate. The glue layer 102 may be one of PI glue, PVB glue, and EVA glue. The bonding method can be one of compression molding, transfer molding, liquid sealing, plastic packaging and vacuum laminating. The thinning mode is mechanical thinning.

As shown in fig. 7, the second side of the substrate 103 is then chemically etched, i.e., soaked in a certain chemical reagent or a reagent solution, and undergoes a chemical reaction with the chemical reagent to be dissolved and thinned, so that the copper filled pillars 104 in the TSV deep holes protrude from the substrate.

As shown in fig. 8, a PI photoresist layer 300 is then coated on the second side of the substrate 103: placing the PI dry film with the release film on the second side of the substrate 103; and (3) performing vacuum hot pressing to enable the PI film to be attached to the substrate, and peeling the release film to obtain the PI photoresist layer 300 covering structure.

As shown in fig. 9, PI photoresist layer 300 is then exposed.

As shown in fig. 10, the PI photoresist layer 300 is then developed to expose the top surface of the copper filled pillars 104 in the TSV holes.

As shown in fig. 11, the copper filled pillars 104 exposed in the development area are plated with copper to form copper electrodes 400, and metal bumps 500 are formed on the copper electrodes 400. The method of plating the copper electrode 400 includes an electroless plating method or an electroplating method. The metal bump 500 may be one of a tin solder, a silver solder, and a gold-tin alloy solder. The developing region is funnel-shaped, the size of the top surface of the funnel-shaped region is larger than that of the bottom surface of the funnel-shaped region, so that the copper filled pillars 104 with smaller areas can be equivalently enlarged, and the manufacturing of the metal bumps 500 and the subsequent connection with other electronic equipment are facilitated.

As shown in fig. 11, the present embodiment further provides a copper electrode structure obtained by the method for manufacturing a copper electrode structure, and the structure includes: the deep hole structure comprises a base 103 with a TSV deep hole, wherein a copper filling column 104 is arranged in the TSV deep hole, an oxide isolation layer 105 is arranged at a contact interface of the copper filling column 104 and the base 103, a first side of the base 103 is bonded on a substrate 101 through a glue layer 102, the copper filling column 104 protrudes out of the base 103, a second side of the base 103 is covered with a PI photoresist layer 300, the PI photoresist layer 300 is provided with a developing area exposing the copper filling column 104, the developing area can be funnel-shaped, a copper-plated electrode 400 is formed in the developing area, a metal bump 500 is formed on the copper-plated electrode 400, and electrical leading-out is achieved through the copper electrode 400 and the metal bump 500. The developing region is funnel-shaped, the size of the top surface of the funnel-shaped region is larger than that of the bottom surface of the funnel-shaped region, so that the copper filled pillars 104 with smaller areas can be equivalently enlarged, and the manufacturing of the metal bumps 500 and the subsequent connection with other electronic equipment are facilitated.

To sum up, the utility model discloses a PI coating, exposure, development technology obtain the insulating layer, and effectual stress rupture of avoiding forms good lateral wall cover form, and CMP and CVD process have been saved to the course of technology, are showing reduce cost and improve the yield. Therefore, the utility model effectively overcomes the defects in the prior art and has high industrial value.

The above embodiments are merely illustrative of the principles and effects of the present invention, and are not to be construed as limiting the invention. Modifications and variations can be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims

1. A copper electrode structure, comprising: the substrate with the TSV deep hole is provided with a copper filling column, a contact interface of the copper filling column and the substrate is provided with an oxide isolation layer, the first side of the substrate is bonded on the substrate through an adhesive layer, the copper filling column protrudes out of the substrate, the second side of the substrate is covered with a PI photoresist layer, the PI photoresist layer is provided with a developing area exposing the copper filling column, a copper-plated electrode is formed in the developing area, and a metal bump is formed on the copper-plated electrode.

2. The copper electrode structure of claim 1, wherein: the substrate includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.

3. The copper electrode structure of claim 1, wherein: the developing region is funnel-shaped.

4. The copper electrode structure of claim 1, wherein: the glue layer comprises one of PI glue, PVB glue and EVA glue.

5. The copper electrode structure of claim 1, wherein: the substrate is one of a silicon substrate, a silicon carbide substrate and a silicon nitride substrate.

6. The copper electrode structure of claim 1, wherein: the metal bump comprises one of tin solder, silver solder and gold-tin alloy solder.