CN213751984U - Device for rapidly judging failure of DDR (double data Rate) chip - Google Patents
Device for rapidly judging failure of DDR (double data Rate) chip Download PDFInfo
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- CN213751984U CN213751984U CN202023183526.8U CN202023183526U CN213751984U CN 213751984 U CN213751984 U CN 213751984U CN 202023183526 U CN202023183526 U CN 202023183526U CN 213751984 U CN213751984 U CN 213751984U
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Abstract
The utility model relates to a chip test technical field discloses a device that judges DDR chip inefficacy fast to can effectively judge whether inefficacy fast to the DDR chip that takes off. The utility model comprises a MCU for reading and writing with DDR, a FLASH for storing DDR setting parameters, a DDR test socket for electrically accessing the DDR chip and fixing the DDR chip, a serial data communication interface and a man-machine interaction device; the MCU is respectively and electrically connected with the FLASH, the DDR test socket and the serial data communication interface, and the serial data communication interface is electrically connected with the human-computer interaction device. When the DDR test socket is used, the DDR chip can be placed into the DDR test socket, the MCU performs read-write operation on the DDR according to specification parameters of the DDR chip, if the read-write operation is normal, the chip is indicated to be correct, and if the feedback is wrong, the chip is indicated to be invalid, so that the purpose of quick judgment is achieved. The utility model is suitable for a DDR chip failure detection.
Description
Technical Field
The utility model relates to a chip test technical field, in particular to judge device that DDR chip became invalid fast.
Background
With the advent of the intelligent era, the larger the data processing computing capability of the electronic device, the larger the capacity of the DDR chip built in the device, and the larger the number of the DDR chips built in the device, such as a mobile phone, a television, a set-top box, etc. When the factory produces the equipment in large quantities, the DDR chip of the circuit board has the condition of failure or poor welding, and when the factory maintenance personnel judge that the DDR chip has a problem, the DDR chip is generally taken down, whether the chip fails or not can not be judged to the DDR chip that takes down, and only can be pasted on the good circuit board, whether the chip fails or not can be judged by normal work, and the maintenance mode consumes long time, and reduces the maintenance progress. The DDR chip taken down is directly replaced by a new chip, the fault board can also be maintained, the maintenance has an imagination that if the DDR chip is not welded and the chip is not failed, the DDR chip is replaced by the new DDR chip, which is equivalent to that the DDR chip is mounted again, the chip taken down is not failed and cannot be scrapped, if the chip taken down is scrapped, the property loss of a company is caused, in order to avoid the loss, the DDR chip taken down is placed on the device, whether the DDR chip is failed or not can be judged quickly, the chip which is not failed can be reused, and the property loss of the company is reduced.
SUMMERY OF THE UTILITY MODEL
The to-be-solved technical problem of the utility model is: a device for rapidly judging the failure of a DDR chip is provided, so that whether the DDR chip which is taken down is failed or not can be rapidly and effectively judged.
In order to solve the above problem, the utility model adopts the following technical scheme: an apparatus for quickly determining a DDR chip failure, comprising: the DDR test device comprises an MCU used for performing read-write operation with a DDR, a FLASH used for storing DDR setting parameters, a DDR test socket used for electrically accessing a DDR chip and fixing the DDR chip, a serial data communication interface and a man-machine interaction device; the MCU is respectively and electrically connected with the FLASH, the DDR test socket and the serial data communication interface, and the serial data communication interface is electrically connected with the human-computer interaction device. When the DDR test socket is used, the DDR chip can be placed into the DDR test socket, the MCU performs read-write operation on the DDR according to specification parameters of the DDR chip, if the read-write operation is normal, the man-machine interaction device feeds back the chip to be correct, and if the feedback is wrong, the chip is indicated to be invalid, so that the purpose of quick judgment is achieved.
Furthermore, in the utility model, the man-machine interaction device can be a PC computer; the serial data communication interface may be an RS232 interface.
The utility model has the advantages that:
1. simple, fast and effective determination
The DDR chip is placed in a DDR test socket, the DDR chip is powered on and started, the DDR model is input through a serial port, the MCU reads related specification data according to the input DDR model, whether the DDR fails or not is judged through comparison of the read data, and a test result is output through a serial data communication interface and a man-machine interaction device.
2. DDR determination compatible with multiple manufacturers
Different producers 'DDR, its specification parameter is different, and a model corresponds one set of parameter, the utility model discloses well FLASH can type the DDR model of different producers to compatible a plurality of producers' DDR judges.
3. Simple input
For the newly added DDR model, referring to the specification of a DDR chip, the key parameters of the DDR are input to the MCU through the serial data communication interface and the man-machine interaction device, the MCU stores the input parameters into the external FLASH, and if the DDR is to be tested, the MCU can quickly read the parameter data from the FLASH according to the input model and carry out read-write operation on the DDR according to the parameters.
Drawings
FIG. 1 is a block diagram illustrating an apparatus for quickly determining a DDR chip failure according to an embodiment;
FIG. 2 is a block diagram of a software flow of a device for quickly determining DDR chip failure in an embodiment.
Detailed Description
The utility model provides a device for rapidly judging the failure of a DDR chip, so that whether the taken-down DDR chip is failed can be rapidly and effectively judged, and the device is particularly used for MCU performing read-write operation with DDR, FLASH for storing DDR setting parameters, DDR test socket for electrically accessing and fixing the DDR chip, serial data communication interface and human-computer interaction device; the MCU is respectively and electrically connected with the FLASH, the DDR test socket and the serial data communication interface, and the serial data communication interface is electrically connected with the human-computer interaction device. When the DDR test socket is used, the DDR chip can be placed into the DDR test socket, the MCU performs read-write operation on the DDR according to specification parameters of the DDR chip, if the read-write operation is normal, the man-machine interaction device feeds back the chip to be correct, and if the feedback is wrong, the chip is indicated to be invalid, so that the purpose of quick judgment is achieved.
The present invention will be described in further detail with reference to the following drawings and detailed description.
Referring to fig. 1, the embodiment provides a device for rapidly determining failure of a DDR chip, comprising an MCU unit, a FLASH unit for storing DDR setting parameters, a power supply unit, a DDR test socket, an RS232 serial port unit, a PC computer, etc., the core of the device is that the MCU performs data read-write operation on DDR, and compares the read-write data to determine whether the DDR chip is failed, a DDR test socket can be soldered to a PCB, the test DDR chip is placed into the DDR test socket and locked to ensure that DDR can communicate with the MCU at high speed, each DDR model is stored in an external FLASH to correspond to a set of key data of a completed DDR test, so that after the DDR model is input through the RS232 serial port, the MCU calls out corresponding parameters in the FLASH according to the input model and performs read-write operation with the DDR chip on the DDR test socket according to the setting values of the parameters, the MCU compares the read-write data, to determine if the DDR chip is failed.
As shown in fig. 2, the software flow diagram shows that the tested DDR chip is placed in a DDR test socket, the socket is started, the DDR model is input through an RS232 serial port, the MCU retrieves the corresponding DDR parameter from the external FLASH according to the input model, the MCU performs read-write operation with the tested DDR according to the set parameter, the MCU compares the read-write data with an error, the tested DDR is invalid, if correct, the chip is indicated to be normal, and the MCU outputs the determination result through the RS232 serial port.
In the embodiment, the DDR test socket is welded on the test device to ensure the read-write operation with the MCU, the test DDR chip is placed into the test socket, then the cover is covered and locked, and the pins of the test DDR chip are ensured to be in close contact with the corresponding pins on the test socket. DDR has different appearance packages, and a corresponding DDR test socket needs to be attached during testing.
Claims (2)
1. The utility model provides a device of DDR chip failure is judged fast which characterized in that: the DDR test device comprises an MCU used for performing read-write operation with a DDR, a FLASH used for storing DDR setting parameters, a DDR test socket used for electrically accessing a DDR chip and fixing the DDR chip, a serial data communication interface and a man-machine interaction device; the MCU is respectively and electrically connected with the FLASH, the DDR test socket and the serial data communication interface, and the serial data communication interface is electrically connected with the human-computer interaction device.
2. The apparatus for quickly determining the failure of the DDR chip as recited in claim 1, wherein: the serial data communication interface is an RS232 interface.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202023183526.8U CN213751984U (en) | 2020-12-25 | 2020-12-25 | Device for rapidly judging failure of DDR (double data Rate) chip |
Applications Claiming Priority (1)
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CN202023183526.8U CN213751984U (en) | 2020-12-25 | 2020-12-25 | Device for rapidly judging failure of DDR (double data Rate) chip |
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CN213751984U true CN213751984U (en) | 2021-07-20 |
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CN202023183526.8U Active CN213751984U (en) | 2020-12-25 | 2020-12-25 | Device for rapidly judging failure of DDR (double data Rate) chip |
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2020
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