CN213693702U - Antenna control mainboard and big dipper signal transceiver - Google Patents

Antenna control mainboard and big dipper signal transceiver Download PDF

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CN213693702U
CN213693702U CN202022763852.XU CN202022763852U CN213693702U CN 213693702 U CN213693702 U CN 213693702U CN 202022763852 U CN202022763852 U CN 202022763852U CN 213693702 U CN213693702 U CN 213693702U
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channel
unit
antenna
beidou
data
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何方勇
陈锦鹏
张焕彬
高峰
许祥滨
孙功宪
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Techtotop Microelectronics Co Ltd
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Techtotop Microelectronics Co Ltd
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Abstract

This application is applicable to big dipper satellite communication technical field, provides an antenna control mainboard and big dipper data transceiver, and wherein, the antenna control mainboard respectively with server mainboard and a plurality of big dipper antenna connection, the antenna control mainboard includes: the interface conversion unit is used for transmitting satellite data received from each Beidou antenna to the logic channel switching unit; the logic channel switching unit is used for monitoring the state of each data receiving/sending channel and switching the channels according to the channel switching instruction; the control unit is used for determining a target data channel for receiving or sending data according to the state of the data receiving/sending channel monitored by the logic channel switching unit and generating a channel switching instruction according to the target data channel, so that the management of the data channel can be effectively realized, the data receiving and sending quantity can be increased, the satellite data receiving and sending efficiency can be improved, and the problem of communication congestion caused by limited Beidou communication bandwidth at present is solved.

Description

Antenna control mainboard and big dipper signal transceiver
Technical Field
The application belongs to the technical field of Beidou satellite communication, and particularly relates to an antenna control mainboard and a Beidou signal transceiver.
Background
The Beidou satellite navigation system is a satellite navigation system with independent and independent intellectual property rights in China, and with the rapid development of the Beidou satellite navigation system, various Beidou satellite communication terminals based on the Beidou satellite navigation system are produced at the same time and are widely applied to the fields of electric power, agriculture, water conservancy, sea and land transportation and the like.
The big dipper satellite communication terminal communicates with the big dipper satellite through big dipper antenna usually, and big dipper communication bandwidth is limited, only can transmit few data, appears the problem of communication congestion easily under the great condition of data bulk.
SUMMERY OF THE UTILITY MODEL
In view of this, the embodiment of the application provides an antenna control mainboard, in order to solve the problem that the existing big dipper communication bandwidth is limited and communication congestion is likely to occur.
The embodiment of the application provides an antenna control mainboard, antenna control mainboard is connected with server mainboard and a plurality of big dipper antenna respectively, the antenna control mainboard includes:
the interface conversion unit is connected with the Beidou antennas and is used for transmitting satellite data received from each Beidou antenna to the logic channel switching unit;
the logic channel switching unit is connected with the interface conversion unit and used for monitoring the state of each data receiving/sending channel and switching the channels according to a channel switching instruction;
and the control unit is respectively connected with the logic channel switching unit and the server mainboard and is used for determining a target data channel for receiving or sending data according to the state of the data receiving/sending channel monitored by the logic channel switching unit and generating a channel switching instruction according to the target data channel.
Optionally, the logic channel switching unit includes:
a channel state monitoring unit for monitoring the state of each data receiving/transmitting channel;
the matrix switching unit is connected with the channel state monitoring unit, and each port of the matrix switching unit is respectively connected with each data receiving/sending channel and is used for carrying out matrix mapping on each data receiving/sending channel;
and the interface unit is used for being connected with the control unit.
Optionally, the channel state monitoring unit includes:
the first channel state monitoring unit is connected with the interface conversion unit and used for monitoring the state of each Beidou antenna;
and the second channel state monitoring unit is connected with the server mainboard and used for monitoring the state of each server communication channel.
Optionally, the control unit includes:
and the port mapping unit is used for mapping and matching the ports of the matrix switching unit according to the states of the data receiving/sending channels and determining a target data channel.
Optionally, the matrix switching unit includes a programmable logic device.
Optionally, the interface unit includes an FPGA interface.
Optionally, the antenna control main board includes a plurality of interface conversion units, and the number of the interface conversion units is consistent with the number of the beidou antennas.
The embodiment of the application also provides a big dipper signal transceiver, includes: the Beidou antennas are used for receiving/transmitting Beidou satellite signals; the antenna control main board is respectively connected with the Beidou antenna and the server main board and is used for carrying out self-adaptive switching control on a data receiving and transmitting channel; and the server mainboard is connected with the master station system and used for data processing.
Optionally, the Beidou signal transceiver further comprises:
the power supply unit is respectively connected with the plurality of Beidou antennas, the antenna control mainboard and the server mainboard and is used for providing working power supply for the plurality of Beidou antennas, the antenna control mainboard and the server mainboard.
Implement an antenna control mainboard and big dipper signal transceiver that this application embodiment provided and have following beneficial effect:
according to the embodiment of the application, the Beidou antennas are connected, physical channels for receiving/sending data are effectively increased, meanwhile, the data channels are automatically switched based on busy and idle states of all the data receiving/sending channels, and management of the data channels is effectively achieved. The satellite data receiving and transmitting efficiency can be improved while the data receiving and transmitting quantity is increased, and the problem of communication congestion caused by limited Beidou communication bandwidth at present is solved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a Beidou signal transceiver provided in an embodiment of the present application;
fig. 2 is a schematic structural diagram of an antenna control motherboard according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of an antenna control motherboard according to another embodiment of the present application;
fig. 4 is a schematic structural diagram of an antenna control motherboard according to another embodiment of the present application;
fig. 5 is a mapping matrix of FPGA ports according to an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items. Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between descriptions and not necessarily for describing or implying relative importance.
It should also be appreciated that reference throughout this specification to "one embodiment" or "some embodiments," or the like, means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather "one or more but not all embodiments" unless specifically stated otherwise. The terms "comprising," "including," "having," and variations thereof mean "including, but not limited to," unless expressly specified otherwise.
Referring to fig. 1, in the embodiment of the present application, the Beidou signal transceiver shown in fig. 1 constitutes a Beidou signal transceiver provided in the embodiment of the present application, and the Beidou signal transceiver may be a Beidou commander, a Beidou subscriber, or a front-end server, which is not limited herein. By way of example and not limitation, the Beidou signal transceiver may be an electric power metering device for collecting electrical parameter values recorded by an electric meter.
As shown in fig. 1, in an embodiment of the present application, the Beidou signal transceiver may include a plurality of Beidou antennas 10, an antenna control main board 20 and a server main board 30.
Specifically, a plurality of big dipper antennas 10 can be connected with antenna control mainboard 20 through the RS422 bus, and antenna control mainboard 20 can be connected with server mainboard 30 through the RS232 bus.
Specifically, above-mentioned a plurality of big dipper antennas 10 can be big dipper multichannel antenna, and a big dipper antenna has a plurality of physical channels promptly and can realize signal transceiver function. Meanwhile, the Beidou multichannel antenna can receive a satellite radio navigation system (RNSS) (hereinafter referred to as RNSS signal), a satellite radio positioning service (RNSS) signal (hereinafter referred to as RDSS signal), and an RNSS signal and an RDSS signal.
Meanwhile, the Beidou multichannel antenna 10 can also be used for carrying out signal analysis processing on the received RNSS signals and then outputting data meeting the Beidou RNSS signal output format. The Beidou multichannel antenna 10 can also be used for carrying out signal analysis processing on the received RDSS signals and then outputting data meeting the Beidou RDSS signal output format.
In addition, the Beidou multichannel antenna can also be used for carrying out data fusion on the RNSS data and the RDSS data obtained through analysis, and then transmitting the fused data to the antenna control main board 20 through the RS422 bus.
The antenna control main board 20 controls the Beidou signal receiving and transmitting of the Beidou antennas and the switching of data receiving and transmitting channels according to the busy and idle states of the Beidou antennas 10, and transmits the received satellite data to the server main board 30.
The server motherboard 30 may implement data processing, such as data format processing, communication protocol processing, data forwarding, and data storage. The server motherboard 30 may be connected to the master station system through a network interface, and a communication protocol between the server motherboard 30 and the master station system needs to satisfy a relevant protocol in the industry. For example, in the power industry, the communication protocol between the server motherboard 30 and the master station system needs to satisfy the relevant power protocol.
In another embodiment of the present application, a secure encryption gateway is further connected between the server motherboard 30 and the master station system, and when the server motherboard 30 transmits data to the master station system, the secure encryption gateway needs to encrypt and transmit the data to be transmitted.
Above-mentioned big dipper signal transceiver can also include power supply, and above-mentioned power supply is used for supplying power for whole big dipper signal transceiver, can adopt 220v to exchange input, handles back output direct current through power supply module and gives a plurality of modules such as big dipper antenna, antenna control mainboard and server mainboard.
In an embodiment of the present application, the power supply may adopt dual-device hot standby to improve the reliability of the device.
Referring to fig. 2, fig. 2 is a schematic structural diagram of an antenna control motherboard according to an embodiment of the present application. As shown in fig. 2, the antenna control main board 20 may include an interface conversion unit 21, a logical channel switching unit 22, and a control unit 23.
The interface conversion unit 21 is connected to the plurality of Beidou antennas 10, and is configured to transmit satellite data received from each Beidou antenna 10 to the logic channel switching unit 22.
The logic channel switching unit 22 is connected to the interface switching unit 21, and is configured to monitor a state of each data receiving/sending channel, and perform channel switching according to a channel switching instruction.
The control unit 23 is connected to the logic channel switching unit 22 and the server motherboard 30, and is configured to determine a target data channel for receiving or sending data according to the state of the data receiving/sending channel monitored by the logic channel switching unit 22, and generate a channel switching instruction according to the target data channel.
In the embodiment of the application, the Beidou antenna has the functions of signal receiving and signal sending, namely, one Beidou antenna can be regarded as a data receiving/sending channel.
The interface conversion unit 21 can receive data transmitted from the Beidou antenna, or transmit data to be transmitted to the Beidou antenna.
In a specific application, a plurality of Beidou antennas can be connected with a plurality of interfaces of one interface conversion unit 21.
In an embodiment, the antenna control main board may include a plurality of interface conversion units, and the number of the interface conversion units may be consistent with the number of the Beidou antennas, that is, one Beidou antenna is connected to one interface conversion unit.
In the embodiment of the present application, the logic channel switching unit 22 is used to monitor the status of each data receiving/transmitting channel, that is, monitor the busy/idle status of each beidou antenna. The target data channel for transmitting/receiving data is then determined by the control unit 23 according to the status of the respective data reception/transmission channel. After the control unit 23 determines the target data channel, a channel switching instruction is generated according to the target data channel, and the generated channel switching instruction is sent to the logical channel switching unit 22. The logic channel switching unit 22, after receiving the channel switching instruction, performs channel switching according to the channel switching instruction, and switches the data channel for transmitting/receiving data to the target data channel.
It can be seen from the above that, the antenna control main board provided in the embodiment of the present application is connected to a plurality of Beidou antennas, so that the physical channels for receiving/sending data are effectively increased, and meanwhile, the data channels are automatically switched based on the busy/idle states of the respective receiving/sending data channels, thereby effectively realizing management of the data channels. The satellite data receiving and transmitting efficiency can be improved while the data receiving and transmitting quantity is increased, and the problem of communication congestion caused by limited Beidou communication bandwidth at present is solved.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an antenna control motherboard according to another embodiment of the present application. As shown in fig. 3, in the embodiment of the present application, the logic channel switching unit 22 may include:
a channel state monitoring unit 221, configured to monitor the state of each data receiving/transmitting channel.
And a matrix switching unit 222, each port of which is connected to each data receiving/transmitting channel, respectively, for performing matrix mapping on each data receiving/transmitting channel.
An interface unit 223 for connection with the control unit.
In a specific application, the server motherboard 30 is connected to the channel state monitoring unit 221 in the logic channel switching unit 22 of the antenna control motherboard 10 through a server communication channel.
In a specific application, the matrix switching unit 222 may include a programmable logic device.
In a specific application, the Programmable logic device may be an off-the-shelf Programmable Gate Array (FPGA).
In a specific application, the interface unit 223 may include an FPGA interface.
Referring to fig. 3, the channel state monitoring unit 221 may specifically include a first channel state monitoring unit 2211 and a second channel state monitoring unit 2212.
The first channel state monitoring unit 2211 is connected to the interface conversion unit 21, and is configured to monitor states of the respective beidou antennas.
And a second channel state monitoring unit 2212 connected to the server motherboard 30 and configured to monitor states of the communication channels of the servers.
In the embodiment of the application, in order to improve the working stability of the antenna control standard version, the matrixing control of the array is realized based on a programmable logic device (FPGA).
Referring to fig. 3, the control unit 23 includes a port mapping unit 231.
The port mapping unit 2321 is configured to perform mapping matching on the ports of the matrix switching unit according to the states of the data receiving/sending channels, and determine a target data channel.
For example, please refer to fig. 4, and fig. 4 is a schematic structural diagram of an antenna control motherboard according to an embodiment of the present application.
As shown in fig. 4, the interface conversion unit 21 includes a first interface conversion unit 211, a second interface conversion unit 212, a third interface conversion unit 213, and a fourth interface conversion unit 214. The first interface conversion unit 211 is connected with the first big dipper antenna 11, the second interface conversion unit 212 is connected with the second big dipper antenna 12, the third interface conversion unit 213 is connected with the third big dipper antenna 13, and the fourth interface conversion unit 214 is connected with the fourth big dipper antenna 14.
The first channel state monitoring unit 2211 includes a channel state monitoring unit a, a channel state monitoring unit B, a channel state monitoring unit C, and a channel state monitoring unit D. The first end of the channel state monitoring unit A is connected with the first interface conversion unit 211, the second end of the channel state monitoring unit A is connected with the first port P1 of the FPGA, the first end of the channel state monitoring unit B is connected with the second interface conversion unit 212, the second end of the channel state monitoring unit B is connected with the second port P2 of the FPGA, the first end of the channel state monitoring unit C is connected with the third interface conversion unit 213, the second end of the channel state monitoring unit C is connected with the third port P3 of the FPGA, the first end of the channel state monitoring unit D is connected with the fourth interface conversion unit 214, and the second end of the channel state monitoring unit B is connected with the fourth port P41 of the FPGA.
The second channel state monitoring unit 2212 includes a channel state monitoring unit E, a channel state monitoring unit F, a channel state monitoring unit G, and a channel state monitoring unit H. The first end of the channel state monitoring unit E is connected with the first server communication channel RS232_1, the second end of the channel state monitoring unit E is connected with the fifth port P5 of the FPGA, the first end of the channel state monitoring unit F is connected with the second server communication channel RS232_2, the second end of the channel state monitoring unit F is connected with the sixth port P6 of the FPGA, the first end of the channel state monitoring unit G is connected with the second server communication channel RS232_3, the second end of the channel state monitoring unit G is connected with the seventh port P7 of the FPGA, the first end of the channel state monitoring unit H is connected with the second server communication channel RS232_4, and the second end of the channel state monitoring unit H is connected with the eighth port P8 of the FPGA.
The following describes a channel switching control method for an antenna control main board based on fig. 4:
in a specific application, 8 ports of the FPGA can be subjected to communication control through the FPGA, and the first port P1 and the fifth port P5 are connected, denoted by P11, and mapped into a matrix as shown in fig. 5. Where P12 denotes the connection of the first port P1 with the sixth port P6, P13 denotes the connection of the first port P1 with the seventh port P7, P14 denotes the connection of the first port P1 with the eighth port P8, P21 denotes the connection of the second port P2 with the fifth port P5, and so on.
After determining the monitoring result of each channel state, the control unit 23 may map and match the ports of the matrix switching unit, and then determine which Beidou antenna the received Beidou data comes from, and according to the target data channel of the received or transmitted data.
For example, when the first port P1 is detected to be normal (which indicates that the first beidou antenna 11 connected to the first interface conversion unit 211 is idle) and when the fifth port P5 is detected to be normal (which indicates that the first server communication channel RS232_1 connected to the server motherboard is idle), the target data channel is determined as a data channel connected to the first port P1 and the fifth port P5, and the FPGA is controlled to control the first port P1 and the fifth port P5 to communicate with each other, so that the data receiving/sending channel is switched to the target data channel.
In another embodiment of the present application, the plurality of Beidou antennas may be a plurality of Beidou multichannel antennas. The control unit of the antenna control main board is also used for determining a transmitting/receiving channel of the Beidou multi-channel antenna according to the busy/idle state of the channel of the Beidou multi-channel antenna.
The antenna control mainboard has the advantages that the operational stability of the whole antenna control mainboard can be effectively improved by realizing the matrixing control of the array, meanwhile, the response speed can be improved by realizing the matrixing control based on the programmable logic device, and the data receiving and transmitting efficiency of the whole antenna control mainboard and the Beidou satellite transceiver is improved.
It should be noted that other manners may also be adopted to implement the switching control of the data channel, and the above embodiments are only examples and are not limited, and are not described herein again.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (10)

1. The utility model provides an antenna control mainboard, its characterized in that, antenna control mainboard is connected with server mainboard and a plurality of big dipper antenna respectively, the antenna control mainboard includes:
the interface conversion unit is connected with the Beidou antennas and is used for transmitting satellite data received from each Beidou antenna to the logic channel switching unit;
the logic channel switching unit is connected with the interface conversion unit and used for monitoring the state of each data receiving/sending channel and switching the channels according to a channel switching instruction;
and the control unit is respectively connected with the logic channel switching unit and the server mainboard and is used for determining a target data channel for receiving or sending data according to the state of the data receiving/sending channel monitored by the logic channel switching unit and generating a channel switching instruction according to the target data channel.
2. The antenna control motherboard of claim 1, wherein the logical channel switching unit comprises:
a channel state monitoring unit for monitoring the state of each data receiving/transmitting channel;
the matrix switching unit is connected with the channel state monitoring unit, and each port of the matrix switching unit is respectively connected with each data receiving/sending channel and is used for carrying out matrix mapping on each data receiving/sending channel;
and the interface unit is used for being connected with the control unit.
3. The antenna control motherboard of claim 2, wherein the channel status monitoring unit comprises:
the first channel state monitoring unit is connected with the interface conversion unit and used for monitoring the state of each Beidou antenna;
and the second channel state monitoring unit is connected with the server mainboard and used for monitoring the state of each server communication channel.
4. The antenna control motherboard of claim 2, wherein the control unit comprises:
and the port mapping unit is used for mapping and matching the ports of the matrix switching unit according to the states of the data receiving/sending channels and determining a target data channel.
5. The antenna control motherboard of claim 2 wherein said matrix switching unit comprises a programmable logic device.
6. The antenna control motherboard of claim 2 wherein said interface unit comprises an FPGA interface.
7. The antenna control main board according to claim 1, wherein the antenna control main board includes a plurality of interface conversion units, and the number of the interface conversion units is equal to the number of the Beidou antennas.
8. The antenna control main board according to any one of claims 1 to 7, wherein the control unit is further configured to determine a transmission/reception channel of the Beidou antenna according to a channel busy/idle status of the Beidou antenna.
9. Big dipper signal transceiver, its characterized in that, big dipper signal transceiver includes:
the Beidou antennas are used for receiving/transmitting Beidou satellite signals;
the antenna control main board is respectively connected with the Beidou antenna and the server main board and is used for carrying out self-adaptive switching control on a data receiving and transmitting channel;
and the server mainboard is connected with the master station system and used for data processing.
10. The Beidou signal transceiver of claim 9, further comprising:
the power supply unit is respectively connected with the plurality of Beidou antennas, the antenna control mainboard and the server mainboard and is used for providing working power supply for the plurality of Beidou antennas, the antenna control mainboard and the server mainboard.
CN202022763852.XU 2020-11-24 2020-11-24 Antenna control mainboard and big dipper signal transceiver Active CN213693702U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202022763852.XU CN213693702U (en) 2020-11-24 2020-11-24 Antenna control mainboard and big dipper signal transceiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202022763852.XU CN213693702U (en) 2020-11-24 2020-11-24 Antenna control mainboard and big dipper signal transceiver

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CN213693702U true CN213693702U (en) 2021-07-13

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