CN213690848U - Communication expansion circuit, communication expansion device and POS machine - Google Patents

Abstract

The application discloses communication expander circuit, communication expander device and POS machine, receive the first USB signal of first main equipment output through interface expander circuit, and according to the second USB signal of input host computer signal output, and according to third USB signal output fourth USB signal to first main equipment, first signal conversion circuit converts the second USB signal into first network signal, and convert the second network signal into third USB signal, second signal conversion circuit outputs fifth USB signal to second main equipment according to first network signal, and according to the sixth USB signal output of second main equipment output second network signal, first main equipment and second main equipment can communicate through first signal conversion circuit and second signal conversion circuit, the problem that can't communicate with second main equipment when first main equipment exports as the host computer has been solved.

Description

Communication expansion circuit, communication expansion device and POS machine

Technical Field

The application belongs to the technical field of communication expansion, and particularly relates to a communication expansion circuit, a communication expansion device and a POS machine.

Background

A conventional point of sale (POS) terminal only has a Universal Serial Bus (USB) communication interface, and thus the POS terminal can only be used as a host or a device, and thus cannot communicate with other host devices when the POS terminal is used as the host.

SUMMERY OF THE UTILITY MODEL

The present application is directed to a communication expansion circuit, which is used to solve the problem that a conventional host device cannot communicate with other host devices.

A first aspect of an embodiment of the present application provides a communication expansion circuit, including:

the interface expansion circuit is configured to receive a first USB signal output by first master equipment, output a second USB signal according to the input host signal and output a fourth USB signal to the first master equipment according to a third USB signal;

the first signal conversion circuit is connected with the interface expansion circuit and is configured to convert the second USB signal into a first network signal and convert a second network signal into a third USB signal; and

and the second signal conversion circuit is connected with the first signal conversion circuit and is configured to output a fifth USB signal to second master equipment according to the first network signal and output the second network signal according to a sixth USB signal output by the second master equipment.

In an embodiment, the first signal conversion circuit includes a first ethernet chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a first common-mode inductor, a second common-mode inductor, a third common-mode inductor, and a fourth common-mode inductor;

the data positive terminal of the first Ethernet chip and the data negative terminal of the first Ethernet chip are respectively connected to the second USB signal receiving terminal of the first signal conversion circuit and the third USB signal output terminal of the first signal conversion circuit, the first network receiving terminal of the first Ethernet chip is connected with the first terminal of the first resistor, the second network receiving terminal of the first Ethernet chip is connected with the first terminal of the third resistor, the first network sending terminal of the first Ethernet chip is connected with the first terminal of the second resistor, the second network sending terminal of the first Ethernet chip is connected with the first terminal of the fourth resistor, the second terminal of the first resistor, the first terminal of the first capacitor and the first terminal of the third capacitor are connected in common, the second terminal of the second resistor, the first terminal of the second capacitor and the first terminal of the fourth capacitor are connected in common, a second end of the third capacitor is connected to a first end of the first common mode inductor, a second end of the fourth capacitor is connected to a fourth end of the first common mode inductor, a second end of the first common mode inductor is connected to a first end of the second common mode inductor and connected to a first network signal output end of the first signal conversion circuit, a third end of the first common mode inductor is connected to a third end of the second common mode inductor and connected to a first network signal output end of the first signal conversion circuit, a second end of the third resistor, a first end of the fifth capacitor and a first end of the seventh capacitor are connected in common, a second end of the fourth resistor, a first end of the sixth capacitor and a first end of the eighth capacitor are connected in common, a second end of the seventh capacitor is connected to a first end of the third common mode inductor, and a second end of the eighth capacitor is connected to a fourth end of the third common mode inductor, the second end of the third common mode inductor is connected with the first end of the fourth common mode inductor and connected to the second network signal input end of the first signal conversion circuit, the third end of the third common mode inductor is connected with the third end of the fourth common mode inductor and connected to the second network signal input end of the first signal conversion circuit, and the second end of the first capacitor, the second end of the second capacitor, the second end of the fifth capacitor, the second end of the sixth capacitor, the second end of the second common mode inductor, the fourth end of the second common mode inductor, the second end of the fourth common mode inductor and the fourth end of the fourth common mode inductor are all connected with a power ground.

In an embodiment, the second signal conversion circuit includes a second ethernet chip, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a fifth common-mode inductor, a sixth common-mode inductor, a seventh common-mode inductor, and an eighth common-mode inductor;

the data positive terminal of the second ethernet chip and the data negative terminal of the second ethernet chip are respectively connected to the first network signal receiving terminal of the second signal conversion circuit and the second network signal output terminal of the second signal conversion circuit, the first network receiving terminal of the second ethernet chip is connected to the first terminal of the fifth resistor, the second network receiving terminal of the second ethernet chip is connected to the first terminal of the seventh resistor, the first network transmitting terminal of the second ethernet chip is connected to the first terminal of the sixth resistor, the second network transmitting terminal of the second ethernet chip is connected to the first terminal of the eighth resistor, the second terminal of the fifth resistor, the first terminal of the ninth capacitor and the first terminal of the eleventh capacitor are connected together, the second terminal of the sixth resistor, the first terminal of the tenth capacitor and the first terminal of the twelfth capacitor are connected together, a second end of the eleventh capacitor is connected to a first end of the fifth common-mode inductor, a second end of the twelfth capacitor is connected to a fourth end of the fifth common-mode inductor, a second end of the fifth common-mode inductor is connected to a first end of the sixth common-mode inductor and is connected to a fifth USB signal output end of the second signal conversion circuit, a third end of the fifth common-mode inductor is connected to a third end of the sixth common-mode inductor and is connected to a fifth USB signal output end of the second signal conversion circuit, a second end of the seventh resistor, a first end of the thirteenth capacitor and a first end of the fifteenth capacitor are connected in common, a second end of the eighth resistor, a first end of the fourteenth capacitor and a first end of the sixteenth capacitor are connected in common, and a second end of the fifteenth capacitor is connected to a first end of the seventh common-mode inductor, a second end of the sixteenth capacitor is connected to a fourth end of the seventh common-mode inductor, a second end of the seventh common-mode inductor is connected to a first end of the eighth common-mode inductor and connected to a sixth USB signal input end of the second signal conversion circuit, a third end of the seventh common-mode inductor is connected to a third end of the eighth common-mode inductor and connected to a sixth USB signal input end of the second signal conversion circuit, and a second end of the ninth capacitor, a second end of the tenth capacitor, a second end of the thirteenth capacitor, a second end of the fourteenth capacitor, a second end of the sixth common-mode inductor, a fourth end of the sixth common-mode inductor, a second end of the eighth common-mode inductor, and a fourth end of the eighth common-mode inductor are all connected to a power ground.

In one embodiment, the interface expansion circuit comprises a signal expansion component and N serial interface circuits;

the signal expansion component is configured to output a second USB signal and N seventh USB signals according to the first USB signal, and output a fourth USB signal according to the third USB signal and a device USB signal;

the Mth serial interface circuit is connected with the signal expansion assembly and is configured to transfer the Mth seventh USB signal to the slave equipment and transfer an equipment USB signal output by the slave equipment;

wherein M is an integer greater than 1 and less than or equal to N + 1.

In one embodiment, the signal extension component includes an ethernet controller chip, a ninth resistor, a tenth resistor, a first transient diode, and a second transient diode;

the uplink data positive terminal of the ethernet controller chip, the first terminal of the ninth resistor, and the first terminal of the first transient diode are connected in common, the second terminal of the ninth resistor is connected to the first USB signal input terminal of the signal expansion component and the fourth USB signal output terminal of the signal expansion component, the uplink data negative terminal of the ethernet controller chip, the first terminal of the tenth resistor, and the first terminal of the second transient diode are connected in common, the second terminal of the tenth resistor is connected to the first USB signal input terminal of the signal expansion component and the fourth USB signal output terminal of the signal expansion component, the first downlink data positive terminal of the ethernet controller chip and the first downlink data negative terminal of the ethernet controller chip are connected to the second USB signal output terminal of the signal expansion component and the third USB signal input terminal of the signal expansion component, an mth downlink data positive end of the ethernet controller chip and an mth downlink data negative end of the ethernet controller chip are connected to a seventh USB signal output end of the signal expansion component and a device USB signal input end of the signal expansion component, and a second end of the first transient diode and a second end of the second transient diode are both connected to a power ground;

wherein M is an integer greater than 1.

In one embodiment, the serial interface circuit includes an eleventh resistor, a twelfth resistor, a third transient diode, and a fourth transient diode;

the first end of the eleventh resistor and the first end of the third transient diode are connected to a seventh USB signal output end of the serial interface circuit and a device USB signal input end of the serial interface circuit, the first end of the twelfth resistor and the first end of the fourth transient diode are connected to a seventh USB signal output end of the serial interface circuit and a device USB signal input end of the serial interface circuit, and the second end of the eleventh resistor and the second end of the twelfth resistor are both connected to a seventh USB signal input end of the serial interface circuit and a device USB signal output end of the serial interface circuit.

A second aspect of the embodiments of the present application provides a communication expansion apparatus, including the communication expansion circuit according to any one of the first aspect.

A third aspect of the embodiments of the present application provides a POS device including the communication expansion apparatus according to any one of the second aspects; wherein the POS machine is the first master device.

Compared with the prior art, the application has the beneficial effects that: the interface expansion circuit receives a first USB signal output by the first master device and outputs a second USB signal according to an input host signal, and outputs a fourth USB signal to the first master device according to the third USB signal, the first signal conversion circuit converts the second USB signal into a first network signal, and converts the second network signal into a third USB signal, the second signal conversion circuit outputs a fifth USB signal to the second master device according to the first network signal, and outputs a second network signal in accordance with a sixth USB signal output from the second master device, the first signal conversion circuit and the second signal conversion circuit corresponding to slave devices serving as the first master device and the second master device, therefore, the first main device and the second main device can communicate through the first signal conversion circuit and the second signal conversion circuit, and the problem that the first main device cannot communicate with the second main device when the first main device serves as a host for output is solved.

Drawings

Fig. 1 is a schematic block diagram of a first example of a communication expansion circuit provided in an embodiment of the present application;

fig. 2 is a schematic block diagram of a second example of a communication expansion circuit provided in an embodiment of the present application;

fig. 3 is a schematic diagram of an exemplary circuit of a communication expansion circuit according to an embodiment of the present disclosure.

Detailed Description

In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

Fig. 1 shows a first exemplary schematic block diagram of a communication expansion circuit provided in an embodiment of the present application, and for convenience of description, only the parts related to the embodiment are shown, and detailed descriptions are as follows:

the communication expansion circuit includes an interface expansion circuit 110, a first signal conversion circuit 120, and a second signal conversion circuit 130.

The interface expansion circuit 110 is configured to receive the first USB signal output by the first master device 210, output a second USB signal according to the input host signal, and output a fourth USB signal to the first master device 210 according to the third USB signal.

The first signal conversion circuit 120 is connected to the interface expansion circuit 110, and is configured to convert the second USB signal into the first network signal and convert the second network signal into the third USB signal.

The second signal conversion circuit 130 is connected to the first signal conversion circuit 120, and configured to output the fifth USB signal to the second master device 220 according to the first network signal, and output the second network signal according to the sixth USB signal output by the second master device 220.

In this embodiment, the first master device 210 and the second master device 220 both serve as a host, when the first master device 210 outputs a first USB signal, the interface expansion circuit 110 outputs a second USB signal to the first signal conversion circuit 120 according to the first USB signal, the first signal conversion circuit 120 converts the second USB signal into a first network signal and outputs the first network signal to the second signal conversion circuit 130, the second signal conversion circuit 130 converts the first network signal into a fifth USB signal and outputs the second master device 220, when the second master device 220 outputs a sixth USB signal, the second signal conversion circuit 130 converts the sixth USB signal into a second network signal and outputs the second network signal to the first signal conversion circuit 120, the first signal conversion circuit 120 converts the second network signal into a third USB signal and outputs the third USB signal to the interface expansion circuit 110, the interface expansion circuit 110 outputs a fourth USB signal to the first master device 210 according to the third USB signal, the first signal conversion circuit 120 and the second signal conversion circuit 130 correspond to a slave device serving as a slave device of the first master device 210 and a slave device of the second master device 220, and therefore the first master device 210 and the second master device 220 can communicate through the first signal conversion circuit 120 and the second signal conversion circuit 130, thereby solving the problem that the first master device 210 cannot communicate with the second master device 220 when outputting as a host.

Referring to fig. 3, in an embodiment, the first signal conversion circuit 120 includes a first ethernet chip U1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a first common-mode inductor L1, a second common-mode inductor L2, a third common-mode inductor L3, and a fourth common-mode inductor L4.

The data positive terminal DM1 of the first Ethernet chip U1 and the data negative terminal PM1 of the first Ethernet chip U1 are both connected to the second USB signal receiving terminal of the first signal conversion circuit 120 and the third USB signal output terminal of the first signal conversion circuit 120, the first network receiving terminal MDI- [0]1 of the first Ethernet chip U1 is connected to the first terminal of the first resistor R1, the second network receiving terminal MDI- [1]1 of the first Ethernet chip U1 is connected to the first terminal of the third resistor R3, the first network transmitting terminal MDI + [0]1 of the first Ethernet chip U1 is connected to the first terminal of the second resistor R2, the second network transmitting terminal MDI + [1]1 of the first Ethernet chip U1 is connected to the first terminal of the fourth resistor R4, the second terminal of the first resistor R1, the first terminal of the first capacitor C1 and the first terminal of the third capacitor C3 are connected together, the second terminal R35 of the second resistor R2 is connected to the first terminal of the third capacitor C3, A first end of the second capacitor C2 and a first end of the fourth capacitor C4 are commonly connected, a second end of the third capacitor C3 is connected to a first end of the first common mode inductor L1, a second end of the fourth capacitor C4 is connected to a fourth end of the first common mode inductor L1, a second end of the first common mode inductor L1 is connected to a first end of the second common mode inductor L2 and to the first network signal output end of the first signal conversion circuit 120, a third end of the first common mode inductor L1 is connected to a third end of the second common mode inductor L2 and to the first network signal output end of the first signal conversion circuit 120, a second end of the third resistor R3, a first end of the fifth capacitor C5 and a first end of the seventh capacitor C7 are commonly connected, a second end of the fourth resistor R4, a first end of the sixth capacitor C6 and a first end of the eighth capacitor C8 are commonly connected, a second end of the seventh capacitor C7 is connected to the second end of the third common mode inductor L3, a second end of the eighth capacitor C8 is connected to the fourth end of the third common-mode inductor L3, a second end of the third common-mode inductor L3 is connected to the first end of the fourth common-mode inductor L4 and to the second network signal input end of the first signal conversion circuit 120, a third end of the third common-mode inductor L3 is connected to the third end of the fourth common-mode inductor L4 and to the second network signal input end of the first signal conversion circuit 120, and the second end of the first capacitor C1, the second end of the second capacitor C2, the second end of the fifth capacitor C5, the second end of the sixth capacitor C6, the second end of the second common-mode inductor L2, the fourth end of the second common-mode inductor L2, the second end of the fourth common-mode inductor L4, and the fourth end of the fourth common-mode inductor L4 are all connected to a power ground.

Referring to fig. 3, in an embodiment, the second signal conversion circuit 130 includes a second ethernet chip U2, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a sixteenth capacitor C16, a fifth common-mode inductor L5, a sixth common-mode inductor L6, a seventh common-mode inductor L7, and an eighth common-mode inductor L8.

The data positive terminal DM2 of the second Ethernet chip U2 and the data negative terminal PM2 of the second Ethernet chip U2 are respectively connected to the first network signal receiving terminal of the second signal conversion circuit 130 and the second network signal output terminal of the second signal conversion circuit 130, the first network receiving terminal MDI- [0]2 of the second Ethernet chip U2 is connected with the first terminal of the fifth resistor R5, the second network receiving terminal MDI- [1]2 of the second Ethernet chip U2 is connected with the first terminal of the seventh resistor R7, the first network transmitting terminal MDI + [0]2 of the second Ethernet chip U2 is connected with the first terminal of the sixth resistor R6, the second network transmitting terminal MDI + [1]2 of the second Ethernet chip U2 is connected with the first terminal of the eighth resistor R8, the second terminal of the fifth resistor R5, the first terminal of the ninth capacitor C9 and the first terminal of the eleventh capacitor C11 are connected together, the second terminal of the sixth resistor R6 is connected with the first terminal of the sixth capacitor C11, A first end of a tenth capacitor C10 and a first end of a twelfth capacitor C12 are commonly connected, a second end of an eleventh capacitor C11 is connected to a first end of a fifth common-mode inductor L5, a second end of the twelfth capacitor C12 is connected to a fourth end of a fifth common-mode inductor L5, a second end of a fifth common-mode inductor L5 is connected to a first end of a sixth common-mode inductor L6 and to a fifth USB signal output end of the second signal conversion circuit 130, a third end of the fifth common-mode inductor L5 is connected to a third end of a sixth common-mode inductor L6 and to a fifth USB signal output end of the second signal conversion circuit 130, a second end of a seventh resistor R7, a first end of a thirteenth capacitor C13 and a first end of a fifteenth capacitor C15 are commonly connected, a second end of an eighth resistor R8, a first end of a fourteenth capacitor C14 and a first end of a sixteenth capacitor C16 are commonly connected, a second end of a fifteenth capacitor C15 is connected to a third end of a common-mode inductor L7, a second end of the sixteenth capacitor C16 is connected to the fourth end of the seventh common-mode inductor L7, a second end of the seventh common-mode inductor L7 is connected to the first end of the eighth common-mode inductor L8 and connected to the sixth USB signal input end of the second signal conversion circuit 130, a third end of the seventh common-mode inductor L7 is connected to the third end of the eighth common-mode inductor L8 and connected to the sixth USB signal input end of the second signal conversion circuit 130, and a second end of the ninth capacitor C9, a second end of the tenth capacitor C10, a second end of the thirteenth capacitor C13, a second end of the fourteenth capacitor C14, a second end of the sixth common-mode inductor L6, a fourth end of the sixth common-mode inductor L6, a second end of the eighth common-mode inductor L8, and a fourth end of the eighth common-mode inductor L8 are all connected to the power ground.

Referring to fig. 2, in one embodiment, the interface expansion circuit 110 includes a signal expansion element 111 and N serial interface circuits (denoted by 112 … 11 m).

And a signal expansion component 111 configured to output the second USB signal and the N seventh USB signals according to the first USB signal, and output the fourth USB signal according to the third USB signal and the device USB signal.

The mth serial interface circuit is connected to the signal expansion component 111, and configured to forward the mth seventh USB signal to the slave device and forward a device USB signal output by the slave device.

Wherein N is an integer greater than or equal to 1.

In this embodiment, the signal expansion component 111 outputs the second USB signal to the first signal conversion circuit 120 and outputs the N seventh USB signals to the N serial interface circuits respectively according to the first USB signal output by the first master device 210, the mth serial interface circuit switches the mth fifth master signal to the slave device and switches the device USB signal output by the slave device to the signal expansion component 111, and the signal expansion component 111 outputs the fourth USB signal according to the third USB signal and the device USB signal, thereby implementing the communication between the first master device 210 and the second master device 220 as well as between the first master device and the N slave devices.

Referring to fig. 3, in an embodiment, the signal expansion element 111 includes an ethernet controller chip U3, a ninth resistor R9, a tenth resistor R10, a first transient diode TVS1 and a second transient diode TVS 2.

The first ends of the upstream data positive terminal USBDM0 and the ninth resistor R9 of the ethernet controller chip U3 and the first end of the first transient diode TVS1 are connected in common, the second end of the ninth resistor R9 is connected to the first USB signal input terminal of the signal expansion component 111 and the fourth USB signal output terminal of the signal expansion component 111, the first ends of the upstream data negative terminal USBPM0 and the tenth resistor R10 of the ethernet controller chip U3 and the first end of the second transient diode TVS2 are connected in common, the second end of the tenth resistor R10 is connected to the first USB signal input terminal of the signal expansion component 111 and the fourth USB signal output terminal of the signal expansion component 111, the first downstream data positive terminal USBDM1 of the ethernet controller chip U3 and the first downstream data negative terminal USBPM1 of the ethernet controller chip U3 are connected to the second USB signal output terminal of the signal expansion component 111 and the third USB signal input terminal of the signal expansion component 111, the mth downstream data positive terminal USBDMm of the ethernet controller chip U3 and the mth downstream data negative terminal USBPMm of the ethernet controller chip U3 are connected to the seventh USB signal output terminal of the signal expansion component 111 and the device USB signal input terminal of the signal expansion component 111, and the second terminal of the first transient diode TVS1 and the second terminal of the second transient diode TVS2 are both connected to the power ground.

Wherein M is an integer greater than 1 and less than or equal to N + 1.

Referring to fig. 3, in an embodiment, the serial interface circuit includes an eleventh resistor R11, a twelfth resistor R12, a third transient diode TVS3 and a fourth transient diode TVS 4.

A first terminal of the eleventh resistor R11 and a first terminal of the third transient diode TVS3 are connected to the seventh USB signal output terminal of the serial interface circuit and the device USB signal input terminal of the serial interface circuit, a first terminal of the twelfth resistor R12 and a first terminal of the fourth transient diode TVS4 are connected to the seventh USB signal output terminal of the serial interface circuit and the device USB signal input terminal of the serial interface circuit, and a second terminal of the eleventh resistor R11 and a second terminal of the twelfth resistor R12 are connected to the seventh USB signal input terminal of the serial interface circuit and the device USB signal output terminal of the serial interface circuit.

To explain the communication expansion circuit shown in fig. 3 with reference to the working principle, when the first master device 210 outputs the first USB signal, the first USB signal is respectively input to the upstream data positive terminal USBDM0 of the ethernet controller chip U3 and the upstream data negative terminal USBPM0 of the ethernet controller chip U3 through the ninth resistor R9 and the tenth resistor R10, the ethernet controller chip U3 outputs the mth seventh USB signal at the mth downstream data positive terminal USBDMm of the ethernet controller chip U3 and the mth downstream data negative terminal USBPM of the ethernet controller chip U3 according to the first USB signal, the mth seventh USB signal is respectively output to the slave device through the eleventh resistor R11 and the twelfth resistor R12, the ethernet controller chip U3 further outputs the second USB signal at the first downstream data positive terminal USBDM1 of the ethernet controller chip U3 and the first downstream data negative terminal USBDM1 of the ethernet controller chip U3 according to the first USB signal, the second USB signal enters the first ethernet chip U1 through the data positive terminal DM1 of the first ethernet chip U1 and the data negative terminal PM1 of the first ethernet chip U1, the first ethernet chip U1 converts the second USB signal into a first network signal, and the first network signal MDI + [0]1 of the first ethernet chip U1 or the second network signal MDI + [1]1 of the first ethernet chip U1 correspondingly outputs the first network signal MDI- [0]2 of the second ethernet chip U2 or the second network signal MDI- [1]2 of the second ethernet chip U2, and the data positive terminal DM2 of the second ethernet chip U2 and the negative data terminal PM2 of the second ethernet chip U2 output a fifth USB signal to the second host device 220 according to the first network signal; when the second host device 220 outputs the sixth USB signal, the sixth USB signal is inputted to the second ethernet chip U2 through the data positive terminal DM2 of the second ethernet chip U2 and the data negative terminal PM2 of the second ethernet chip U2, the second ethernet chip U2 outputs the second network signal according to the sixth USB signal, the second network signal is outputted to the first network receiving terminal MDI- [0]1 of the first ethernet chip U1 or the first network receiving terminal MDI- [1]1 of the first ethernet chip U1 through the first network transmitting terminal MDI + [0]2 of the second ethernet chip U2 or the second network transmitting terminal MDI + [1]2 of the second ethernet chip U2, the first ethernet chip U1 converts the second network signal into the third USB signal and outputs the third USB signal to the ethernet controller chip U3, the ethernet controller chip U3 outputs the fourth USB signal from the first host device to the first host device 210 according to the third USB signal and the USB signal outputted from the slave device, it is thereby achieved that the first master device 210 can communicate with both the slave device and the second master device 220 as a master at the same time when acting as a master.

The present embodiment further provides a communication expansion device, including the communication expansion circuit according to any of the above embodiments, because the communication expansion device according to this embodiment includes the communication expansion circuit according to any of the above embodiments, the communication expansion device according to this embodiment at least includes the beneficial effects corresponding to the communication expansion circuit according to any of the above embodiments.

The embodiment of the present application further provides a POS device, including the communication expansion device according to any of the above embodiments, wherein the POS device is the first main device 210, and because the POS device according to this embodiment includes the communication expansion device according to any of the above embodiments, the POS device according to this embodiment at least includes the beneficial effects corresponding to the communication expansion device according to any of the above embodiments.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (8)

1. A communication expansion circuit, comprising:

the interface expansion circuit is configured to receive a first USB signal output by a first master device, output a second USB signal according to the first USB signal, and output a fourth USB signal to the first master device according to a third USB signal;

the first signal conversion circuit is connected with the interface expansion circuit and is configured to convert the second USB signal into a first network signal and convert a second network signal into a third USB signal; and

and the second signal conversion circuit is connected with the first signal conversion circuit and is configured to output a fifth USB signal to second master equipment according to the first network signal and output the second network signal according to a sixth USB signal output by the second master equipment.

2. The communication expansion circuit of claim 1, wherein the first signal conversion circuit comprises a first ethernet chip, a first resistor, a second resistor, a third resistor, a fourth resistor, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a first common mode inductor, a second common mode inductor, a third common mode inductor, and a fourth common mode inductor;

the data positive terminal of the first Ethernet chip and the data negative terminal of the first Ethernet chip are respectively connected to the second USB signal receiving terminal of the first signal conversion circuit and the third USB signal output terminal of the first signal conversion circuit, the first network receiving terminal of the first Ethernet chip is connected with the first terminal of the first resistor, the second network receiving terminal of the first Ethernet chip is connected with the first terminal of the third resistor, the first network sending terminal of the first Ethernet chip is connected with the first terminal of the second resistor, the second network sending terminal of the first Ethernet chip is connected with the first terminal of the fourth resistor, the second terminal of the first resistor, the first terminal of the first capacitor and the first terminal of the third capacitor are connected in common, the second terminal of the second resistor, the first terminal of the second capacitor and the first terminal of the fourth capacitor are connected in common, a second end of the third capacitor is connected to a first end of the first common mode inductor, a second end of the fourth capacitor is connected to a fourth end of the first common mode inductor, a second end of the first common mode inductor is connected to a first end of the second common mode inductor and connected to a first network signal output end of the first signal conversion circuit, a third end of the first common mode inductor is connected to a third end of the second common mode inductor and connected to a first network signal output end of the first signal conversion circuit, a second end of the third resistor, a first end of the fifth capacitor and a first end of the seventh capacitor are connected in common, a second end of the fourth resistor, a first end of the sixth capacitor and a first end of the eighth capacitor are connected in common, a second end of the seventh capacitor is connected to a first end of the third common mode inductor, and a second end of the eighth capacitor is connected to a fourth end of the third common mode inductor, the second end of the third common mode inductor is connected with the first end of the fourth common mode inductor and connected to the second network signal input end of the first signal conversion circuit, the third end of the third common mode inductor is connected with the third end of the fourth common mode inductor and connected to the second network signal input end of the first signal conversion circuit, and the second end of the first capacitor, the second end of the second capacitor, the second end of the fifth capacitor, the second end of the sixth capacitor, the second end of the second common mode inductor, the fourth end of the second common mode inductor, the second end of the fourth common mode inductor and the fourth end of the fourth common mode inductor are all connected with a power ground.

3. The communication expansion circuit of claim 1, wherein the second signal conversion circuit comprises a second ethernet chip, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth capacitor, a tenth capacitor, an eleventh capacitor, a twelfth capacitor, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a sixteenth capacitor, a fifth common-mode inductor, a sixth common-mode inductor, a seventh common-mode inductor, and an eighth common-mode inductor;

the data positive terminal of the second ethernet chip and the data negative terminal of the second ethernet chip are respectively connected to the first network signal receiving terminal of the second signal conversion circuit and the second network signal output terminal of the second signal conversion circuit, the first network receiving terminal of the second ethernet chip is connected to the first terminal of the fifth resistor, the second network receiving terminal of the second ethernet chip is connected to the first terminal of the seventh resistor, the first network transmitting terminal of the second ethernet chip is connected to the first terminal of the sixth resistor, the second network transmitting terminal of the second ethernet chip is connected to the first terminal of the eighth resistor, the second terminal of the fifth resistor, the first terminal of the ninth capacitor and the first terminal of the eleventh capacitor are connected together, the second terminal of the sixth resistor, the first terminal of the tenth capacitor and the first terminal of the twelfth capacitor are connected together, a second end of the eleventh capacitor is connected to a first end of the fifth common-mode inductor, a second end of the twelfth capacitor is connected to a fourth end of the fifth common-mode inductor, a second end of the fifth common-mode inductor is connected to a first end of the sixth common-mode inductor and is connected to a fifth USB signal output end of the second signal conversion circuit, a third end of the fifth common-mode inductor is connected to a third end of the sixth common-mode inductor and is connected to a fifth USB signal output end of the second signal conversion circuit, a second end of the seventh resistor, a first end of the thirteenth capacitor and a first end of the fifteenth capacitor are connected in common, a second end of the eighth resistor, a first end of the fourteenth capacitor and a first end of the sixteenth capacitor are connected in common, and a second end of the fifteenth capacitor is connected to a first end of the seventh common-mode inductor, a second end of the sixteenth capacitor is connected to a fourth end of the seventh common-mode inductor, a second end of the seventh common-mode inductor is connected to a first end of the eighth common-mode inductor and connected to a sixth USB signal input end of the second signal conversion circuit, a third end of the seventh common-mode inductor is connected to a third end of the eighth common-mode inductor and connected to a sixth USB signal input end of the second signal conversion circuit, and a second end of the ninth capacitor, a second end of the tenth capacitor, a second end of the thirteenth capacitor, a second end of the fourteenth capacitor, a second end of the sixth common-mode inductor, a fourth end of the sixth common-mode inductor, a second end of the eighth common-mode inductor, and a fourth end of the eighth common-mode inductor are all connected to a power ground.

4. The communication expansion circuit of claim 1, wherein the interface expansion circuit comprises a signal expansion component and N serial interface circuits;

the signal expansion component is configured to output a first USB signal and N seventh USB signals according to the first USB signal, and output a fourth USB signal according to the third USB signal and a device USB signal;

the Mth serial interface circuit is connected with the signal expansion assembly and is configured to transfer the Mth seventh USB signal to the slave equipment and transfer an equipment USB signal output by the slave equipment;

wherein M is an integer greater than 1 and less than or equal to N + 1.

5. The communication expansion circuit of claim 4, wherein the signal expansion component comprises an Ethernet controller chip, a ninth resistor, a tenth resistor, a first transient diode, and a second transient diode;

the uplink data positive terminal of the ethernet controller chip, the first terminal of the ninth resistor, and the first terminal of the first transient diode are connected in common, the second terminal of the ninth resistor is connected to the first USB signal input terminal of the signal expansion component and the fourth USB signal output terminal of the signal expansion component, the uplink data negative terminal of the ethernet controller chip, the first terminal of the tenth resistor, and the first terminal of the second transient diode are connected in common, the second terminal of the tenth resistor is connected to the first USB signal input terminal of the signal expansion component and the fourth USB signal output terminal of the signal expansion component, the first downlink data positive terminal of the ethernet controller chip and the first downlink data negative terminal of the ethernet controller chip are connected to the second USB signal output terminal of the signal expansion component and the third USB signal input terminal of the signal expansion component, an mth downlink data positive end of the ethernet controller chip and an mth downlink data negative end of the ethernet controller chip are connected to a seventh USB signal output end of the signal expansion component and a device USB signal input end of the signal expansion component, and a second end of the first transient diode and a second end of the second transient diode are both connected to a power ground;

wherein M is an integer greater than 1.

6. The communication expansion circuit of claim 4, wherein the serial interface circuit comprises an eleventh resistor, a twelfth resistor, a third transient diode, and a fourth transient diode;

the first end of the eleventh resistor and the first end of the third transient diode are connected to a seventh USB signal output end of the serial interface circuit and a device USB signal input end of the serial interface circuit, the first end of the twelfth resistor and the first end of the fourth transient diode are connected to a seventh USB signal output end of the serial interface circuit and a device USB signal input end of the serial interface circuit, and the second end of the eleventh resistor and the second end of the twelfth resistor are both connected to a seventh USB signal input end of the serial interface circuit and a device USB signal output end of the serial interface circuit.

7. A communication expansion apparatus comprising the communication expansion circuit according to any one of claims 1 to 6.

8. A POS machine comprising the communication extension device of claim 7;

wherein the POS machine is the first master device.

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