CN213637179U

CN213637179U - Power supply switching circuit and wearable equipment

Info

Publication number: CN213637179U
Application number: CN202022657361.7U
Authority: CN
Inventors: 刘辉
Original assignee: Goertek Techology Co Ltd
Current assignee: Goertek Techology Co Ltd
Priority date: 2020-11-17
Filing date: 2020-11-17
Publication date: 2021-07-06
Anticipated expiration: 2030-11-17

Abstract

The utility model discloses a power supply switching circuit and wearable equipment, which comprises a power supply module, a voltage switching module and a main chip; the power supply module comprises a plurality of paths for outputting different power supplies, each path of power supply module is provided with an enabling end, and the power supply module enables the power supply module to run and outputs the power supplies when receiving an effective enabling signal; the voltage switching module is connected with the power supply module and selects one path of power supply to output; the main chip receives the power supply output by the voltage switching module and generates a corresponding enable signal and a corresponding control signal according to a working mode to be entered; the enabling signal is transmitted to the power supply modules to control one path of power supply module to enable and run; and the control signal is sent to the voltage switching module to control the voltage switching module to select the power supply output by the power supply module capable of running. Adopt the utility model discloses a power supply switching circuit can reduce the system consumption as far as possible, prolongs the time of endurance of equipment.

Description

Power supply switching circuit and wearable equipment

Technical Field

The utility model belongs to the technical field of power supply circuit, specifically speaking relates to a multichannel power supply's selection switching circuit.

Background

The wearable device is a portable electronic product that can be worn directly on the person or integrated into the clothing or accessories of the person, for example, a smart watch, a smart bracelet, a smart ring, etc. Many wearable devices currently have multiple operating modes, such as a normal operating mode, a standby mode, an off mode, and the like. Under a normal working mode, most functional modules in a main chip of the wearable device can be started to operate, and more data processing and operation tasks need to be executed, so that the power consumption of the main chip is large, and a large power supply needs to be provided for the main chip. In the standby mode, many functional modules in the main chip are closed, the data processing amount is small, and only a small power supply is needed to be provided for the main chip. In the shutdown mode, only the real-time clock module in the main chip always needs to be powered all the time, the IO interface module does not work and is in a high-resistance state, the power consumption of the main chip is extremely low at the moment, and a smaller power supply can be used for supplying power.

In order to meet different power consumption requirements of a main chip under different working modes, when an internal power circuit of the existing wearable device is designed, a switching power supply is often adopted to convert voltage output by a built-in battery of the device, and an output power supply of the wearable device is adjusted according to the current working mode of the main chip so as to generate a power supply source meeting the requirement of the main chip under the current working mode.

The main problems of the conventional power circuit design method are as follows: firstly, during the period that the main chip enters the standby mode, as the switching power supply needs to keep a normal operation state and continuously outputs the power supply, the total power consumption of the system is not too low, and the endurance time of the wearable device is shortened; secondly, when the main chip needs to be switched from the shutdown mode to the normal operating mode, the switching power supply needs to adjust the output power supply of the switching power supply from the extremely low shutdown power supply to the higher startup power supply at first, and then the main chip can be controlled to be switched to the normal operating mode, so that the startup time of the device is longer, and the use experience of a user is influenced.

Disclosure of Invention

An object of the utility model is to provide a power supply switching circuit to reduce the system consumption as far as possible, prolong the time of endurance of equipment.

In order to solve the technical problem, the utility model discloses a following technical scheme realizes:

in one aspect, the present invention provides a power switching circuit, which includes a power module, a voltage switching module and a main chip; the power supply module comprises a plurality of paths for outputting different power supplies, each path of power supply module is provided with an enabling end, and the power supply module can run and output the power supplies when receiving an effective enabling signal; the voltage switching module is connected with the power supply module and selects one path of power supply to output; the main chip receives the power supply output by the voltage switching module and generates a corresponding enable signal and a corresponding control signal according to a working mode to be entered; the enabling signal is transmitted to the power supply modules to control one path of power supply module to enable and run; and the control signal is sent to the voltage switching module to control the voltage switching module to select the power supply output by the power supply module capable of running.

In some embodiments of the present application, the power module includes two paths, namely a first power module and a second power module; the first power supply module is used for outputting a starting power supply, and the starting power supply is a power supply required by the main chip in a normal working mode; the second power module is used for outputting a standby power supply, and the standby power supply is a power supply required by the main chip in a standby mode. When the main chip needs to enter a normal working mode, the main chip can control the first power supply module to enable and run, and receive a starting power supply output by the first power supply module so as to meet the running requirement of the main chip; meanwhile, the main chip controls the second power supply module to be turned off so as to reduce the power consumption of the system.

In some embodiments of the present application, the enable signals of the first power module and the second power module are both active high. The enabling end of the first power supply is connected with the pull-up circuit, and the first power supply works in order to ensure that the enabling end at the position is at a high level before the main chip does not perform effective output configuration on the IO port of the main chip or when the wearable device is in a shutdown state. The enabling end of the second power supply module is connected with the pull-down circuit, and the enabling end at the position is at a low level and the second power supply does not work before the main chip does not perform effective output configuration on the IO port of the main chip or when the wearable device is in a shutdown state. By adopting the circuit design, when the wearable equipment is in the shutdown state, the power supply for starting the main chip is provided, so that when the wearable equipment is started from the shutdown state, the main chip can be powered on immediately, and the normal operation mode is quickly switched from the shutdown mode, thereby accelerating the starting speed of the equipment and improving the user experience.

In some embodiments of the present application, the level pull-up circuit includes a pull-up resistor connected between an enable terminal of the first power supply module and a system power supply; the system power supply is battery voltage output by a battery or generated by battery voltage conversion; by adopting the circuit design, the first power supply module can be ensured to be normally enabled as long as the battery is electrified; the level pull-down circuit comprises a pull-down resistor which is connected between the enabling end of the second power supply module and the system ground.

In some embodiments of the present application, the first power module and the second power module each preferably employ a dc-dc conversion module or a voltage stabilization module, and include a power input terminal for receiving a system power and converting the system power into a power on or a standby power during an enable operation.

In some embodiments of the present application, the voltage switching module includes a normally open path and a normally closed path, and the normally open path is preferably connected between the second power supply module and a main chip, and the normally closed path is preferably connected between the first power supply module and the main chip. By adopting the circuit design, the voltage switching module can be ensured to always transmit the starting power supply output by the first power supply module to the main chip before receiving no effective control signal.

In some embodiments of the present application, the voltage switching module includes an enable terminal through which the control signal is received; the high level of the enabling end of the voltage switching module is effective and is connected with a level pull-down circuit. By adopting the circuit design, the power supply output by the first power supply module is ensured to be transmitted to the main chip before the main chip does not effectively configure the IO port of the main chip or when the main chip is in a shutdown mode, so that the power supply design requirements of the main chip under different working modes are met.

In some embodiments of the present application, the main chip outputs enable signals through two IO ports thereof, which are a first IO port and a second IO port respectively; the first IO port is connected with an enabling end of the first power supply module and outputs an enabling signal required by the first power supply module; the second IO port is connected with an enabling end of the second power supply module and outputs an enabling signal required by the second power supply module; and the enabling end of the voltage switching module is connected with the second IO port of the main chip, and the enabling signal output by the second IO port is used as the control signal to switch and control the on-off states of the normally open path and the normally closed path of the voltage switching module. By adopting the circuit design, the power supply design requirement can be met, and meanwhile, the IO port resource of the main chip can be saved.

In some embodiments of the present application, the enable terminal of the voltage switching module is connected to system ground through a pull-down resistor.

In another aspect, the present invention further provides a wearable device, including a battery and a power switching circuit; the power supply switching circuit comprises a power supply module, a voltage switching module and a main chip; the power supply module comprises a plurality of paths for outputting different power supplies, each path of power supply module is provided with an enabling end, and the power supply module can run and output the power supplies when receiving an effective enabling signal; the voltage switching module is connected with the power supply module and selects one path of power supply to output; the main chip receives the power supply output by the voltage switching module and generates a corresponding enable signal and a corresponding control signal according to a working mode to be entered; the enabling signal is transmitted to the power supply modules to control one path of power supply module to enable and run; and the control signal is sent to the voltage switching module to control the voltage switching module to select the power supply output by the power supply module capable of running.

Compared with the prior art, the utility model discloses an advantage is with positive effect: the utility model discloses a power supply switching circuit is to main chip required different power supply under different mode, design multichannel mutually independent power module, each way power module only is used for exporting a power supply, each way power module is automatic switch-over under the enable control of main chip, the alternative gets into the running state, generate main chip at the current required power supply of mode that perhaps will get into, and supply power for main chip under the gating of voltage switching module. By adopting the circuit design, the different power consumption requirements of the main chip under different working modes can be met, and the power consumption of the system can be effectively controlled because only one power supply module runs at the same time; particularly, after the main chip enters the standby mode, because the power supply needed by the standby mode is smaller, the power consumption generated by the power module outputting the standby power is very low, and in addition, other power modules basically have no power consumption due to shutdown, the total power consumption of the system is extremely low, and the power consumption is extremely low. The power supply switching circuit is applied to wearable equipment, so that the power consumption of a battery in the equipment can be obviously reduced, the endurance time of the equipment is prolonged, and the use experience of a user is improved.

Other features and advantages of the present invention will become more apparent from the following detailed description of embodiments of the invention, which is to be read in connection with the accompanying drawings.

Drawings

In order to more clearly illustrate the technical solution in the embodiments of the present invention, the drawings required to be used in the embodiments will be briefly described below. It is obvious that the drawings in the following description are some embodiments of the invention, and that for a person skilled in the art, other drawings can be derived from them without inventive effort.

Fig. 1 is a schematic block circuit diagram of an embodiment of a power switching circuit according to the present invention;

fig. 2 is a detailed circuit schematic diagram of an embodiment of the power switching circuit shown in fig. 1.

Detailed Description

The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.

It should be noted that, in the description of the present invention, the terms "connected" and "connected" should be interpreted broadly unless explicitly stated or limited otherwise. For example, they may be directly connected or indirectly connected through an intermediate. The specific meaning of the above terms in the present invention can be understood by those skilled in the art according to specific situations. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

In this embodiment, a power switching circuit designed for reducing system power consumption is provided for electronic products (e.g., wearable devices, mobile phones, tablet computers, etc.) having different operating modes (e.g., a normal operating mode, a standby mode, a shutdown mode, etc.) and different power supplies required by a main chip in different operating modes, as shown in fig. 1, the power switching circuit includes multiple power modules for outputting different power supplies, a voltage switching module for selectively switching the power supplies output by the multiple power modules, and a main chip for performing coordinated control on the power modules and the voltage switching module.

The configuration number of the power modules can be specifically determined according to the types of different power supplies required by the main chip when the main chip enters different working modes. A wearable device having three different operation modes, i.e., a normal operation mode, a standby mode, and a shutdown mode, is taken as an example for explanation. For the wearable equipment, three power supply modules can be arranged on a PCB of the equipment to respectively output a starting power supply, a standby power supply and a shutdown power supply. Each path of power supply module is designed to be provided with an enabling end, when the main chip needs to enter a normal working mode, an enabling signal is output to the power supply module outputting the starting power supply, the path of power supply module is controlled to run in an enabling mode, and the starting power supply is output to meet the power consumption requirement of the main chip in normal running. Meanwhile, the main chip controls the other two paths of power supply modules to stop, so that the power consumption of the system can be reduced to a certain extent. Similarly, when the main chip needs to enter the standby mode, the enable signal is output to the power module outputting the standby power, the power module in the path is controlled to run, and the two paths of power modules outputting the starting power and the shutdown power are controlled to stop, so that the standby power consumption requirement of the main chip is met, and the system power consumption is greatly reduced. When the main chip needs to enter a shutdown mode, an enabling signal is output to a power module which outputs a shutdown power supply, the power module is controlled to run in an enabling mode, and two paths of power modules which output a startup power supply and a standby power supply are controlled to stop.

As a preferred embodiment, in order to enable the main chip to quickly enter a normal operating state from a shutdown state to accelerate the startup speed of the wearable device, in this embodiment, two paths of power modules are preferably arranged on a PCB of the wearable device, and as shown in fig. 1, the two paths of power modules are respectively defined as a first power module and a second power module. The first power module is used for outputting a power-on power VCC1, and the second power module is used for outputting a standby power VCC 2. Because the device has a large power-on current when being powered on, the power-on power VCC1 output by the first power module is used to supply power to the main chip in the power-off mode in this embodiment, so that the power supply of the main chip in the power-off state is consistent with the power supply in the normal operating state (i.e., a higher power supply is also used to supply power to the main chip in the power-off state), thereby realizing the fast power-on of the wearable device.

In some embodiments, the power module may be designed by using a dc-dc conversion module or a voltage stabilizing module, as shown in fig. 2. IN fig. 2, U1 is a first power module, which includes a power input terminal U1_ IN, an enable terminal U1_ EN, a power output terminal U1_ OUT, and a ground terminal U1_ GND. The power input terminal U1_ IN receives a system power supply VSYS, which may be a battery voltage output by a built-IN battery of the wearable device or generated by converting the battery voltage output by the battery. The enabling terminal U1_ EN is connected to one of the IO ports of the main chip U4, for example, the first IO port IO1, and when receiving an effective enabling signal EN1 output by the first IO port IO1, the first power module U1 enables operation, converts a system power supply VSYS into a power supply VCC1 required by the main chip U4 in a normal operating mode, and outputs the power supply VCC through the power output terminal U1_ OUT. Ground terminal U1_ GND is connected to system ground.

Similarly, U2 is a second power module, which includes a power input terminal U2_ IN, an enable terminal U2_ EN, a power output terminal U2_ OUT, and a ground terminal U2_ GND. Wherein, the power input end U2_ IN receives a system power supply VSYS; the enable terminal U2_ EN is connected to another IO port of the main chip U4, for example, the second IO port IO2, and when receiving an effective enable signal EN2 output by the second IO port IO2, the second power module U2 enables operation, converts the system power VSYS into a standby power VCC2 required by the main chip U4 in a standby mode, and outputs the standby power VCC2 through the power output terminal U2_ OUT; ground terminal U2_ GND is connected to system ground.

For the power supplies output by the power supply modules, the voltage switching module is designed to selectively switch the power supplies, so that a proper power supply is selected according to the working mode of the main chip and transmitted to the main chip to supply power to the main chip.

As a preferred embodiment, the voltage switching module may specifically adopt an analog switch chip U3 for circuit design, as shown in fig. 2. The analog switch chip U3 includes a power supply terminal VDD, an enable terminal EN, a normally closed terminal NC, a normally open terminal NO, a common terminal COM, and a ground terminal GND. The power supply end VDD receives a system power supply VSYS, and the system power supply VSYS is used for supplying power to the analog switch chip U3; the enable terminal EN is connected with the main chip U4, receives a control signal output by the main chip U4 and enables operation under the control of the main chip U4; the normally-closed end NC is connected with a power output end U1_ OUT of the first power module U1 and receives a power-on power VCC 1; the normally open end NO is connected with a power output end U2_ OUT of the second power supply module U2 and receives a standby power supply VCC 2; the common terminal COM is connected with a power supply pin VCC of the main chip U4, and transmits a selected path of power supply VCC1 or VCC2 to the main chip U4 to supply power to the main chip U4; the ground terminal GND is connected to the system ground.

In the analog switch chip U3, a normally closed end NC and a common end COM form a normally closed path, and the normally closed end NC and the common end COM are closed and conducted under the condition that the analog switch chip U3 is not enabled, so that a starting power VCC1 is transmitted to the main chip U4; and when the analog switch chip U3 is enabled to operate, the circuit is disconnected, and the connection path between the power-on power VCC1 and the main chip U4 is cut off. On the contrary, the normally open end NO and the common end COM form a normally open path, and the normally open end NO and the common end COM are disconnected under the condition that the analog switch chip U3 is not enabled, so that the connection path between the standby power supply VCC2 and the main chip U4 is cut off; and the standby power VCC2 is transmitted to the main chip U4 by being turned on when the analog switch chip U3 is enabled.

In the embodiment, the first power module U1, the second power module U2, and the analog switch chip U3 all operate under enable control, and in order to enable the enable ends of the first power module U1, the second power module U2, and the analog switch chip U3 to be in a fixed level state before the main chip U4 does not effectively configure its IO port or when the wearable device is in an off state, it is ensured that the main chip U4 can obtain a suitable power supply at any time, in this embodiment, the enable ends of the first power module U1, the second power module U2, and the analog switch chip U3 are respectively configured with a level pull-up circuit or a level pull-down circuit.

Specifically, for the first power module U1, the enable terminal U1_ EN is active high, the first power module U1 is active when the enable signal EN1 is high, and the first power module U1 is inactive when the enable signal EN1 is low. The enabling end U1_ EN of the first power module U1 is connected to a system power supply VSYS through a pull-up resistor R1, so that the enabling end U1_ EN of the first power module U1 is ensured to be at a high level and the first power module U1 works to provide a starting power supply VCC1 for the main chip U4 before the main chip U4 does not perform effective output configuration on an IO port of the main chip U4 or when the wearable device is in a shutdown state.

For the second power module U2, the enable terminal U2_ EN is active high, the second power module U2 is active when the enable signal EN2 is high, and the second power module U2 is inactive when the enable signal EN2 is low. The enabling end U2_ EN of the second power module U2 is connected to the system ground through the pull-down resistor R2, so that it can be ensured that the enabling end U2_ EN of the second power module U2 is at a low level and the second power module U2 does not work before the main chip U4 does not perform effective output configuration on its IO port or when the wearable device is in an off state, thereby reducing system power consumption.

For the analog switch chip U3, the high level of the enable terminal EN is effective, and when the enable terminal EN is high level, the analog switch is switched to a normally open path, namely COM is connected to NO; when the EN end of the enable end is at low level, the analog switch is switched to a normally closed path, namely COM is connected to NC. The enabling end EN of the analog switch chip U3 is connected to the system ground through the pull-down resistor R3, so that the fact that the enabling end EN of the analog switch chip U3 is at a low level, a normally closed circuit is conducted, and the COM end is a VCC1 power supply can be guaranteed before the main chip U4 does not perform effective output configuration on the IO port of the main chip U4 or when the wearable device is in a shutdown state. Namely, the power supply VCC1 is used to supply power to the main chip U4 in the power-off state.

As a preferred embodiment, the present embodiment adopts the first power module U1, the second power module U2, and the analog switch chip U3 to implement the specific design of the power switching circuit. As shown in fig. 2, since the enable states of the second power module U2 and the analog switch chip U3 are synchronized, the enable signal EN2 output by the main chip U4 through the second IO port IO2 can be also used as the enable terminal EN of the analog switch chip U3 to control the enable state of the analog switch chip U3 while being transmitted to the enable terminal U2_ EN of the second power module U2, so that the purpose of saving interface resources of the main chip U4 and simplifying circuit design can be achieved.

The operation principle of the power switching circuit of the present embodiment is specifically described below with reference to the schematic circuit diagram shown in fig. 2.

When the wearable device is normally turned on, the main chip U4 outputs the enable signal EN1 at a high level through the first IO port IO1, and configures the second IO port IO2 to be at a low level. At this time, the first power module U1 is enabled to operate, converts the system power VSYS into the power VCC1, and transmits the power to the normally-off end NC of the analog switch chip U3. During this period, since the second IO port IO2 of the main chip U4 is at a low level, the second power module U2 and the analog switch chip U3 are in an off state, the second power module U2 has no power output, the normally closed path of the analog switch chip U3 is turned on, the normally open path is turned off, and the power-on power VCC1 output by the first power module U1 is gated to supply power to the main chip U4, so as to meet the power demand of the main chip U4 in the normal operating mode.

When the wearable device needs to be switched into a standby mode, the main chip U4 configures the first IO port IO1 to be at a low level, and outputs a high-level enable signal EN2 through the second IO port IO2, and the high-level enable signal EN2 is respectively transmitted to the enable terminal U2_ EN of the second power module U2 and the enable terminal EN of the analog switch chip U3 to control the enable operation of the second power module U2 and the analog switch chip U3. At this time, after the second power module U2 is enabled, the system power VSYS is converted into the standby power VCC2, and is transmitted to the normally open end NC of the analog switch chip U3. After the analog switch chip U3 is enabled to operate, its normally open path is closed, and the normally closed path is opened, and then the standby power VCC2 output by the second power module U2 is transmitted to the power pin VCC of the main chip U4, supplying power to the main chip U4, so as to satisfy the power demand of the main chip U4 in the standby mode.

When the wearable device needs to be switched into the shutdown mode, the main chip U4 outputs the enable signal EN1 at a high level through the first IO port IO1, and configures the second IO port IO2 to be at a low level. At this time, the first power module U1 is enabled to operate, and outputs a power-on power VCC 1; the second power module U2 stops operating, and the analog switch chip U3 switches to its normally closed path and turns on, transmits the power VCC1 to the main chip U4, and utilizes the power VCC1 to supply power to the main chip U4 during the shutdown mode, so as to implement the quick startup function of the wearable device.

After the main chip U4 enters the shutdown mode, the IO port module does not work any more and is in a high-impedance state, and at this time, since the enable terminal U1_ EN of the first power module U1 is pulled up to a high potential (the potential of the system power supply VSYS) through the pull-up resistor R1, the first power module U1 maintains the enabled operation state, and continues to output the startup power supply VCC 1. During this time, the enable terminal U2_ EN of the second power module U1 goes into an inactive state due to being pulled down to a low potential (zero potential of the system ground) through the pull-down resistor R2, so as to reduce the system power consumption. Meanwhile, the enable terminal EN of the analog switch chip U3 is also pulled down to a low potential (zero potential of system ground) through the pull-down resistor R3, so that the normally closed path of the analog switch chip U3 is turned on, and the power-on VCC1 output by the first power module U1 is accurately transmitted to the main chip U4, thereby ensuring that the main chip U4 is always powered on.

The power supply switching circuit of this embodiment configures different power supply outputs according to the difference of wearable device's mode of operation, and the voltage switching module of back level is resupplied, can realize the automatic switch-over of main chip to multichannel power supply. Therefore, the main chip adopts a larger power supply to supply power in the non-standby mode and adopts a smaller power supply to supply power in the standby mode, so that the power consumption of the system can be reduced, the working time of the equipment can be prolonged, and the cruising ability of the equipment can be improved.

Of course, the above description is not intended to limit the present invention, and the present invention is not limited to the above examples, and the changes, modifications, additions or substitutions made by those skilled in the art within the scope of the present invention should also belong to the protection scope of the present invention.

Claims

1. A power switching circuit, comprising:

the power supply module comprises a plurality of paths and is used for outputting different power supplies, each path of power supply module is provided with an enabling end, and the power supply module enables the power supply module to run and outputs the power supplies when receiving an effective enabling signal;

the voltage switching module is connected with the power supply module and selects one path of power supply to output;

the main chip receives the power supply output by the voltage switching module and generates a corresponding enable signal and a corresponding control signal according to a working mode to be entered; the enabling signal is transmitted to the power supply modules to control one path of power supply module to enable and run; and the control signal is sent to the voltage switching module to control the voltage switching module to select the power supply output by the power supply module capable of running.

2. The power switching circuit according to claim 1, wherein the power module comprises two paths, respectively:

the first power supply module is used for outputting a starting power supply, and the starting power supply is a power supply required by the main chip in a normal working mode;

and the second power supply module is used for outputting a standby power supply, and the standby power supply is a power supply required by the main chip in a standby mode.

3. The power switching circuit according to claim 2, wherein the enable signal received by the power module is active high, a level pull-up circuit is connected to the enable terminal of the first power module, and a level pull-down circuit is connected to the enable terminal of the second power module.

4. The power switching circuit of claim 3,

the level pull-up circuit comprises a pull-up resistor which is connected between an enabling end of the first power supply module and a system power supply; the system power supply is battery voltage output by a battery or generated by battery voltage conversion;

the level pull-down circuit comprises a pull-down resistor which is connected between the enabling end of the second power supply module and the system ground.

5. The power switching circuit of claim 4, wherein the first power module and the second power module are both DC-DC conversion modules or voltage stabilization modules, and comprise power input terminals for receiving the system power and converting the system power into a power-on power or a standby power during an enable operation.

6. The power switching circuit according to any one of claims 2 to 5, wherein the voltage switching module comprises a normally open path and a normally closed path, the normally open path being connected between the second power module and a main chip, the normally closed path being connected between the first power module and a main chip.

7. The power switching circuit of claim 6, wherein the voltage switching module comprises an enable terminal through which the control signal is received; the high level of the enabling end of the voltage switching module is effective, and the enabling end of the voltage switching module is connected with a level pull-down circuit.

8. The power switching circuit according to claim 7, wherein the main chip outputs enable signals through two IO ports thereof, which are respectively:

the first IO port is connected with the enabling end of the first power supply module and outputs an enabling signal required by the first power supply module;

the second IO port is connected with the enabling end of the second power supply module and outputs an enabling signal required by the second power supply module;

the enabling end of the voltage switching module is connected with the second IO port of the main chip, and the enabling signal output by the second IO port is used as the control signal to switch and control the on-off states of the normally open path and the normally closed path of the voltage switching module.

9. The power switching circuit of claim 7,

the enabling end of the voltage switching module is connected with the system ground through a pull-down resistor.

10. A wearable device comprising a battery and the power switching circuit of any of claims 1-9.