CN213482678U

CN213482678U - Pulse generator

Info

Publication number: CN213482678U
Application number: CN202022909628.7U
Authority: CN
Inventors: 孟仕
Original assignee: Tianjin Qingyi Automation Technology Co ltd
Current assignee: Tianjin Qingyi Automation Technology Co ltd
Priority date: 2020-03-13
Filing date: 2020-12-06
Publication date: 2021-06-18
Anticipated expiration: 2030-12-06

Abstract

The utility model discloses a pulse generator relates to pulse generator technical field, contains on-the-spot signal interface, input protection circuit, output protection circuit, solid state power relay, opto-coupler isolating circuit, etherCAT communication controller, first etherCAT communication interface, second etherCAT communication interface, microcontroller module, the utility model discloses can not satisfy the high-speed communication and the quick response demand of industry internet to traditional unit pulse generator or pulse generator based on the bus, the utility model provides a pulse signal generator based on high-speed real-time industry ethernet adopts etherCAT to realize equipment and external control system's communication to realize high-speed data exchange and stable control. The utility model discloses an opto-coupler isolation circuit, because the environment is abominable, when gathering the signal, accomplish simultaneously and keep apart at the industrial field effectively.

Description

Pulse generator

Technical Field

The utility model relates to a pulse generator technical field especially relates to a pulse generator.

Background

The pulse generator is an instrument widely applied in the fields of power electronics, industrial control, robots and the like. The pulse generator is usually designed by adopting an analog circuit, a microprocessor and the like, a PWM isolation dimming circuit and an LED dimming driving power supply are designed based on discrete analog devices such as an operational amplifier, a triode and the like, a development scheme for multiplexing an I/O output frequency and a PWM signal with controllable duty ratio based on an HCS12 singlechip enhanced timer is provided, and the problem of insufficient PWM output channels caused by hardware limitation is solved. A general PWM signal generator with configurable dead zones is designed based on an embedded SoC, and flexible control strategy configuration is realized. A circuit built by adopting a discrete analog device generates PWM signals, so that the number of components is large, the circuit is complex, and the debugging is difficult. The microprocessor or the SoC and the like generate PWM signals, the microprocessor can meet the requirements when the number of signal channels is small, and when the number of the PWM signals is more than 4, large delay is generated due to sequential execution of processor instructions, so that the waveform of the PWM signals is unstable. Therefore, the FPGA can be adopted to design the PWM signal generator, FPGA instructions are executed in parallel, the increase of signal channels does not influence the speed and the stability of pulse signals, high-precision control is realized, and the FPGA is utilized to design equipment capable of outputting multiple paths of PWM signals simultaneously and is applied to different occasions respectively. The pulse signal generators CAN only operate independently and singly and cannot be connected to a field control system through a bus network to realize flexible and quick configuration, so that a pulse signal output method and device based on the CAN are designed in literature, PWM output frequency and duty ratio are updated through CAN messages, but the communication rate of the CAN bus is slow, and the CAN bus is difficult to apply to occasions with high-speed control requirements. With the advance and development of industrial 4.0 and intelligent manufacturing, networked, intelligent and digitized industrial internet systems are gradually and widely applied, and new application requirements are put forward on basic control equipment.

SUMMERY OF THE UTILITY MODEL

The utility model aims to solve the technical problem that can not satisfy the high-speed communication and the quick response demand of industry internet to traditional unit impulse generator or based on impulse generator of bus, the utility model provides a pulse signal generator based on high-speed real-time industry ethernet adopts opto-coupler isolation circuit, because the environment is abominable effectively at industrial site, when gathering the signal, accomplishes to keep apart simultaneously and accomplishes to keep apart

The utility model discloses a solve above-mentioned technical problem and adopt following technical scheme:

a pulse generator comprises a field signal interface, an input protection circuit, an output protection circuit, a solid-state power relay, an optical coupling isolation circuit, an EtherCAT communication controller, a first EtherCAT communication interface, a second EtherCAT communication interface, a microcontroller module and a power supply module;

the optical coupling isolation circuit comprises an optical coupler U1, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor and a triode V1, wherein the input end of an IN1 of the optical coupler U1 is connected with one end of the second resistor through the first resistor, the other end of the second resistor is connected with a +12V voltage end of the optical coupler U1, the positive output end of the optical coupler U1 is connected with a collector of a triode V1 through the third resistor, the negative output end of the optical coupler U1 is connected with one end of the fourth resistor and one end of the fifth resistor, the other end of the fourth resistor is connected with a base of the triode V1, and the other end of the fifth resistor is connected with an emitter of the triode V1;

the field signal interface is connected with the optical coupling isolation circuit through the input protection circuit, the field signal interface is connected with the optical coupling isolation circuit through the output protection circuit and the solid state power relay in sequence, the optical coupling isolation circuit is connected with the microcontroller module, the EtherCAT communication controller is respectively connected with the first EtherCAT communication interface and the second EtherCAT communication interface, and the EtherCAT communication controller and the power supply module are respectively connected with the microcontroller module;

the microcontroller module comprises an LS1C processor, a power supply, a debugging port JTAG, a serial port UART, a memory SDRAM, a Nand Flash, an SPI Flash, a serial communication SPI interface, a reset circuit and a general GPIO interface which are respectively connected with the LS1C processor;

the EtherCAT communication controller comprises an ET1100 module, an EEPROM module, a PHY chip, a clock module and a network

Transformer, RJ45 interface; the ET1100 module is connected with the RJ45 interface through the PHY chip and the network transformer in sequence, and the EEPROM module and the clock module are respectively connected with the ET1100 module.

As a further preferred scheme of pulse generator, first EtherCAT communication interface adopts the MII interface, EtherCAT communication controller passes through MII interface connection PHY chip.

As a further preferable embodiment of the pulse generator of the present invention, the second EtherCAT communication interface adopts an EBUS interface.

As a further preferable solution of the pulse generator of the present invention, the LS1C processor is a godson processor LS1C 0300A.

The utility model adopts the above technical scheme to compare with prior art, have following technological effect:

1. the utility model relates to a pulse generator, including microcontroller module, EtherCAT communication controller, EtherCAT communication interface, opto-coupler isolating circuit, solid state power relay and field signal interface, it chooses for use real-time ethernet EtherCAT to communicate, EtherCAT is the field bus system of the open architecture based on ethernet, have that the real-time nature is strong, the topology is flexible, the synchronous precision is high, the cable is redundant, possess characteristics such as function safety agreement function;

2. the utility model discloses an opto-coupler isolation circuit, because the environment is abominable, when gathering the signal, accomplish simultaneously and keep apart at the industrial field effectively.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following embodiments or prior arts will be described

While the drawings that are needed to be utilized in the description of the invention have been described briefly, it should be apparent that the drawings in the description that follows are illustrative of the invention

It will be apparent to one of ordinary skill in the art that the embodiments may be practiced without the use of the inventive faculty

From these figures further figures are obtained.

FIG. 1 is a schematic diagram of the overall structure of the pulse generator of the present invention;

fig. 2 is a circuit diagram of the optical coupling isolation circuit of the present invention;

fig. 3 is a schematic diagram of the structure of the microcontroller module according to the present invention;

fig. 4 is a schematic structural diagram of the EtherCAT communication controller of the present invention.

Detailed Description

The technical scheme of the utility model is further explained in detail with the attached drawings as follows:

the technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

A pulse generator is shown in figure 1 and comprises a field signal interface, an input protection circuit, an output protection circuit, a solid state power relay, an optical coupling isolation circuit, an EtherCAT communication controller, a first EtherCAT communication interface, a second EtherCAT communication interface and a microcontroller module, wherein the field signal interface is connected with the optical coupling isolation circuit through the input protection circuit, the field signal interface is sequentially connected with the optical coupling isolation circuit through the output protection circuit and the solid state power relay, the optical coupling isolation circuit is connected with the microcontroller module, the EtherCAT communication controller is respectively connected with the first EtherCAT communication interface and the second EtherCAT communication interface, and the EtherCAT communication controller is connected with the microcontroller module.

The pulse generator is used for providing pulse control signals for industrial control field side equipment. Because industrial control equipment requires comparatively high to the real-time, the utility model discloses choose for use real-time ethernet etherCAT to communicate, etherCAT is with the field bus system of the open architecture based on ethernet, has characteristics such as the real-time strong, the topology is nimble, synchronous precision is high, the cable is redundant, possess function safety agreement function. The pulse generator comprises a microprocessor module, an EtherCAT communication controller, an EtherCAT communication interface, an optical coupling isolation circuit (hereinafter referred to as an optical coupler), a solid-state power relay and a field signal interface. The EtherCAT communication controller receives the command signal through the EtherCAT communication interface and analyzes the command signal to generate an analysis signal; the microprocessor configures an output mode of the pulse signal according to the analytic signal and outputs the pulse signal in a corresponding mode, and the pulse signal is electrically isolated by the optocoupler and then output to the solid-state power relay; the solid-state power relay is used for improving the loading capacity of the pulse signal, and the output pulse signal is output to the field side equipment through the field signal interface.

The pulse generator adopts an EtherCAT bus to communicate with the host through an EtherCAT communication controller, and the EtherCAT communication controller is used for realizing a medium access control function of EtherCAT communication, is responsible for processing EtherCAT data frames and realizes data exchange between an EtherCAT master station and slave stations. The microprocessor is used for realizing the functions of logic calculation, coordination control and the like of the pulse output card.

The EtherCAT communication controller and the communication interface of the pulse generator comprise two modes: MII interface and EBUS interface. When an MII interface is adopted, the EtherCAT communication controller is connected with the PHY chip through the MII interface and communicates with the outside through an RJ45 interface. When the EBUS interface is adopted, the EtherCAT communication controller directly adopts the EBUS bus to communicate with the outside.

The solid-state power relay can realize the protection function of the output circuit, including overheat protection, short-circuit protection and the like, and outputs a diagnosis signal to the microprocessor, and the diagnosis signal is input to the microprocessor after being electrically isolated by the optical coupler, so that the diagnosis function of the output circuit is realized, and the working reliability of the pulse generator is improved. And the pulse signal output by the solid-state power relay passes through the output protection circuit and is then sent to the field side equipment through the field signal interface.

As shown IN fig. 2, the optical coupling isolation circuit includes opto-coupler U1, first resistance, the second resistance, the third resistance, the fourth resistance, fifth resistance and triode V1, the one end of connecting the second resistance through first resistance on the IN1 input end of opto-coupler U1, the +12V voltage end of opto-coupler U1 is connected to the other end of second resistance, triode V1's collecting electrode is connected through the third resistance to opto-coupler U1's positive output end, the one end of fourth resistance and the one end of fifth resistance are connected to opto-coupler U1's negative output end, triode V1's base is connected to the other end of fourth resistance, triode V1's projecting pole is connected to the other end of fifth resistance. The utility model discloses an opto-coupler isolation circuit, because the environment is abominable, when gathering the signal, accomplish simultaneously and keep apart at the industrial field effectively.

Preferably, as shown in fig. 3, the microcontroller module includes an LS1C processor, and a power supply, a debug port JTAG, a serial port UART, a memory SDRAM, a Nand Flash, an SPI Flash, a serial communication SPI interface, a reset circuit, and a general GPIO interface respectively connected thereto. Based on the self-controllable factor of the equipment, the pulse signal generator selects a Loongson processor LS1C0300A, LS1C is based on a GS232 processor core, and rich peripheral interfaces are provided. The minimum system circuit block diagram adopting LS1C is shown in FIG. 2, and includes power supply, debug port JTAG, serial port UART, memory SDRAM, Nand Flash, SPI Flash, serial communication SPI interface, reset circuit and general GPIO interface. Wherein the SPI interface is connected to an EtherCAT slave station controller ET 1100; and the GPIO is connected to the pulse output circuit and the diagnosis circuit, controls the alarm circuit and realizes an alarm function when a fault occurs. LS1C internally integrates RTC function, therefore, the RTC _ Clk pin is connected with an external clock source 32.768 kHz crystal oscillator, and an RTC battery is provided, so that accurate timing in power-down condition is kept. The SDRAM is connected to LS1C through a parallel bus for storing data and loaded programs, etc. during operation of the processor. LS1C has multiple start modes, and is configured with a corresponding pin to select the start mode, in the design, pins Nand _ D4 and Nand _ D5 are respectively connected to a high level and a low level, LS1C is set to start from SPI Flash, and a PMON guidance system is loaded.

Preferably, the solid state power relay comprises an overheat protection circuit and a short circuit protection circuit. The optical coupler realizes the electrical isolation between the field side equipment and the internal circuit.

The EtherCAT communication circuit realizes the transceiving function of EtherCAT signals, as shown in fig. 4, the EtherCAT communication controller includes an ET1100 module, an EEPROM module, a PHY chip, a clock module, a network transformer, and an RJ45 interface; the ET1100 module is connected with the RJ45 interface through the PHY chip and the network transformer in sequence, and the EEPROM module and the clock module are respectively connected with the ET1100 module. ET1100 is a dedicated chip for implementing an EtherCAT data link layer protocol, processes EtherCAT data frames, and provides a data interface for a slave station control device. The ET1100 receives the EtherCAT message through PHY _0, extracts command data sent to itself from the message, stores the command data in the internal storage area, writes local data from the internal storage area into a corresponding sub-message, realizes data exchange between an external command and slave station local data, and then the ET1100 sends the EtherCAT message to the next device through PHY _ 1. The EEPROM memory is connected with the EtherCAT communication controller through an IIC bus. The ET1100 is in communication with the EEPROM via the IIC interface, and the EEPROM stores device configuration information of the ET 1100.

Preferably, the first EtherCAT communication interface adopts an MII interface, and the EtherCAT communication controller is connected to the PHY chip through the MII interface.

Preferably, the second EtherCAT communication interface adopts an EBUS interface.

Preferably, the LS1C processor is a Loongson processor LS1C 0300A.

The utility model relates to a pulse generator, including microcontroller module, etherCAT communication controller, etherCAT communication interface, opto-coupler isolating circuit, solid state power relay and field signal interface, it chooses real-time ethernet etherCAT for use to communicate, and etherCAT is with the field bus system of the open framework based on ethernet, has characteristics such as the real-time strong, topological flexibility, synchronous precision height, cable redundancy, possess function safety agreement function.

It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

Above embodiment only is for explaining the utility model discloses a technical thought can not be injectd with this the utility model discloses a protection scope, all according to the utility model provides a technical thought, any change of doing on technical scheme basis all falls into the utility model discloses within the protection scope. Although the embodiments of the present invention have been described in detail, the present invention is not limited to the above embodiments, and various changes can be made without departing from the spirit of the present invention within the scope of knowledge possessed by those skilled in the art.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; go to

While the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art that: it is obvious that the technical solutions described in the foregoing embodiments may be modified, or some or all of the technical features may be modified

Performing equivalent replacement; such modifications and substitutions do not depart from the spirit and scope of the present invention.

Claims

1. A pulse generator, characterized by: the field protection circuit comprises a field signal interface, an input protection circuit, an output protection circuit, a solid-state power relay, an optical coupling isolation circuit, an EtherCAT communication controller, a first EtherCAT communication interface, a second EtherCAT communication interface, a microcontroller module and a power supply module;

the microcontroller comprises an LS1C processor, a power supply, a debugging port JTAG, a serial port UART, a memorizer SDRAM, a Nand Flash, an SPI Flash, a serial communication SPI interface, a reset circuit and a general GPIO interface which are respectively connected with the LS1C processor;

2. A pulse generator as defined in claim 1, wherein: the first EtherCAT communication interface adopts an MII interface, and the EtherCAT communication controller is connected with the PHY chip through the MII interface.

3. A pulse generator as defined in claim 1, wherein: the second EtherCAT communication interface adopts an EBUS interface.

4. A pulse generator as defined in claim 1, wherein: the LS1C processor adopts a Loongson processor LS1C 0300A.