CN213424992U - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN213424992U CN213424992U CN202022777758.XU CN202022777758U CN213424992U CN 213424992 U CN213424992 U CN 213424992U CN 202022777758 U CN202022777758 U CN 202022777758U CN 213424992 U CN213424992 U CN 213424992U
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Abstract
The utility model discloses a display panel and a display device, which comprises a display area and a non-display area surrounding the display area; the display panel further comprises a substrate, and a first conductive layer, a light-emitting functional layer and a second conductive layer which are sequentially stacked on the substrate; the first conductive layer includes a plurality of light emitting element first electrodes located in the display region; the first conductive layer further comprises a plurality of conductive blocks located in the non-display area; the second conducting layer is located in the display area and extends to the non-display area; the non-display area further includes a power supply signal line; the second conductive layer located in the non-display area is electrically connected to the power signal line through the conductive block. The embodiment of the utility model provides a can avoid the inhomogeneous problem of display area center and marginal area's electrode sculpture.
Description
Technical Field
The utility model relates to a display panel technical field especially relates to a display panel and display device.
Background
The organic light emitting display panel is light and thin compared with the existing liquid crystal display panel because the organic light emitting display panel can self emit light and no additional backlight is needed. In addition, the organic light emitting display panel has a wide viewing angle and high contrast, and is therefore preferred.
The display area of the organic light emitting display panel is generally provided with a plurality of light emitting elements arranged in an array, each light emitting element comprises an anode, a light emitting layer and a cathode, the anodes of the light emitting elements are separated, and the cathodes of the light emitting elements are connected together to form a structure that the whole surface is tiled. Because there are other anodes outside the anode in the central area of the display area, and there are no other anodes outside the anode at the edge of the display area, when developing and etching the anode, the etching rates at the edge of the display area and the center of the display area are different, so that there are more portions of the anode at the edge of the display area that may be etched than the anode at the central area of the display area, which causes the sizes of the anodes at the central area and the edge of the display area to be inconsistent, thereby causing the problem of uneven display.
SUMMERY OF THE UTILITY MODEL
An embodiment of the utility model provides a display panel and display device avoids the inhomogeneous problem of display area center and marginal area's electrode sculpture.
In a first aspect, an embodiment of the present invention provides a display panel, including a display area and a non-display area surrounding the display area;
the display panel further comprises a substrate, and a first conductive layer, a light-emitting functional layer and a second conductive layer which are sequentially stacked on the substrate;
the first conductive layer includes a plurality of light emitting element first electrodes located in the display region; the first conductive layer further comprises a plurality of conductive blocks located in the non-display area; the second conducting layer is located in the display area and extends to the non-display area;
the non-display area further includes a power supply signal line;
the second conductive layer located in the non-display area is electrically connected to the power signal line through the conductive block.
In a second aspect, an embodiment of the present invention further provides a display device, including the display panel of the first aspect.
The embodiment of the utility model provides a display panel, be provided with the conducting block with the same layer setting of first electrode in the non-display area, conducting block and first electrode all form through first conducting layer preparation promptly, consequently in the sculpture process, there is the conducting block at the first electrode periphery at display area edge, the first electrode periphery at display area center has first electrode, consequently at the first electrode in-process of sculpture, the sculpture rate at display area center and edge keeps unanimous basically, can avoid the size difference of the first electrode at display area center and edge to arouse and show uneven problem. In addition, the second electrode extends to the non-display area and is electrically connected with the power signal line through the conductive block, so that the overall resistance reduction of the second electrode and the conductive block can be reduced, and the display unevenness caused by the impedance voltage drop of the second electrode is reduced.
Drawings
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view along AA' in FIG. 1;
fig. 3 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention, and fig. 2 is a schematic cross-sectional view along AA' in fig. 1, and with reference to fig. 1 and fig. 2, the display panel includes a display area 10 (an area inside a dashed rectangular frame in fig. 1) and a non-display area 20 (an area outside the dashed rectangular frame in fig. 1) surrounding the display area 10. The display panel further includes a substrate 11, and a first conductive layer 12, a light-emitting functional layer 13, and a second conductive layer 14, which are sequentially stacked on the substrate 11. The first conductive layer 12 includes a plurality of light emitting element first electrodes 121 located in the display region 10. The first conductive layer 12 further includes a plurality of conductive blocks 122 located at the non-display area 20. That is, the first electrode 121 forming the light emitting element and the conductive bump 122 are simultaneously prepared through the first conductive layer. The second conductive layer 14 is located in the display region 10 and extends to the non-display region 20. The non-display area 20 further includes a power signal line PVEE, and the second conductive layer 14 located at the non-display area 20 is electrically connected to the power signal line PVEE through a conductive block 122. The second conductive layer 14 serves as a second electrode of the light-emitting element. The second conductive layer 14 is electrically connected to the power signal line PVEE through the conductive block 122 to receive a power signal supplied from the driver chip.
Each light emitting element 100 (indicated by a dotted oval in fig. 2) in the light emitting element array of the display area 10 includes a first electrode 121, a light emitting function layer 13, and a second electrode (second conductive layer 14). The first electrodes 121 of the light emitting elements 100 are separated from each other, and the second electrodes of the light emitting elements 100 are continuously and flatly laid on the whole surface.
Referring to fig. 1, the first electrode 121 in the display region 10 and the conductive block 122 in the non-display region 20 are formed in the same process through the first conductive layer 12, that is, the first electrode 121 and the conductive block 122 are formed simultaneously through the same developing and etching process. Since the conductive block is also required to be etched on the periphery of the first electrode 121 on the edge of the display area 10 during the developing and etching process, the size of the first electrode 121 etched on the central area of the display area 10 and the size of the first electrode 121 etched on the edge area of the display area 10 can be kept approximately the same, so that the display of the display panel can be kept uniform. Although the conductive block is not required to be etched outside the conductive block 122 at the outermost periphery of the non-display area 20 in the developing and etching process, the size of the conductive block 122 at the outermost periphery of the non-display area 20 is smaller than that of the conductive block adjacent to the display area 10, but the display uniformity is not affected because the area of the conductive block in the non-display area 20 does not emit light for display.
In the embodiment of the present invention, the second conductive layer 14 extending to the non-display area 20 is electrically connected to the power signal line PVEE through the conductive block 122 of the non-display area. In order to improve the light transmittance of the display panel, the thickness of the second conductive layer generally needs to be reduced, but the reduction of the thickness of the second conductive layer increases the resistance of the second conductive layer. The embodiment of the present invention provides a second conductive layer 14 extending to the non-display area 20 is electrically connected to the power signal line PVEE through the conductive block 122, and the overall resistance of the second conductive layer 14 and the conductive block 122 can be reduced to a certain extent.
It should be noted that, the embodiment of the present invention does not limit the size, shape, arrangement, etc. of the non-display conductive blocks, that is, as long as the non-display conductive blocks are disposed, the problem of non-uniform etching of the first electrode in the center and the edge area of the display area can be solved to some extent. To ensure that the size of the first electrode 121 at the center of the display area 10 can be as small as possible different from the size of the first electrode 121 at the edge of the display area 10, in some embodiments, the shape of each conductive block 122 of the non-display area 20 may be the same as the shape of the first electrode 121 of the light emitting element of the display area 10, and/or the size of each conductive block 122 of the non-display area 20 may be the same as the size of the first electrode 121 of the light emitting element of the display area 10.
The embodiment of the utility model provides a set up the shape of each conducting block 122 of non-display area 20 and the shape of the first electrode 121 of the light emitting component of display area 10 the same, and/or, the size of each conducting block 122 of non-display area 20 is the same with the size of the first electrode 121 of the light emitting component of display area 10, can make the etching environment of the first electrode 121 at display area 10 center keep unanimous with the etching environment of the first electrode 121 at display area 10 edge, thereby can realize the sculpture back, the first electrode 121 size at display area 10 center can keep unanimous with the first electrode 121 size at display area 10 edge as far as possible.
Alternatively, on the basis of the above embodiment, the embodiment of the present invention may further set the arrangement density of the conductive blocks 122 in the non-display area 20 to be the same as the arrangement density of the first electrodes 121 of the light emitting elements in the display area 10. Since the arrangement density of the conductive bumps 122 in the non-display area 20 is the same as that of the first electrodes 121 of the light emitting elements in the display area 10, the relative positions of the first electrodes 121 located at the edges of the display area 10 with respect to the first electrodes 121 at the periphery and the conductive bumps are the same as the relative positions of the first electrodes 121 located at the center of the display area 10 with respect to the first electrodes 121 at the periphery. Therefore, the uniformity of the preparation of each first electrode 121 of the display region 10 is better in the etching process.
The light-emitting functional layer 13 of the light-emitting element can be formed by vapor deposition in general. The light emitting function layer 13 may have a multilayer structure, and may include an electron transport layer and a hole transport layer for balancing electrons and holes, and an electron injection layer and a hole injection layer for enhancing injection of electrons and holes, in addition to the light emitting layer. Under the drive of an electric field, electrons are injected into the electron transport layer from the second electrode, holes are injected into the hole transport layer from the first electrode, the electrons are transferred to the light emitting layer through the electron transport layer, the holes are transferred to the light emitting layer through the hole transport layer, and therefore the electrons and the holes meet in the light emitting layer to form excitons, so that light emitting molecules are excited, and visible light is emitted through radiation relaxation.
The utility model discloses first electrode 121 can also include reflection electrode at least, and the light that luminous functional layer 13 sent shines behind first electrode 121, can also reflect back display panel's light-emitting side, improves display panel's light utilization efficiency. The film structure of the first electrode 121 may be, for example, a film structure including a transparent metal oxide, a reflective electrode (Ag), and a transparent metal oxide, which are sequentially disposed. The transparent metal oxide is a material with high work function, and is beneficial to injecting holes.
In addition, the light emitting device layer in the display panel is sensitive to external environmental factors such as moisture and oxygen. In order to improve the service life and stability of the display panel, an encapsulation layer can be covered on the light-emitting element layer for sealing. The encapsulation layer can be one or more layers, and the material used can be an organic film layer or an inorganic film layer, or a laminated structure of the organic film layer and the inorganic film layer.
On the basis of the above embodiments, the embodiment of the present invention provides a display panel further including a pixel driving circuit layer. For example, referring to fig. 2, the pixel driving circuit layer 15 is located between the substrate 11 and the first conductive layer 12. The power supply signal line PVEE is provided in the same layer as any metal layer in the pixel driving circuit layer 15. The pixel driving circuit layer 15 includes a pixel driving circuit array, and each pixel driving circuit in the pixel driving circuit array is electrically connected to the first electrode of each light emitting element in a one-to-one correspondence manner. The pixel driving circuit is used for driving the light-emitting element electrically connected with the pixel driving circuit to emit light.
It should be noted that fig. 2 only shows one transistor in the pixel driving circuit by way of example, and the embodiment of the present invention is not limited thereto, and the specific circuit structure of the pixel driving circuit is not limited by the embodiment of the present invention.
Referring to fig. 2, the pixel driving circuit layer 15 includes a plurality of metal layers, such as a metal layer for forming a gate electrode of a transistor, a metal layer for forming a source and drain electrode of a transistor, or a metal layer for forming a capacitor plate. The embodiment of the utility model provides an in power signal line PVEE can with the arbitrary metal level in pixel drive circuit layer 15 with the layer setting, can form simultaneously in same processing procedure technology, need not additionally to set up a technology processing procedure for power signal line PVEE, consequently can simplify the processing procedure, reduce cost. As exemplarily shown in fig. 2, the power supply signal line PVEE is disposed in the same layer as the source-drain metal layer of the transistor in the pixel driving circuit layer 15.
With continued reference to fig. 2, an insulating layer 16 is further disposed between the power signal line PVEE and the conductive block 122. The insulating layer 16 is provided with a via 161, and the conductive block 122 is electrically connected to the power signal line PVEE through the via 161. It is noted that the insulating layer 16 may be one or more layers. For example, as shown in fig. 2, the power signal line PVEE is disposed in the same layer as the source-drain metal layer of the transistor in the pixel driving circuit layer 15, and the insulating layer 16 between the power signal line PVEE and the conductive block 122 is a planarization layer extending from the display region 10 to the non-display region 20. If the power signal line PVEE is disposed on the same layer as the gate metal layer of the transistor in the pixel driving circuit layer 15, the insulating layer 16 between the power signal line PVEE and the conductive block 122 includes: the display region 10 extends to the planarization layer in the non-display region 20 and the interlayer insulating layer between the gate metal layer of the transistor and the source-drain metal layer of the transistor.
On the basis of the above embodiment, the display panel further includes the pixel defining layer 17. The pixel defining layer 17 is located on a side of the first conductive layer 12 facing away from the substrate 11. The pixel defining layer 17 is provided with a plurality of first openings (not shown) in the display region 10, the first openings exposing at least a portion of the light emitting element first electrodes 121. The first opening exposes at least a portion of the first electrode 121 of the light emitting element, so that a light emitting functional layer to be subsequently deposited is disposed in the first opening to be in contact with the first electrode 121. The pixel defining layer 17 is provided with a plurality of second openings (not shown in the drawings) in the non-display area 20. The second opening exposes at least a portion of the conductive block 122. One or more conductive blocks 122 may be disposed in each second opening, but the embodiment of the present invention is not limited thereto, and two conductive blocks 122 are disposed in each second opening in the exemplary arrangement shown in fig. 2.
It should be noted that, in the embodiment of the present invention, a plurality of conductive blocks 122 may be disposed on at least one side of the non-display area 20 of the display area 10. For example, in fig. 1, the non-display area 20 is provided with a plurality of conductive blocks 122 on three sides of the display area 10. Referring to fig. 1, the non-display area of the display panel according to the embodiment of the present invention includes a first non-display area 21, a second non-display area 22, a third non-display area 23, and a fourth non-display area 24. The first non-display area 21 is opposite to the second non-display area 22, and the third non-display area 23 is opposite to the fourth non-display area 24. The fourth non-display area 24 includes a binding area. The first, second, and third non-display regions 21, 22, and 23 are provided with a plurality of conductive blocks 122. Since the fourth non-display area 24 includes the bonding area for bonding the driver chip or the chip on film, the fourth non-display area 24 needs to be provided with a large number of fan-out lines, bonding pads, and other conductive structures. If set up the conducting block in this region, the conducting block produces parasitic capacitance with conducting structure such as fan-out line, binding pad easily, consequently the embodiment of the utility model provides a only be provided with a plurality of conducting blocks 122 in first non-display area 21, second non-display area 22 and third non-display area 23.
In other embodiments, the conductive block 122 may be disposed on a specific side of the display area 10 and the non-display area 20, for example, the conductive block 122 may be disposed only on the first non-display area 21 and the second non-display area 22.
The embodiment of the utility model provides a still provide a display device, fig. 3 is the utility model provides a display device's schematic structure diagram, as shown in fig. 3, the embodiment of the utility model provides a display device includes any above-mentioned embodiment display panel 100. The embodiment of the utility model provides a display device can be as shown in fig. 3 the cell-phone, also can be for computer, TV set, intelligent wearing equipment etc. this embodiment does not do special restriction to this.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. A display panel characterized by comprising a display area and a non-display area surrounding the display area;
the display panel further comprises a substrate, and a first conductive layer, a light-emitting functional layer and a second conductive layer which are sequentially stacked on the substrate;
the first conductive layer includes a plurality of light emitting element first electrodes located in the display region; the first conductive layer further comprises a plurality of conductive blocks located in the non-display area; the second conducting layer is located in the display area and extends to the non-display area;
the non-display area further includes a power supply signal line;
the second conductive layer located in the non-display area is electrically connected to the power signal line through the conductive block.
2. The display panel according to claim 1, wherein a shape of each of the conductive blocks of the non-display region is the same as a shape of the light emitting element first electrode of the display region.
3. The display panel according to claim 1, wherein a size of each of the conductive blocks of the non-display area is the same as a size of the light emitting element first electrode of the display area.
4. The display panel according to claim 1, wherein an arrangement density of the conductive bumps in the non-display region is the same as an arrangement density of the first electrodes of the light emitting elements in the display region.
5. The display panel according to claim 1, further comprising a pixel driving circuit layer; the pixel driving circuit layer is positioned between the substrate and the first conducting layer;
the power signal line and any metal layer in the pixel driving circuit layer are arranged in the same layer.
6. The display panel according to claim 1, wherein an insulating layer is provided between the power signal line and the conductive block; the insulating layer is provided with a via hole, and the conductive block is electrically connected with the power signal line through the via hole.
7. The display panel according to claim 1, further comprising a pixel defining layer on a side of the first conductive layer facing away from the substrate; the pixel limiting layer is provided with a plurality of first openings in the display area, and at least part of the first electrodes of the light-emitting elements are exposed through the first openings; the pixel limiting layer is provided with a plurality of second openings in the non-display area, and at least parts of the conductive blocks are exposed through the second openings.
8. The display panel according to claim 1, wherein the non-display region is provided with a plurality of the conductive blocks on at least one side of the display region.
9. The display panel according to claim 1, wherein the non-display region includes a first non-display region, a second non-display region, a third non-display region, and a fourth non-display region;
the first non-display area is opposite to the second non-display area, and the third non-display area is opposite to the fourth non-display area; the fourth non-display area comprises a binding area;
the first non-display area, the second non-display area, and the third non-display area are provided with a plurality of the conductive blocks.
10. A display device characterized by comprising the display panel according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022777758.XU CN213424992U (en) | 2020-11-26 | 2020-11-26 | Display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022777758.XU CN213424992U (en) | 2020-11-26 | 2020-11-26 | Display panel and display device |
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| CN213424992U true CN213424992U (en) | 2021-06-11 |
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| CN202022777758.XU Active CN213424992U (en) | 2020-11-26 | 2020-11-26 | Display panel and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113345376A (en) * | 2021-06-21 | 2021-09-03 | 合肥维信诺科技有限公司 | Display panel and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113345376A (en) * | 2021-06-21 | 2021-09-03 | 合肥维信诺科技有限公司 | Display panel and display device |
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