CN213399563U - IP address coding circuit - Google Patents

IP address coding circuit Download PDF

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Publication number
CN213399563U
CN213399563U CN202022751844.3U CN202022751844U CN213399563U CN 213399563 U CN213399563 U CN 213399563U CN 202022751844 U CN202022751844 U CN 202022751844U CN 213399563 U CN213399563 U CN 213399563U
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pin
dial switch
expansion chip
circuit
switch
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CN202022751844.3U
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Chinese (zh)
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陈果实
张敏
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Wuhan Huazhonghuachang Energy Technology Co ltd
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Wuhan Huazhonghuachang Energy Technology Co ltd
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Abstract

The utility model relates to an IP address coding circuit, it includes dial switch circuit, expander circuit and rectangular connector, dial switch circuit is connected with expander circuit's IO mouth electricity, expander circuit is connected with rectangular connector electricity, rectangular connector passes through bus connection with the control extension; the dial switch circuit comprises dial switches S1, S2, S3, S4, 4-bit exclusion RP1, RP2, RP3 and RP4, wherein the dial switches S1, S2, S3 and S4 are grounded through the exclusion RP1, RP2, RP3 and RP4 respectively. IP address coding circuit can realize the quick setting to control extension IP address through simpler operation.

Description

IP address coding circuit
Technical Field
The utility model relates to an encoding circuit technical field especially relates to an IP address coding circuit.
Background
The control extension is used for a low-voltage control part of the high-voltage energy storage power supply, belongs to the core of the whole high-voltage energy storage power supply control part, provides a network transmission channel for receiving a command of upper computer control software for the upper part, and realizes the operations of charging, stopping charging, discharging, data acquisition and the like for the energy storage power supply through the received control command for the lower part; when the existing control extension is in failure and needs to be replaced and maintained, the IP address needs to be set again for the replaced control extension, the setting operation is complex, and under the condition that maintenance personnel are unfamiliar, more time is consumed, and the subsequent test process is influenced.
SUMMERY OF THE UTILITY MODEL
In view of the above, it is desirable to provide an IP address encoding circuit to solve the problems of complicated operation and long time consumption in controlling the setting of the IP address of the extension.
The utility model provides an IP address coding circuit, including dial switch circuit, expander circuit and rectangular connector, dial switch circuit is connected with expander circuit's IO mouth electricity, expander circuit is connected with rectangular connector electricity, rectangular connector passes through bus connection with the control extension;
the dial switch circuit comprises dial switches S1, S2, S3, S4, 4-bit exclusion RP1, RP2, RP3 and RP4, wherein the dial switches S1, S2, S3 and S4 are grounded through the exclusion RP1, RP2, RP3 and RP4 respectively.
Further, pin 1 of the dip switch S1 is connected with pin 8 of the resistor pack RP1, pin 2 of the dip switch S1 is connected with pin 7 of the resistor pack RP1, pin 4 of the dip switch S1 is connected with pin 6 of the resistor pack RP1, and pin 8 of the dip switch S1 is connected with pin 5 of the resistor pack RP 1;
pin 1 of the dial switch S2 is connected with pin 8 of the resistor pack RP2, pin 2 of the dial switch S2 is connected with pin 7 of the resistor pack RP2, pin 4 of the dial switch S2 is connected with pin 6 of the resistor pack RP2, and pin 8 of the dial switch S2 is connected with pin 5 of the resistor pack RP 2.
Further, pin 1 of the dip switch S3 is connected with pin 8 of the resistor pack RP3, pin 2 of the dip switch S3 is connected with pin 7 of the resistor pack RP3, pin 4 of the dip switch S3 is connected with pin 6 of the resistor pack RP3, and pin 8 of the dip switch S3 is connected with pin 5 of the resistor pack RP 3;
pin 1 of the dial switch S4 is connected with pin 8 of the resistor pack RP4, pin 2 of the dial switch S4 is connected with pin 7 of the resistor pack RP4, pin 4 of the dial switch S4 is connected with pin 6 of the resistor pack RP4, and pin 8 of the dial switch S4 is connected with pin 5 of the resistor pack RP 4.
Further, the C pins of the toggle switches S1, S2, S3 and S4 are all electrically connected with the pin of the rectangular connector 1.
Further, the expansion circuit includes I2C-IO expansion chip, resistor R3; said I2 Pin 1 of U1 of C-IO expansion chip is connected with DC power supply through a resistor R3, and I is connected with DC power supply2Pins 2, 3, 12 and 21 of the C-IO expansion chip U1 are all grounded, and I is2 Pin 4 of C-IO expansion chip U1 is connected with pin 1 of dial switch S1, and I2Pin 5 of C-IO expansion chip U1 is connected with pin 2 of dial switch S1, and the I2Pin 6 of C-IO expansion chip U1 is connected with pin 4 of dial switch S1, and the I2And pin 7 of the C-IO expansion chip U1 is connected with pin 8 of the dial switch S1.
Further, the I2Pin 8 of C-IO expansion chip U1 is connected with pin 1 of dial switch S2, and I2Pin 9 of C-IO expansion chip U1 is connected with pin 2 of dial switch S2, and the I2The U1 pin 10 of the C-IO expansion chip is connected with the S2 pin 4 of the dial switch, and the I2And a pin 11 of a U1 of the C-IO expansion chip is connected with a pin 8 of the dial switch S2.
Further, the I2Pin 13 of C-IO expansion chip U1 is connected with pin 1 of dial switch S3, and the I2The U1 pin 14 of the C-IO expansion chip is connected with the S3 pin 2 of the dial switch, and the I2The U1 pin 15 of the C-IO expansion chip is connected with the S3 pin 4 of the dial switch, and the I2And a pin 16 of a C-IO expansion chip U1 is connected with a pin 8 of the dial switch S3.
Further, the I2Pin 17 of C-IO expansion chip U1 is connected with pin 1 of dial switch S4, and I2The U1 pin 18 of the C-IO expansion chip is connected with the S4 pin 2 of the dial switch, and the I2The U1 pin 19 of the C-IO expansion chip is connected with the S4 pin 4 of the dial switchSaid I is2And a pin 20 of a U1 of the C-IO expansion chip is connected with a pin 8 of the dial switch S4.
Further, the expansion circuit further comprises resistors R1 and R2 and a capacitor C3, wherein I is2The U1 pin 22 of the C-IO expansion chip is connected with the pin 4 of the rectangular connector, I2The U1 pin 22 of the C-IO expansion chip is also connected with a direct current power supply through a resistor R2, and I2The U1 pin 23 of the C-IO expansion chip is connected with the pin 3 of the rectangular connector, I2The U1 pin 23 of the C-IO expansion chip is also connected to DC power supply through a resistor R1, the pin 2 of the rectangular connector is connected to ground, and the I2The pin 24 of the U1 of the C-IO expansion chip is connected with a direct current power supply through a capacitor C3.
Compared with the prior art, the beneficial effects of the utility model include: obtaining coded data by dial switch, and passing through I2The C-IO expansion circuit transmits the coded data to the control extension set, the control extension set reads the coded data of the dial switch, the code of the first bit dial switch is used for setting the 3 rd byte of the IP address, the number formed by the codes of the second, third and fourth bit dial switches is used for setting the 4 th byte of the IP address, and the quick setting of the IP address of the control extension set can be realized through simpler operation.
Drawings
Fig. 1 is a block diagram of an IP address encoding circuit provided by the present invention;
fig. 2 is a schematic circuit diagram of a dial switch circuit provided by the present invention;
FIG. 3 is a schematic circuit diagram of a rectangular connector provided by the present invention;
fig. 4 is a schematic circuit diagram of an expansion circuit provided by the present invention.
Detailed Description
The following detailed description of the preferred embodiments of the invention, which is to be read in connection with the accompanying drawings, forms a part of this application, and together with the embodiments of the invention, serve to explain the principles of the invention and not to limit its scope.
The utility model provides an IP address coding circuit, its structure block diagram, as shown in figure 1, IP address coding circuit includes dial switch circuit, expander circuit and rectangular connector, dial switch circuit is connected with expander circuit's IO mouth electricity, expander circuit is connected with rectangular connector electricity, rectangular connector passes through bus connection with the control extension;
the dial switch circuit comprises dial switches S1, S2, S3, S4, 4-bit exclusion RP1, RP2, RP3 and RP4, wherein the dial switches S1, S2, S3 and S4 are grounded through the exclusion RP1, RP2, RP3 and RP4 respectively.
It should be noted that coded data is obtained through the dial switch, and the coded data is transmitted to the control extension set through the I2C-IO extension circuit, the control extension set reads the coded data of the dial switch, the code of the first dial switch (for example, the dial switch S1) is used for setting the 3 rd byte of the IP address, and the number formed by coding the second, third and fourth dial switches (for example, the dial switches S2, S3 and S4) is used for setting the 4 th byte of the IP address, so that the quick setting of the IP address of the control extension set is realized through simpler operation;
preferably, pin 1 of the dip switch S1 is connected to pin 8 of the resistor pack RP1, pin 2 of the dip switch S1 is connected to pin 7 of the resistor pack RP1, pin 4 of the dip switch S1 is connected to pin 6 of the resistor pack RP1, and pin 8 of the dip switch S1 is connected to pin 5 of the resistor pack RP 1;
preferably, pin 1 of the dip switch S2 is connected to pin 8 of the resistor pack RP2, pin 2 of the dip switch S2 is connected to pin 7 of the resistor pack RP2, pin 4 of the dip switch S2 is connected to pin 6 of the resistor pack RP2, and pin 8 of the dip switch S2 is connected to pin 5 of the resistor pack RP 2;
preferably, pin 1 of the dip switch S3 is connected to pin 8 of the resistor pack RP3, pin 2 of the dip switch S3 is connected to pin 7 of the resistor pack RP3, pin 4 of the dip switch S3 is connected to pin 6 of the resistor pack RP3, and pin 8 of the dip switch S3 is connected to pin 5 of the resistor pack RP 3;
pin 1 of the dial switch S4 is connected with pin 8 of the resistor pack RP4, pin 2 of the dial switch S4 is connected with pin 7 of the resistor pack RP4, pin 4 of the dial switch S4 is connected with pin 6 of the resistor pack RP4, and pin 8 of the dial switch S4 is connected with pin 5 of the resistor pack RP 4;
in one embodiment, the circuit schematic diagram of the dial switch circuit is shown in fig. 2, the dial switches S1, S2, S3 and S4 are decimal dial switches with the type HADR-10S, and the resistances of the exclusion RP1, RP2, RP3 and RP4 are 10k Ω;
in another specific embodiment, 4 dip switches of the IP address coding circuit are coded as "1200" (i.e., dip switches S1-S4 point to 1, 2, 0, respectively), the first two bytes of the IP address of the control extension are fixed fields "192.168", the 3 rd byte is the first bit code of the dip switch (i.e., the code of dip switch S1), i.e., "1", the 4 th byte is the combination of the second, third, and fourth bit codes (i.e., the combination of the codes of dip switches S2-S4), i.e., "200", and at this time, the IP address coding circuit sets the IP address of the control extension as "192.168.1.200";
preferably, the pins C of the dial switches S1, S2, S3 and S4 are all electrically connected with the pin 1 of the rectangular connector;
in one embodiment, the electrical schematic diagram of the rectangular connector is as shown in fig. 3, the rectangular connector is XS1 of model J30J-9TJW-J, and the pin 1 of the rectangular connector is connected to a direct current power supply through two capacitors C1 and C2 which are connected in parallel;
preferably, the expansion circuit comprises I2C-IO expansion chip, resistor R3; said I2 Pin 1 of U1 of C-IO expansion chip is connected with DC power supply through a resistor R3, and I is connected with DC power supply2Pins 2, 3, 12 and 21 of the C-IO expansion chip U1 are all grounded, and I is2 Pin 4 of C-IO expansion chip U1 is connected with pin 1 of dial switch S1, and I2Pin 5 of C-IO expansion chip U1 is connected with pin 2 of dial switch S1, and the I2Pin 6 of C-IO expansion chip U1 is connected with pin 4 of dial switch S1, and the I2Pin 7 of a C-IO expansion chip U1 is connected with pin 8 of the dial switch S1;
in one embodiment, the circuit schematic of the expansion circuit is as shown in FIG. 4, the I2The bit type of the C-IO extended chip is a chip of PCA 9655E;
preferably, the I2Pin 8 of C-IO expansion chip U1 is connected with pin 1 of dial switch S2, and I2Pin 9 of C-IO expansion chip U1 is connected with pin 2 of dial switch S2, and the I2The U1 pin 10 of the C-IO expansion chip is connected with the S2 pin 4 of the dial switch, and the I2And a pin 11 of a U1 of the C-IO expansion chip is connected with a pin 8 of the dial switch S2.
Preferably, the I2Pin 13 of C-IO expansion chip U1 is connected with pin 1 of dial switch S3, and the I2The U1 pin 14 of the C-IO expansion chip is connected with the S3 pin 2 of the dial switch, and the I2The U1 pin 15 of the C-IO expansion chip is connected with the S3 pin 4 of the dial switch, and the I2A pin 16 of a C-IO expansion chip U1 is connected with a pin 8 of the dial switch S3;
preferably, the I2Pin 17 of C-IO expansion chip U1 is connected with pin 1 of dial switch S4, and I2The U1 pin 18 of the C-IO expansion chip is connected with the S4 pin 2 of the dial switch, and the I2Pin 19 of C-IO expansion chip U1 is connected with pin 4 of dial switch S4, and the I2Pin 20 of a C-IO expansion chip U1 is connected with pin 8 of the dial switch S4;
preferably, the expansion circuit further comprises resistors R1 and R2 and a capacitor C3, and the I is2The U1 pin 22 of the C-IO expansion chip is connected with the pin 4 of the rectangular connector, I2The U1 pin 22 of the C-IO expansion chip is also connected with a direct current power supply through a resistor R2, and I2The U1 pin 23 of the C-IO expansion chip is connected with the pin 3 of the rectangular connector, I2The U1 pin 23 of the C-IO expansion chip is also connected to DC power supply through a resistor R1, the pin 2 of the rectangular connector is connected to ground, and the I2The pin 24 of the U1 of the C-IO expansion chip is connected with a direct-current power supply through a capacitor C3;
in specific implementation, coded data is obtained through a dial switch and passes through I2The C-IO expansion circuit transmits the coded data to the control extension set;
the utility model discloses an IP address coding circuit, including dial switch circuit, extension electricityThe dial switch circuit is electrically connected with an IO port of the expansion circuit, the expansion circuit is electrically connected with the rectangular connector, and the rectangular connector is connected with the control extension through a bus; the dial switch circuit comprises dial switches S1, S2, S3, S4, 4-bit exclusion RP1, RP2, RP3 and RP4, wherein the dial switches S1, S2, S3 and S4 are grounded through the exclusion RP1, RP2, RP3 and RP4 respectively; obtaining coded data by dial switch, and passing through I2The C-IO expansion circuit transmits the coded data to the control extension set, the control extension set reads the coded data of the dial switch, the code of the first bit dial switch is used for setting the 3 rd byte of the IP address, the number formed by the codes of the second, third and fourth bit dial switches is used for setting the 4 th byte of the IP address, and the quick setting of the IP address of the control extension set can be realized through simpler operation.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention should be covered by the present invention.

Claims (9)

1. An IP address coding circuit is characterized by comprising a dial switch circuit, an expansion circuit and a rectangular connector, wherein the dial switch circuit is electrically connected with an IO port of the expansion circuit, the expansion circuit is electrically connected with the rectangular connector, and the rectangular connector is connected with a control extension through a bus;
the dial switch circuit comprises dial switches S1, S2, S3, S4, 4-bit exclusion RP1, RP2, RP3 and RP4, wherein the dial switches S1, S2, S3 and S4 are grounded through the exclusion RP1, RP2, RP3 and RP4 respectively.
2. The IP address coding circuit of claim 1, wherein pin 1 of the dip switch S1 is connected with pin 8 of the resistor pack RP1, pin 2 of the dip switch S1 is connected with pin 7 of the resistor pack RP1, pin 4 of the dip switch S1 is connected with pin 6 of the resistor pack RP1, and pin 8 of the dip switch S1 is connected with pin 5 of the resistor pack RP 1;
pin 1 of the dial switch S2 is connected with pin 8 of the resistor pack RP2, pin 2 of the dial switch S2 is connected with pin 7 of the resistor pack RP2, pin 4 of the dial switch S2 is connected with pin 6 of the resistor pack RP2, and pin 8 of the dial switch S2 is connected with pin 5 of the resistor pack RP 2.
3. The IP address coding circuit of claim 1, wherein pin 1 of the dip switch S3 is connected with pin 8 of the resistor pack RP3, pin 2 of the dip switch S3 is connected with pin 7 of the resistor pack RP3, pin 4 of the dip switch S3 is connected with pin 6 of the resistor pack RP3, and pin 8 of the dip switch S3 is connected with pin 5 of the resistor pack RP 3;
pin 1 of the dial switch S4 is connected with pin 8 of the resistor pack RP4, pin 2 of the dial switch S4 is connected with pin 7 of the resistor pack RP4, pin 4 of the dial switch S4 is connected with pin 6 of the resistor pack RP4, and pin 8 of the dial switch S4 is connected with pin 5 of the resistor pack RP 4.
4. The IP address encoding circuit of claim 1, wherein the C pins of the toggle switches S1, S2, S3, S4 are all electrically connected with the rectangular connector 1 pin.
5. The IP address encoding circuit of claim 1, wherein the extension circuit comprises I2C-IO expansion chip, resistor R3; said I2Pin 1 of U1 of C-IO expansion chip is connected with DC power supply through a resistor R3, and I is connected with DC power supply2Pins 2, 3, 12 and 21 of the C-IO expansion chip U1 are all grounded, and I is2Pin 4 of C-IO expansion chip U1 is connected with pin 1 of dial switch S1, and I2Pin 5 of C-IO expansion chip U1 is connected with pin 2 of dial switch S1, and the I2Pin 6 of C-IO expansion chip U1 is connected with pin 4 of dial switch S1, and the I2And pin 7 of the C-IO expansion chip U1 is connected with pin 8 of the dial switch S1.
6. The IP address encoding circuit of claim 1, wherein I is2Pin 8 of C-IO expansion chip U1 is connected with pin 1 of dial switch S2, and I2Pin 9 of C-IO expansion chip U1 is connected with pin 2 of dial switch S2, and the I2The U1 pin 10 of the C-IO expansion chip is connected with the S2 pin 4 of the dial switch, and the I2And a pin 11 of a U1 of the C-IO expansion chip is connected with a pin 8 of the dial switch S2.
7. The IP address encoding circuit of claim 1, wherein I is2Pin 13 of C-IO expansion chip U1 is connected with pin 1 of dial switch S3, and the I2The U1 pin 14 of the C-IO expansion chip is connected with the S3 pin 2 of the dial switch, and the I2The U1 pin 15 of the C-IO expansion chip is connected with the S3 pin 4 of the dial switch, and the I2And a pin 16 of a C-IO expansion chip U1 is connected with a pin 8 of the dial switch S3.
8. The IP address encoding circuit of claim 1, wherein I is2Pin 17 of C-IO expansion chip U1 is connected with pin 1 of dial switch S4, and I2The U1 pin 18 of the C-IO expansion chip is connected with the S4 pin 2 of the dial switch, and the I2Pin 19 of C-IO expansion chip U1 is connected with pin 4 of dial switch S4, and the I2And a pin 20 of a U1 of the C-IO expansion chip is connected with a pin 8 of the dial switch S4.
9. The IP address encoding circuit of claim 5, wherein the expansion circuit further comprises resistors R1, R2 and a capacitor C3, the I2The U1 pin 22 of the C-IO expansion chip is connected with the pin 4 of the rectangular connector, I2The U1 pin 22 of the C-IO expansion chip is also connected with a direct current power supply through a resistor R2, and I2The U1 pin 23 of the C-IO expansion chip is connected with the pin 3 of the rectangular connector, I2The U1 pin 23 of the C-IO expansion chip is also connected to DC power supply through a resistor R1, the pin 2 of the rectangular connector is connected to ground, and the I2U1 pin of C-IO expansion chip24 is connected to a dc power supply through a capacitor C3.
CN202022751844.3U 2020-11-24 2020-11-24 IP address coding circuit Active CN213399563U (en)

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Application Number Priority Date Filing Date Title
CN202022751844.3U CN213399563U (en) 2020-11-24 2020-11-24 IP address coding circuit

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114039810A (en) * 2022-01-10 2022-02-11 至新自动化(北京)有限公司 Flexible automatic control system based on Ethernet

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114039810A (en) * 2022-01-10 2022-02-11 至新自动化(北京)有限公司 Flexible automatic control system based on Ethernet

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