CN213398823U

CN213398823U - Circuit detection device

Info

Publication number: CN213398823U
Application number: CN202022292960.3U
Authority: CN
Inventors: 熊登胜
Original assignee: WUXI YOUDA ELECTRONICS CO Ltd
Current assignee: WUXI YOUDA ELECTRONICS CO Ltd
Priority date: 2020-10-14
Filing date: 2020-10-14
Publication date: 2021-06-08
Anticipated expiration: 2030-10-14

Abstract

This scheme discloses a circuit detection device, the device includes: the device comprises a preprocessing unit, a fault detection unit and a signal processing unit, wherein the preprocessing unit is used for preprocessing a plurality of paths of signals to be detected and outputting the signals to be detected as one path of signals to be detected; wherein the fault detection unit comprises an A/D converter and a logic operation unit; one end of the A/D converter is connected with the preprocessing unit, and the other end of the A/D converter is connected with the logic operation unit and used for converting the acquired one-path signal to be detected into a digital signal to be output; and the logic operation unit is used for acquiring the digital signal converted by the A/D converter and outputting a signal for triggering alarm under the condition that the digital signal is consistent with a first preset value. The device has the characteristics of high access speed, high stability and low power consumption.

Description

Circuit detection device

Technical Field

The utility model relates to an electronic circuit technical field. In particular to a circuit detection device.

Background

The existing electronic circuit fault detection alarm device technology can only detect a single-path digital signal, and after detection, if a circuit fault is found, an alarm signal is sent, but the fault detection can not be directly carried out on multiple paths of analog signals at the same time, and after the fault is detected, the judgment is carried out to send a corresponding alarm signal, but in actual life application, the fault detection on the multiple paths of analog signals and the corresponding alarm signal are needed at the same time, so that the existing fault detection alarm device technology can not play a good fault detection alarm role in the actual life application. Therefore, it is urgent to develop a fault detection alarm device that can overcome the above-mentioned drawbacks.

Disclosure of Invention

One object of this scheme is to provide a circuit detection device that can directly detect multiple analog fault signals and trigger the sending of an alarm signal at the same time.

In order to achieve the purpose, the scheme is as follows:

a circuit detection device, the device comprising:

the preprocessing unit is used for preprocessing the multiple paths of signals to be detected and outputting the signals to be detected as one path of signals to be detected;

the fault detection unit is used for acquiring the path of signal to be detected and judging whether a signal for triggering alarm is output or not;

wherein the fault detection unit comprises an A/D converter and a logic operation unit;

one end of the A/D converter is connected with the preprocessing unit, and the other end of the A/D converter is connected with the logic operation unit and used for converting the acquired one-path signal to be detected into a digital signal to be output;

and the logic operation unit is used for acquiring the digital signal converted by the A/D converter and outputting a signal for triggering alarm under the condition that the digital signal is consistent with a first preset value.

In a preferred embodiment, after the logic operation unit obtains the digital signal converted by the a/D converter, the logic operation unit does not output a signal for triggering an alarm when the digital signal matches a second preset value.

In a preferred embodiment, the plurality of signals to be measured are a plurality of analog signals.

In a preferred embodiment, the preprocessing unit performs an addition operation on the multiple signals and outputs an operation result to the fault detection unit.

In a preferred embodiment, the preprocessing unit comprises an adder, and the circuit of the adder is a same-direction input summation circuit.

In a preferred embodiment, the fault detection unit further includes a memory for storing the first preset value and the second preset value.

In a preferred embodiment, the memory is a non-volatile memory.

In a preferred embodiment, the apparatus further includes an acquisition unit for acquiring the multiple channels of signals to be measured simultaneously.

In a preferred embodiment, the acquisition unit further comprises a filter.

In a preferred embodiment, the device further comprises an alarm unit, wherein the alarm unit is connected with the logic operation unit and used for sending out an alarm signal when acquiring a signal for triggering an alarm.

The scheme has the following beneficial effects:

the circuit detection device provided by the scheme can completely realize the simultaneous detection of multiple paths of analog fault signals and the emission of corresponding alarm signals. If the A/D conversion unit simultaneously adopts an analog-to-digital converter with four bits, high absolute precision with 1.6mV of Least Significant Bit (LSB) can be realized. The memory in the fault detection unit is a nonvolatile memory such as E2PROM and FLASH, which ensures high access speed, high stability and low power consumption.

Drawings

In order to illustrate the implementation of the solution more clearly, the drawings that are needed in the description of the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the solution, and that other drawings may be derived from these drawings by a person skilled in the art without inventive effort.

FIG. 1 is a schematic diagram of a circuit detecting device according to the present invention;

FIG. 2 is a schematic diagram of an exemplary embodiment of a circuit detection device;

FIG. 3 is a circuit diagram of a second order low pass filter according to an embodiment;

FIG. 4 is a schematic diagram of an embodiment of an adder circuit;

wherein the content of the first and second substances,

1-a collection unit;

2-an adder;

a 3-A/D converter;

4-a memory;

5-a logical operation unit;

6-an alarm;

10-a pre-treatment unit;

20-fault detection unit.

Detailed Description

Embodiments of the present solution will be described in further detail below with reference to the accompanying drawings. It is clear that the described embodiments are only a part of the embodiments of the present solution, and not an exhaustive list of all embodiments. It should be noted that, in the present embodiment, features of the embodiment and the embodiment may be combined with each other without conflict.

Certain terms are used throughout the description and claims to refer to particular components as would be understood by one of ordinary skill in the art. The present specification and the appended claims are intended to cover all such modifications, equivalents, and alternatives falling within the spirit and scope of the present invention as defined by the appended claims. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to," and "couple" is meant to encompass both direct and indirect electrical connections. Therefore, if the first circuit is coupled to the second circuit, it means that the first circuit can be directly electrically connected to the second circuit, or indirectly connected to the second circuit through other components such as resistors.

As shown in fig. 1, in practical applications, in order to be able to directly detect multiple analog circuits at the same time, the present solution provides a circuit detection apparatus, which can directly detect faults of N analog signals at the same time, and trigger a corresponding alarm signal after detecting that a fault occurs in a circuit. The device comprises a preprocessing unit 10 and a fault detection unit 20, wherein the preprocessing unit 10 outputs N received analog signals to be detected into one path of analog signals to be detected, and the fault detection unit is used for acquiring the one path of analog signals to be detected and judging whether signals triggering alarm are output or not; the failure detection unit 20 includes an a/D converter 3 and a logical operation unit 5; the A/D converter 3 receives one path of analog signals to be detected generated by the preprocessing unit 10, then analog-to-digital conversion is carried out on the analog signals to generate digital signals, the generated digital signals are transmitted to the logic operation unit 5 in real time, the logic operation unit 5 compares the digital signals transmitted by the A/D converter 3 in real time with a preset first preset value when a circuit to be detected fails, the first preset value is preferably a circuit signal data value when the circuit to be detected fails, and if the detected signals are consistent with preset circuit signal data when a circuit to be detected fails, signals for triggering alarm of abnormal conditions of the circuit are output; or comparing the signal value with a preset second preset value of the circuit to be detected in the normal state, preferably, the second preset value is a circuit signal data value of the circuit to be detected in the normal state, and if the detected signal is consistent with the preset circuit signal data of the circuit in the normal state, not outputting a signal for triggering alarm.

In one embodiment, the failure detection unit 20 further includes a memory 4, and preferably, the signal data when the circuit to be tested fails and the signal data when the circuit to be tested is in a normal state are pre-stored in the memory 4, and the memory 4 is connected to the logic operation unit 5, and when the logic operation unit 5 performs the comparison and determination, the pre-set preset values of the circuit to be tested when the circuit to be tested fails or the circuit to be tested is in a normal state can be read from the memory 4. The memory 4, which is preferably used, does not lose data stored when power is lost and belongs to a non-volatile memory. An E2PROM or FLASH memory may be employed.

In one embodiment, the preprocessing unit 10 may employ an adder 2 to add the plurality of signals to be detected. And outputting the operation result to the fault detection unit. The circuit of the adder 2 is preferably a same-direction input summing circuit.

In one embodiment, the apparatus further comprises an acquisition unit 1, the acquisition unit 1 being capable of acquiring N signals simultaneously, preferably N analog signals simultaneously.

In another embodiment, the acquisition unit 1 may further include a filtering device, which filters the acquired signal and outputs the filtered signal, and the filtering device may be a second-order low-pass filter.

In one embodiment, the logic operation unit is connected with an alarm 6, and the alarm 6 sends out an alarm signal after receiving the alarm triggering signal output by the logic operation unit 5. Preferably, the alarm 6 is provided with a plurality of terminals for sending out alarm signals, each terminal corresponds to a circuit fault condition, so that when the logic operation unit 5 sends out trigger signals of different circuit fault conditions, the alarm 6 can display different alarm signals, and the fault of the circuit to be detected can be rapidly determined.

The device of the present embodiment will be described with reference to specific examples. The device of the scheme is used for simultaneously detecting the three-way protection circuit of the system, the signals output by the three-way protection circuit of the system are analog signals, and whether the over-temperature (OTP), over-current (OCP) and/or over-voltage (OVP) occur in the system can be known in time through detecting the three-way protection circuit.

As shown in fig. 2, fig. 3 and fig. 4, the circuit detection device includes a preprocessing unit 10, a fault detection unit 20 and an alarm 6, the preprocessing unit 10 includes a collection unit 1, an adder 2, the fault detection unit 20 includes an a/D converter 3 and a logic operation unit 5, and may further include a memory 4.

Analog signals of the three-path protection signal circuit are input from an input end of the acquisition unit 1, the acquisition unit 1 comprises three second-order low-pass filters, and the input analog signals are respectively filtered and shaped by one second-order low-pass filter and then output from an output end. By adopting the second-order low-pass filter, the transition band of the filter can be narrowed, the value of the attenuation slope is increased, and the frequency characteristic is better improved. The three paths of signals after filtering are input into an adder 2 for processing, the circuit in the adder 2 is a syntropy input summation circuit, and the circuit can add the input multiple paths of analog signalsOperation, output of analog signal V_m(ii) a Analog signals output by the adder are subjected to analog-to-digital conversion in an A/D converter 3, digital signals generated by conversion are directly transmitted to a logic operation unit 5, and preset circuit voltage signal reference data of a circuit to be detected in a normal state, an over-temperature (OTP) fault, an over-current (OCP) fault and/or an over-voltage (OVP) fault are stored in a memory 4 connected with the logic operation unit 5, so that when the logic operation unit 5 compares the received signals with information prestored in the memory 4, the fault of the circuit can be judged, and a signal for triggering an alarm 6 is output according to the current circuit fault condition, a plurality of alarm prompting lamps are arranged on the alarm 6, each prompting lamp is preset to correspond to one circuit fault condition, so that when different circuit faults occur, the circuit fault condition can be quickly known through different prompting lamps. The specific detection conditions for the three-way protection signal circuit are as follows:

the over-temperature (OTP), over-current (OCP) and over-voltage (OVP) protection signal circuit voltage is V when the system is in a normal state₁＝V₂＝V₃0V, and when the over-temperature is abnormal, the voltage V of the over-temperature (OTP) protection signal circuit₁2V, voltage V of over-current (OCP) protection signal circuit when over-current is abnormal₂Voltage V of over-voltage (OVP) protection signal circuit when over-voltage is abnormal, 3V₃When the proportionality coefficient of the adder is set to be 0.1 as 4V, no abnormal protection signal is generated under the normal working condition, and V is₁＝V₂＝V₃When the voltage signal output from the adder 2 represents a circuit voltage V equal to 0V_m＝0.1*(V₁+V₂+V₃) V is 0V. The memory 4 is preset with a normal operation reference voltage V_m0V. If no abnormality is found after comparison by the logic operation unit 5, a signal for triggering an alarm is not output. If the circuit has the following faults, the detection device outputs a signal for triggering alarm, and the alarm sends out a corresponding alarm signal based on the preset setting.

First failure case: the over-temperature is abnormal,

if the system is over-temperature, the collection sheetIn the multipath signals collected by the element 1, the voltage of an over-temperature (OTP) protection signal circuit is V₁2V, the voltage of the over-current (OCP) protection signal circuit is V₂0V, the voltage of the over-voltage (OVP) protection signal circuit is V₃When it is 0V, the adder 2 receives the signal and performs addition, i.e., V_m＝0.1*(V₁+V₂+V₃) V is 0.1 ═ 0.2V (2+0+0) V is 0.2V, adder 2 outputs the result, signal data are converted by a/D converter 3, the converted signal is transmitted to logic operation unit 5 in real time, logic operation unit 5 makes comparison and judgment based on the information prestored in memory 4, and the reference voltage when the system over-temperature occurs is prestored in memory 4 as V_mAfter comparison, the logic operation unit 5 outputs a trigger signal, which can trigger the alarm 6 to send an alarm signal of excessive temperature.

Second failure case: the occurrence of an overcurrent abnormality,

if the system is in overcurrent, the voltage of an Overcurrent (OCP) protection signal circuit in the multipath signals collected by the collecting unit 1 is V₂The voltage of the over-temperature (OTP) protection signal circuit is V (3V)₁0V, the voltage of the over-voltage (OVP) protection signal circuit is V₃When it is 0V, the adder 2 receives the signal and performs addition, i.e., V_m＝0.1*(V₁+V₂+V₃) V is 0.1 × 0+3+ 0V is 0.3V, the adder 2 outputs the result, the signal data is converted by the a/D converter 3, the conversion result is transmitted to the logic operation unit 5 in real time, the logic operation unit 5 performs comparison and judgment based on information stored in advance in the memory 4, and the reference voltage V when the system overcurrent occurs is stored in advance in the memory 4_mTherefore, after comparison, the logic operation unit 5 outputs a trigger signal, which can trigger the alarm 6 to send an overcurrent alarm signal.

The third failure case: the over-pressure is abnormal and the pressure of the gas,

if the system is in overvoltage, the voltage of an Overvoltage (OVP) protection signal circuit in the multipath signals collected by the collecting unit 1 is V₃4V, the voltage of the over-temperature (OTP) protection signal circuit is V₁0V, over-current (OCP) protection signalThe voltage of the signal circuit is V₂When it is 0V, the adder 2 receives the signal and performs addition, i.e., V_m＝0.1*(V₁+V₂+V₃) V is 0.1 × 0+0+ 4V is 0.4V, the adder 2 outputs the result, the signal data is converted by the a/D converter 3, the converted signal is transmitted to the logic operation unit 5 in real time, the logic operation unit 5 performs comparison and judgment based on the information prestored in the memory 4, and the reference voltage V when the overvoltage occurs in the system is prestored in the memory 4_mAfter comparison, the logic unit 5 outputs a trigger signal, which can trigger the alarm 6 to send an alarm signal of overvoltage, since 0.4V is obtained.

Fourth failure case: an over-temperature abnormality and an over-current abnormality,

if the system has over-temperature abnormality and over-current abnormality, in the multi-channel signals collected by the collecting unit 1, the voltage of an over-temperature (OTP) protection signal circuit is V1-2V, and the voltage of an over-current (OCP) protection signal circuit is V₂The voltage of an over-voltage (OVP) protection signal circuit is V (3V)₃When it is 0V, the adder 2 receives the signal and performs addition, i.e., V_m＝0.1*(V₁+V₂+V₃) V is 0.1 ═ 0+3+ 0V ═ 0.5V, adder 2 outputs the result, signal data are converted by a/D converter 3, the converted signal is transmitted to logic operation unit 5 in real time, logic operation unit 5 makes comparison and judgment based on the information prestored in memory 4, and memory 4 prestores the reference voltage when the over-temperature and over-current of the system occur as

V_mThe comparison result shows that the logic operation unit 5 outputs a trigger signal which can trigger the alarm 6 to send out an over-temperature and over-current alarm signal, because 0.2V +0.3V is 0.5V.

Fifth failure case: an over-temperature anomaly and an over-pressure anomaly,

if the system has over-temperature abnormality and over-voltage abnormality, the voltage of an over-temperature (OTP) protection signal circuit is V in the multi-channel signals collected by the collecting unit 1₁2V, the voltage of the over-current (OCP) protection signal circuit is V₂0V, the voltage of the over-voltage (OVP) protection signal circuit is V₃4V adder2 adding after receiving the signal, i.e. V_m＝0.1*(V₁+V₂+V₃) V is 0.1 ═ 2+0+ 4V ═ 0.6V, adder 2 outputs the result, signal data are converted through a/D converter 3, the converted signals are transmitted to logic operation unit 5 in real time, logic operation unit 5 makes comparison and judgment based on the information prestored in memory 4, and the reference voltage V when the system generates over-temperature and over-voltage is prestored in memory 4_mSince 0.2V +0.4V is 0.6V, the logic operation unit 5 outputs a trigger signal by comparing with data at the time of a preset circuit failure, and the trigger signal can trigger the alarm device 6 to send out alarm signals of over-temperature and over-voltage.

Sixth failure case: an over-current anomaly and an over-voltage anomaly,

if the system has overcurrent abnormity and overvoltage abnormity, the voltage of an Overtemperature (OTP) protection signal circuit is V in the multipath signals collected by the collecting unit 1₁0V, the voltage of the over-current (OCP) protection signal circuit is V₂The voltage of an over-voltage (OVP) protection signal circuit is V (3V)₃When the adder 2 receives the signal, it performs addition operation, i.e. V, at 4V_m＝0.1*(V₁+V₂+V₃) V is 0.1 ═ 0+3+ 4V ═ 0.7V, adder 2 outputs the result, signal data are converted by a/D converter 3, the converted signal is transmitted to logic operation unit 5 in real time, logic operation unit 5 makes comparison and judgment based on the information prestored in memory 4, and the reference voltage when overcurrent and overvoltage occur in the system is prestored in memory 4 as V_mThe comparison result shows that the logic operation unit 5 outputs a trigger signal which can trigger the alarm 6 to send out alarm signals of overcurrent and overvoltage, because 0.3V +0.4V is 0.7V.

A seventh fault condition: over-temperature anomalies, over-current anomalies, and over-voltage anomalies,

if the system has over-temperature abnormality, over-current abnormality and over-voltage abnormality, the voltage of an over-temperature (OTP) protection signal circuit is V in the multi-channel signals collected by the collecting unit 1₁2V, the voltage of the over-current (OCP) protection signal circuit is V₂Voltage of over-voltage (OVP) protection signal circuit (3V)Is a V₃When the adder 2 receives the signal, it performs addition operation, i.e. V, at 4V_m＝0.1*(V₁+V₂+V₃) V is 0.1 ═ 0.9V (2+3+4) V, adder 2 outputs the result, a/D converter 3 converts the signal, the converted signal is transmitted to logic operation unit 5 in real time, logic operation unit 5 makes a comparison and judgment based on the information prestored in memory 4, and memory 4 prestores the reference voltage V when the system is over-temperature, over-current and over-voltage_mAfter comparison, the logic operation unit 5 outputs a trigger signal which can trigger the alarm 6 to send out alarm signals of overcurrent, overvoltage and overtemperature, because 0.2V +0.3V +0.4V is 0.9V.

It should be understood that the above-described embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that various changes and modifications may be made based on the above description.

Claims

1. A circuit testing apparatus, comprising:

2. The circuit detecting device according to claim 1, wherein the logic operation unit does not output a signal for triggering an alarm when the digital signal matches a second predetermined value after the digital signal converted by the a/D converter is acquired.

3. The circuit testing device of claim 1, wherein the plurality of signals under test are a plurality of analog signals.

4. The circuit testing device of claim 1, wherein the preprocessing unit performs an addition operation on the plurality of signals to be tested, and outputs an operation result to the fault detection unit.

5. The circuit detection device of claim 4, wherein the preprocessing unit comprises an adder, and the circuit of the adder is a same-direction input summation circuit.

6. The circuit detection device of claim 2, wherein the fault detection unit further comprises a memory for storing the first preset value and the second preset value.

7. The circuit detection device of claim 6, wherein the memory is a non-volatile memory.

8. The circuit testing device of claim 1, further comprising a collecting unit for collecting said plurality of signals under test simultaneously.

9. The circuit testing device of claim 8, wherein said acquisition unit further comprises a filter.

10. The circuit detection device according to any one of claims 1 to 8, further comprising an alarm unit connected to the logic operation unit for issuing an alarm signal upon acquiring a signal for triggering an alarm.