CN213368219U - PCB (printed circuit board), chip system and phased array antenna with consistent power supply - Google Patents
PCB (printed circuit board), chip system and phased array antenna with consistent power supply Download PDFInfo
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- CN213368219U CN213368219U CN202022721244.2U CN202022721244U CN213368219U CN 213368219 U CN213368219 U CN 213368219U CN 202022721244 U CN202022721244 U CN 202022721244U CN 213368219 U CN213368219 U CN 213368219U
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Abstract
The application provides a PCB board, a chip system and a phased array antenna with consistent power supply. The tail end of the conducting wire is connected to one end of a ground wire, the head end of the power wire is connected to the positive end of the power supply, and the other end of the ground wire is connected to the negative end of the power supply; one end of the first type of through hole is connected to a power line, one end of the second type of through hole is connected to a conducting line, the other end of the first type of through hole is used for connecting a power pin of the electricity utilization module, and the other end of the second type of through hole is used for connecting a grounding pin of the electricity utilization module; the distance from the point of the power line connected with the first type of through hole of each through hole group to the head end of the power line is equal to the sum of the distances from the point of the conducting line connected with the second type of through hole to the tail end of the conducting line. The path lengths of the power supply loops of the power utilization modules connected with each through hole group are the same. Because the path lengths are the same, the power supply loops of the power utilization modules have the same wiring lengths and the wiring resistance values are the same. The voltage values applied to both ends of each consumer module are the same.
Description
Technical Field
The application relates to the field of PCBs, in particular to a PCB, a chip system and a phased array antenna which are consistent in power supply.
Background
The phased array antenna for realizing the communication function comprises a plurality of phased array chips, and the phased array chips are powered by direct current. The higher the dc voltage value, the higher the gain of the active antenna, and the lower the dc voltage value, the lower the gain of the active antenna. Millimeter wave active phased arrays, which are typically designed in the form of an array, have a rectangular or square shape.
In the prior art, when the number of chips in the phased array antenna is too large, the gain of the front chip and the gain of the rear chip are different, which is not convenient for the phased array antenna to regulate and control the gain.
SUMMERY OF THE UTILITY MODEL
It is an object of the present application to provide a uniformly powered PCB board, a system-on-chip and a phased array antenna to at least partially ameliorate the above problems.
In order to achieve the above purpose, the embodiments of the present application employ the following technical solutions:
in a first aspect, an embodiment of the present application provides a PCB board with uniform power supply, where the PCB board is provided with at least one group of lines, where the group includes a power line, a ground line, and a conducting line;
the tail end of the conducting wire is connected to one end of the ground wire, the head end of the power wire is connected to the positive end of the power supply, and the other end of the ground wire is connected to the negative end of the power supply;
the PCB is provided with a plurality of groups of through holes, and each through hole group comprises a first type of through hole and a corresponding second type of through hole;
one end of the first type of via hole is connected to the power line, one end of the second type of via hole is connected to the conducting wire, the other end of the first type of via hole is used for connecting a power pin of an electricity utilization module, and the other end of the second type of via hole is used for connecting a ground pin of the electricity utilization module;
the distance from the point of the power line connected with the first type of via hole of each via hole group to the head end of the power line is equal to the sum of the distances from the point of the conducting line connected with the second type of via hole to the tail end of the conducting line.
Optionally, the first type of via holes in different via groups have the same resistance value, and the second type of via holes in different via groups have the same resistance value.
Optionally, the first type of via hole and the second type of via hole are both through holes or blind holes.
Optionally, the power line, the ground line and the conducting line are disposed in the same layer in the PCB.
Optionally, the power line is disposed on a power supply layer, the ground line and the conducting line are disposed on a ground layer, and the power supply layer is disposed between the ground layer and the power consumption module, or the ground layer is disposed between the power supply layer and the power consumption module.
Optionally, the power line is disposed on a power supply layer, the ground line is disposed on a ground layer, the conductive line is disposed on a conductive layer, and the power supply layer, the ground layer, and the conductive layer are arranged randomly.
In a second aspect, an embodiment of the present application provides a chip system, where the chip system includes at least one group of chip sets and the PCB board, where the chip set includes at least two chips, where wire groups having the same number as the chip sets are disposed in the PCB board, each wire group includes a power line, a ground line and a conducting line, the PCB board is provided with multiple groups of via groups, and each via group includes a first type of via hole and a corresponding second type of via hole;
the tail end of the conducting wire is connected to one end of the ground wire, the head end of the power wire is connected to the positive end of the power supply, and the other end of the ground wire is connected to the negative end of the power supply;
the power supply pin of each chip is connected to the power supply line of the corresponding line group through the corresponding first type via hole, and the ground pin of each chip is connected to the conducting line of the corresponding line group through the corresponding second type via hole;
the sum of the distance from the point of the power line connected with the power pin of each chip to the head end of the power line and the distance from the point of the conducting line connected with the grounding pin to the tail end of the conducting line is equal.
In a third aspect, the present application provides a phased array antenna, which includes the above chip system.
Compared with the prior art, the PCB, the chip system and the phased array antenna which are consistent in power supply are provided. The tail end of the conducting wire is connected to one end of a ground wire, the head end of the power wire is connected to the positive end of the power supply, and the other end of the ground wire is connected to the negative end of the power supply; one end of the first type of through hole is connected to a power line, one end of the second type of through hole is connected to a conducting line, the other end of the first type of through hole is used for connecting a power pin of the electricity utilization module, and the other end of the second type of through hole is used for connecting a grounding pin of the electricity utilization module; the distance from the point of the power line connected with the first type of through hole of each through hole group to the head end of the power line is equal to the sum of the distances from the point of the conducting line connected with the second type of through hole to the tail end of the conducting line. The path lengths of the power supply loops of the power utilization modules connected with each through hole group are the same. Because the path lengths are the same, the power supply loops of the power utilization modules have the same wiring lengths and the wiring resistance values are the same. Therefore, the voltage values applied to both ends of each consumer module are the same. When the power utilization module is an antenna control chip, the gain of the antenna control chip is kept consistent.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and it will be apparent to those skilled in the art that other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 is a schematic arrangement diagram of a phased array antenna chip provided in an embodiment of the present application;
FIG. 2 is a schematic cross-sectional view of a PCB power supply layer provided by an embodiment of the present application;
FIG. 3 is a schematic cross-sectional view of another PCB power supply layer provided by the embodiment of the present application;
fig. 4 is a connection diagram of a chip system according to an embodiment of the present disclosure.
In the figure: 10-a PCB board; 11-wire group; 12-a group of vias; 20-a chipset; 111-power supply line; 112-a conduction line; 113-ground; 121-first type vias; 122-vias of the second type; 201-chip.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In the description of the present application, it should be noted that the terms "upper", "lower", "inner", "outer", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings or orientations or positional relationships conventionally found in use of products of the application, and are used only for convenience in describing the present application and for simplification of description, but do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present application.
In the description of the present application, it is also to be noted that, unless otherwise explicitly specified or limited, the terms "disposed" and "connected" are to be interpreted broadly, e.g., as being either fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
The phased array antenna for realizing the communication function comprises a plurality of phased array chips, and the phased array chips are powered by direct current. The higher the dc voltage value, the higher the gain of the active antenna, and the lower the dc voltage value, the lower the gain of the active antenna. Optionally, the single-beam packaged chip has a supply voltage in a range of 0.8V to 1.2V at normal temperature, and as the voltage increases, the gain increases stepwise by 0.1V, the maximum value of the gain increase is 3.8dB, and the minimum value of the gain increase is 2.3 dB. Millimeter wave active phased arrays, which are typically designed in the form of an array, have a rectangular or square shape.
Suppose that a certain phased-array antenna has M antenna control chips in the transverse direction and N antenna control chips in the longitudinal direction, and a total of M × N antenna control chips (M, N are integers and are equal to or greater than 2), as shown in fig. 1. In fig. 1, the control chip pitch of the phased array antenna is assumed to be 13.5mm, and of course, the actual distance may be specifically set as required. Typically, the power input is connected to one side of the phased array antenna and two or even layers in the PCB are used as power planes to power the antenna control chip. When two layers are used for power supply, one layer is used for power supply input positive, the other layer is used for power supply input ground, and for fig. 1, the cross section of the power supply layer in the route of the phased array antenna PCB is schematic, as shown in fig. 2, when viewed from the X direction. Referring to fig. 2, the dc power of the antenna control chip is input from the left end, VCC represents the positive power supply terminal and also represents the name of the PCB layer trace, and GND1 represents the negative power supply terminal and also represents the name of the PCB layer trace.
With continued reference to fig. 2, the operating current of all the antenna control chips is I, and the dc supply voltage (between VCC and GND 1) is V. The flow path of the dc supply current is as follows: for control chip 11, which is located in the first row and the first column in fig. 1, the current flows from VCC through V1, into the power pin (VCC pin) of control chip 11, out of the ground pin (GND pin) of control chip 11, through G1, and back to GND 1. Alternatively, the GND pin of the control chip No. 11 to the GND1 layer of the PCB board may be connected by a via. Because No. 11 control chip is close to the power supply input link, can assume No. 11 control chip's actual supply voltage equals V and is in line with phased array antenna's direct current supply voltage.
However, the control chip No. 1N is located in the first row and column N, and the current flows from VCC, sequentially passes through points V1, V2, V3, V4, V … and VN, then flows into the VCC pin of the control chip No. 1N, flows from the GND pin of the control chip No. 1N, sequentially passes through GN, G …, G4, G3, G2 and G1, and finally flows into GND 1.
The direct current power supply path of the No. 1N control chip far exceeds the direct current power supply path of the No. 11 control chip by 2 multiplied by 13.5 (N-1). Meanwhile, the thickness of the copper of the wire in the PCB is limited, direct current resistance exists in the wire, and the resistance of the length of the 2 x 13.5(N-1) wire is assumed to be RN. It can be found that the actual voltage value for supplying power to the control chip No. 1N is V-I × RN. And the actual supply voltage for control chip No. 11 is V volts. The difference between the actual power supply voltage values of the No. 1N control chip and the No. 11 control chip is I multiplied by RN volts. The larger the N value is, the larger the RN value is, the larger the difference between the actual power supply voltage values of the No. 1N control chip and the actual power supply voltage value of the No. 11 control chip is, and the larger the difference between the gains of the No. 1N control chip and the actual power supply voltage value of the No. 11 control chip is. Therefore, the larger N is, the larger the difference between the gains of the control chips at the leftmost end and the rightmost end of each row is, which may affect the gain of the whole phased array antenna, and may cause abnormal operation of the communication system.
In order to overcome the above problems, the embodiment of the present application provides a PCB board 10 with uniform power supply. As shown in fig. 3, the PCB board 10 is provided with at least one group of lines 11, and the group of lines 11 includes a power line 111, a ground line 113, and a conductive line 112.
The tail end (point L) of the conducting wire 112 is connected to one end (point K) of the ground wire 113, the head end (point F) of the power supply wire 111 is connected to the positive end of the power supply, and the other end of the ground wire 113 is connected to the negative end of the power supply.
The PCB board 10 is provided with a plurality of via groups 12, and the via groups 12 include first type vias 121 and corresponding second type vias 122.
One end of the first-type via 121 is connected to the power line 111, such as points V1-VN in fig. 3. One end of the second type via 122 is connected to the via 112, as indicated by points G1 to GN in fig. 3. The other end of the first type via 121 is used for connecting a power pin of the power utilization module, and the other end of the second type via 122 is used for connecting a ground pin of the power utilization module.
The distance from the point of the power line 111 connected to the first-type via 121 to the head end of the power line 111 is equal to the sum of the distances from the point of the through-line 112 connected to the second-type via 122 to the tail end of the through-line 112 in each via group 12.
Specifically, the distance from V1 to F + G1 to L is equal to the distance from Vi to F + Gi to L, and i is any value from 2 to N.
Assuming that the No. i electricity utilization module corresponds to Vi and Gi, the power supply path of the No. 1 electricity utilization module is as follows: the current flows from the point F, flows into a power supply pin (VCC pin) of the No. 1 power utilization module through the point V1, flows out from a grounding pin (GND pin) of the No. 1 power utilization module, sequentially passes through G1, G2, G3, G4, G …, GN, L and K, and returns to the negative power supply terminal. As can be seen from fig. 1, the power supply path length of the power consumption module No. 1 is approximately twice the distance between the power consumption module No. 1 and the power consumption module No. N, and is 2 × 13.5 × (N-1).
The power supply path of the No. N power utilization module is as follows: flows in from the point F, sequentially passes through V1, V2, V3, V4, V … and VN, then flows in a power supply pin (VCC pin) of the No. N power utilization module, flows out from a grounding pin (GND pin) of the No. N power utilization module, sequentially passes through GN, L and K, and returns to the power supply negative terminal. The power supply path length of the No. N electricity module is 2 × 13.5 × (N-1).
The power supply path length of each power consuming module is the same. Assume that the resistance of a PCB trace of length 2X 13.5(N-1) is RN. It can be found that the actual voltage value of each power utilization module is V-I × RN.
Since the distance from the point of the power line 111 connected to the first type via 121 to the head end of the power line 111 is equal to the sum of the distances from the point of the conducting line 112 connected to the second type via 122 to the tail end of the conducting line 112 in each through-hole group 12, the path length of the power supply loop of the power consuming module connected to each through-hole group 12 is the same. Because the path lengths are the same, the power supply loops of the power utilization modules have the same wiring lengths and the wiring resistance values are the same. Therefore, the voltage values applied to both ends of each consumer module are the same.
To sum up, in the PCB provided by the embodiment of the present application, the tail end of the conducting wire is connected to one end of the ground wire, the head end of the power line is connected to the positive end of the power supply, and the other end of the ground wire is connected to the negative end of the power supply; one end of the first type of through hole is connected to a power line, one end of the second type of through hole is connected to a conducting line, the other end of the first type of through hole is used for connecting a power pin of the electricity utilization module, and the other end of the second type of through hole is used for connecting a grounding pin of the electricity utilization module; the distance from the point of the power line connected with the first type of through hole of each through hole group to the head end of the power line is equal to the sum of the distances from the point of the conducting line connected with the second type of through hole to the tail end of the conducting line. The path lengths of the power supply loops of the power utilization modules connected with each through hole group are the same. Because the path lengths are the same, the power supply loops of the power utilization modules have the same wiring lengths and the wiring resistance values are the same. Therefore, the voltage values applied to both ends of each consumer module are the same. When the power utilization module is an antenna control chip, the gain of the antenna control chip is kept consistent.
Optionally, the first type of via 121 in different via groups 12 has the same resistance, and the second type of via 122 in different via groups 12 has the same resistance.
Specifically, the resistances of the first type vias 121 corresponding to V1-VN are the same; the second type vias 122 corresponding to G1-GN have the same resistance. Optionally, the diameters, materials, depths and numbers of the first type via holes 121 corresponding to the V1-VN are all kept the same, are parallel to each other, and are arranged perpendicular to the base surface of the PCB 10; the diameters, materials, depths and numbers of the second type of vias 122 corresponding to G1-GN are all kept the same, are parallel to each other, and are arranged perpendicular to the base surface of the PCB 10.
Optionally, the first type of via 121 and the second type of via 122 are both through holes or blind holes.
Alternatively, when there are fewer power modules, the PCB 10 may only include one routing layer for cost saving, and the power line 111, the ground line 113 and the conducting line 112 are all disposed on the same layer in the PCB 10.
Alternatively, when there are many power modules, the power line 111, the ground line 113, and the conducting line 112 may be disposed on different routing layers for the convenience of routing.
First, the power line 111 is disposed on the power supply layer, the ground line 113 and the conductive line 112 are disposed on the ground layer, and the power supply layer is disposed between the ground layer and the electricity consuming module or the ground layer is disposed between the power supply layer and the electricity consuming module.
In the second embodiment, the power line 111 is disposed on the power supply layer, the ground line 113 is disposed on the ground layer, and the via line 112 is disposed on the conductive layer. The power supply layer, the ground layer, and the conductive layer are arranged arbitrarily. The power supply layer, the ground layer and the conductive layer have the same copper thickness.
The embodiment of the present application further provides a chip system, as shown in fig. 4, the chip system includes at least one group of chip sets 20 and the PCB 10, where the chip set 20 includes at least two chips 201, the PCB 10 is provided with wire groups 11 having the same number as the chip sets 20, each wire group 11 includes a power line 111, a ground line 113 and a conducting line 112, the PCB 10 is provided with a plurality of groups of via groups 12, and each via group 12 includes a first type of via hole 121 and a corresponding second type of via hole 122;
the tail end of the conducting wire 112 is connected to one end of a ground wire 113, the head end of the power wire 111 is connected to the positive end of the power supply, and the other end of the ground wire 113 is connected to the negative end of the power supply;
the power pin of each chip 201 is connected to the power line 111 of the corresponding line group through the corresponding first type via 121, and the ground pin of each chip 201 is connected to the conducting line 112 of the corresponding line group through the corresponding second type via 122;
the sum of the distance from the point of the power line 111 to which the power pin of each chip 201 is connected to the head end of the power line 111 and the distance from the point of the through line 112 to which the ground pin is connected to the tail end of the through line 112 is equal.
Specifically, the voltage values loaded at the two ends of each chip 201 are the same, and the gain generated by each chip 201 is the same, so that the problem of inconsistent chip gain in the prior art is solved.
Optionally, the first type of via 121 in different via groups 12 has the same resistance, and the second type of via 122 in different via groups 12 has the same resistance.
Optionally, the first type via 121 and the second type via 122 may be both through holes or blind holes.
The embodiment of the application also provides a phased array antenna, and the phased array antenna comprises the chip system.
It should be noted that the phased array antenna provided in this embodiment includes the above-mentioned chip system, and the chip system includes the above-mentioned PCB 10, so both the phased array antenna and the chip system can achieve the technical effect corresponding to the PCB 10. For the sake of brevity, the corresponding contents in the above embodiments may be referred to where not mentioned in this embodiment.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (10)
1. The PCB with consistent power supply is characterized in that the PCB is provided with at least one group of line groups, and the line groups comprise power lines, ground lines and conducting lines;
the tail end of the conducting wire is connected to one end of the ground wire, the head end of the power wire is connected to the positive end of the power supply, and the other end of the ground wire is connected to the negative end of the power supply;
the PCB is provided with a plurality of groups of through holes, and each through hole group comprises a first type of through hole and a corresponding second type of through hole;
one end of the first type of via hole is connected to the power line, one end of the second type of via hole is connected to the conducting wire, the other end of the first type of via hole is used for connecting a power pin of an electricity utilization module, and the other end of the second type of via hole is used for connecting a ground pin of the electricity utilization module;
the distance from the point of the power line connected with the first type of via hole of each via hole group to the head end of the power line is equal to the sum of the distances from the point of the conducting line connected with the second type of via hole to the tail end of the conducting line.
2. The PCB of claim 1, wherein the first type of vias in different sets of vias have the same resistance, and the second type of vias in different sets of vias have the same resistance.
3. The PCB of claim 2, wherein the first type of via and the second type of via are both through holes or blind holes.
4. The PCB of claim 1, wherein the power line, the ground line and the conductive line are disposed at a same layer within the PCB.
5. The PCB of claim 1, wherein the power line is disposed on a power supply layer, the ground line and the conductive line are disposed on a ground layer, and the power supply layer is disposed between the ground layer and the power consuming module, or the ground layer is disposed between the power supply layer and the power consuming module.
6. The PCB of claim 1, wherein the power line is disposed on a power supply layer, the ground line is disposed on a ground layer, the via line is disposed on a via layer, and the power supply layer, the ground layer and the via layer are arranged randomly.
7. A chip system, characterized in that the chip system comprises at least one group of chip groups and a PCB board according to any one of claims 1 to 6, wherein the chip groups comprise at least two chips, the PCB board is internally provided with wire groups with the same number as the chip groups, the wire groups comprise power lines, ground lines and conducting lines, the PCB board is provided with a plurality of groups of through holes, and the through holes comprise first type through holes and corresponding second type through holes;
the tail end of the conducting wire is connected to one end of the ground wire, the head end of the power wire is connected to the positive end of the power supply, and the other end of the ground wire is connected to the negative end of the power supply;
the power supply pin of each chip is connected to the power supply line of the corresponding line group through the corresponding first type via hole, and the ground pin of each chip is connected to the conducting line of the corresponding line group through the corresponding second type via hole;
the sum of the distance from the point of the power line connected with the power pin of each chip to the head end of the power line and the distance from the point of the conducting line connected with the grounding pin to the tail end of the conducting line is equal.
8. The chip system of claim 7, wherein the first type of vias in different ones of the via groups have the same resistance value and the second type of vias in different ones of the via groups have the same resistance value.
9. The chip system of claim 8, wherein the first type of via and the second type of via are both through holes or blind holes.
10. A phased array antenna, characterized in that it comprises a chip system according to claim 7.
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| CN202022721244.2U CN213368219U (en) | 2020-11-20 | 2020-11-20 | PCB (printed circuit board), chip system and phased array antenna with consistent power supply |
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| CN202022721244.2U CN213368219U (en) | 2020-11-20 | 2020-11-20 | PCB (printed circuit board), chip system and phased array antenna with consistent power supply |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112333915A (en) * | 2020-11-20 | 2021-02-05 | 成都天锐星通科技有限公司 | PCB (printed circuit board), chip system and phased array antenna with consistent power supply |
| WO2023141232A1 (en) * | 2022-01-21 | 2023-07-27 | Kymeta Corporation | Power planes for a radio frequency (rf) metamaterial antenna |
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2020
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112333915A (en) * | 2020-11-20 | 2021-02-05 | 成都天锐星通科技有限公司 | PCB (printed circuit board), chip system and phased array antenna with consistent power supply |
| CN112333915B (en) * | 2020-11-20 | 2024-07-02 | 成都天锐星通科技有限公司 | Consistent PCB board, chip system and phased array antenna of power supply |
| WO2023141232A1 (en) * | 2022-01-21 | 2023-07-27 | Kymeta Corporation | Power planes for a radio frequency (rf) metamaterial antenna |
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