CN213277412U - Drive chip, drive circuit and display device - Google Patents

Abstract

The embodiment of the utility model discloses drive chip, drive circuit and display device. According to the utility model discloses the driver chip of embodiment includes the boost unit, provides the power for the light source in a poor light; the processing unit is connected with the boosting unit and used for adjusting the storage mode of backlight current switching and the dimming frequency of pulse width modulation to obtain processed information; and the control unit is connected with the processing unit to receive the processed information and control the dimming frequency of the backlight according to the processed information, wherein the processing unit receives a current setting selection signal and determines the storage mode of backlight current switching according to the current setting selection signal. According to the utility model discloses drive chip, drive circuit and display device can the switching of stable control electric current, avoid the picture to flash the screen.

Description

Drive chip, drive circuit and display device

Technical Field

The utility model relates to a show technical field, in particular to driver chip, drive circuit and display device.

Background

A Liquid Crystal Display (LCD) has advantages of good picture quality, small size, light weight, low driving voltage, low power consumption, no radiation, and relatively low manufacturing cost, and is dominant in the field of flat panel displays. The single viewing angle mode liquid crystal display device has not been able to satisfy the user's demand. In addition to the requirement of a wide viewing angle, for example, in the case where peep prevention or the like is required, the display device needs to be switched or adjusted to a narrow viewing angle mode.

In the prior art, a Micro Controller Unit (MCU) writing current mode may have a delay when switching between wide and narrow viewing angles, resulting in an output current I_outThere will be an anomalous spike (peak). Taking the prior HP G4 model as an example, fig. 1 shows a waveform diagram of an output current of a micro control unit according to the prior art, and fig. 2 shows a write current pattern diagram of a micro control unit according to the prior art. As shown in the figure, the micro-control unit write current mode has time delay during wide-narrow switching, resulting in I_outThere will be abnormal peaks, which will cause the image flicker and affect the image quality.

Therefore, a new driving chip, a driving circuit, and a display device are desired, which can overcome the above problems.

SUMMERY OF THE UTILITY MODEL

In view of the above, an object of the present invention is to provide a driving chip, a driving circuit and a display device, so as to stably control current switching and avoid screen flicker.

According to an aspect of the utility model, a driver chip is provided, include: the boosting unit is used for providing power for the backlight light source; the processing unit is connected with the boosting unit and used for adjusting the storage mode of backlight current switching and the dimming frequency of pulse width modulation to obtain processed information; and the control unit is connected with the processing unit to receive the processed information and control the dimming frequency of the backlight according to the processed information, wherein the processing unit receives a current setting selection signal and determines the storage mode of backlight current switching according to the current setting selection signal.

Preferably, the processing unit includes: a memory for storing a set current value; an I2C processor connected with the memory to receive the set current value; a data selector connected with the I2C processor for data selection; and the data analog converter is connected with the data selector to receive the selected data and perform analog-to-digital conversion on the selected data, wherein the I2C processor is connected with the INSEL pin to receive a current setting selection signal and determines a storage mode for switching the backlight current according to the current setting selection signal.

Preferably, the memory has at least two addresses to store the wide viewing angle current and the narrow viewing angle current, respectively; the memory is connected with an ISET pin to receive a current selection signal and write the wide view current or the narrow view current into the I2C processor according to the current selection signal.

Preferably, the storage means comprises digital to analog converter storage and memory storage; and the drive chip determines the storage mode to be stored by the digital-to-analog converter or the memory according to the current setting selection signal.

Preferably, the processing unit further comprises: and the current processing module is connected with the data analog converter to process the current.

Preferably, the control unit comprises at least one output channel; the output channel is respectively connected with the data analog converter and the memory.

Preferably, the driving chip further comprises a triode; the boosting unit is connected with the grid electrode of the triode; the drain electrode of the triode is connected to the LX pin of the driving chip; and the source electrode of the triode is connected to the grounding pin of the driving chip.

Preferably, the processing unit is connected with the SDA pin to receive the data signal; the processing unit is connected with an INSEL pin to receive the current setting selection signal; the processing unit is connected with the PWM pin to receive the pulse width modulation dimming control signal; and the processing unit is connected with the ISET pin to receive the current selection signal.

According to another aspect of the present invention, there is provided a driving circuit, including the driving chip as described above; and the driving chip is connected with the backlight light source to drive backlight.

According to another aspect of the present invention, there is provided a display device including the driving circuit as described above.

According to the utility model discloses driver chip, drive circuit and display device have the electric current in memory and digital-to-analog converter storage to can use according to INSEL's level switch, avoid writing the unusual peak that the electric current delay appears because of driver chip, and then avoid the picture to flash the screen.

According to the utility model discloses drive chip, drive circuit and display device, it is many and nimble to set for the function, can make things convenient for the stable current switching of control.

According to the utility model discloses drive chip, drive circuit and display device are applicable to the model that requires much to the current switching, and the usability is strong.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

fig. 1 shows a waveform diagram of the output current of a micro control unit according to the prior art;

FIG. 2 shows a schematic diagram of the write current pattern of a micro control unit according to the prior art;

fig. 3 shows a schematic packaging diagram of a driver chip according to an embodiment of the present invention;

fig. 4 shows a pin function table of a driver chip according to an embodiment of the present invention;

fig. 5 shows a schematic structural diagram of a driving chip according to an embodiment of the present invention;

fig. 6 shows a schematic structural diagram of a driving chip according to an embodiment of the present invention;

fig. 7 shows a circuit schematic of a drive circuit according to an embodiment of the invention;

fig. 8 shows a waveform diagram of an output current of a driving chip according to an embodiment of the present invention;

fig. 9 shows a work flow diagram of a driving chip according to an embodiment of the present invention.

Detailed Description

Various embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Like elements in the various figures are denoted by the same or similar reference numerals. For purposes of clarity, the various features in the drawings are not necessarily drawn to scale. Moreover, certain well-known elements may not be shown in the figures.

The following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings and examples. Numerous specific details of the invention, such as structure, materials, dimensions, processing techniques and techniques of components, are set forth in the following description in order to provide a more thorough understanding of the invention. However, as will be understood by those skilled in the art, the present invention may be practiced without these specific details.

It will be understood that when a layer, region or layer is referred to as being "on" or "over" another layer, region or layer in describing the structure of the component, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.

Fig. 3 shows a packaging schematic diagram of a driving chip according to an embodiment of the present invention. Fig. 4 shows a pin function table of the driver chip according to an embodiment of the present invention. As shown in fig. 3, the driving chip according to the embodiment of the present invention is provided with 20 pins (pins), and the names, functions, and the like of the respective pins are shown in the pin function table of fig. 4.

It should be noted that the driving chip according to the embodiment of the present invention is not limited thereto. The driving chip (IC) according to the embodiment of the present invention is not limited to the illustrated package. The number of pins (IC pins) of the driving chip and the pin sequence are adjustable, and other functional outputs, such as LDO step-down, VCOM output and the like, can be added according to needs.

Fig. 5 shows a schematic structural diagram of a driving chip according to an embodiment of the present invention. As shown in fig. 5, the driving chip according to the embodiment of the present invention includes a boosting unit 11, a processing unit 12, and a control unit 13.

Specifically, the boosting unit 11 supplies power to the backlight light source, and the boosting unit 11 is, for example, a Boost control (Boost control) module. Alternatively, the boosting unit 11 serves as a boosting circuit for supplying a positive power supply to the backlight. The boosting unit 11 is connected to a gate of a triode, a drain of the triode is connected to an LX pin of the driving chip, and a source of the triode is connected to a ground (PGND) pin of the driving chip, for example; the LX pin is used as a boost converter switch node, and the PGND pin is grounded.

The processing unit 12 adjusts the storage mode of backlight current switching and the dimming frequency of pulse width modulation, and obtains the processed information. Alternatively, the processing unit 12 is connected to the SDA pin to receive the data signal, the SCL pin to receive the clock signal, the INSEL pin to receive the current setting selection signal, the PWM pin to receive the PWM dimming control signal, and the ISET pin to receive the current selection signal. Optionally, the processing unit 12 is connected to the boosting unit 11 for information exchange.

In an alternative embodiment of the present invention, processing unit 12 includes an I2C processor 111, a data selector 112, a digital-to-analog converter 113, and a Memory (MTP) 114. Specifically, the I2C processor 111 is connected to the SDA pin to receive the data signal, to the SCL pin to receive the clock signal, to the instel pin to receive the current setting select signal, and to the PWM pin to receive the PWM dimming control signal, and processes the received signals. A data selector (MUX)112 is coupled to the I2C processor 111 for data selection. The digital-to-analog converter 113 is connected to the data selector 112 to receive the selected data and perform digital-to-analog conversion on the selected data, for example, convert a digital signal into an analog signal. The memory 114 is coupled to the ISET pin for receiving the current select signal and to the I2C processor 111 for information interaction. Optionally, the data selector 112 is coupled to the I2C processor 111 for bi-directional information interaction.

The control unit 13 is connected to the processing unit 12 to receive the processed information and control the dimming frequency of the backlight according to the processed information. Optionally, the control unit 13 comprises at least one output channel, which is connected to the data analog converter 113 and the memory 114, respectively. Optionally, the control unit 13 is connected to the plurality of output channels to control the dimming frequencies of the backlights of different areas respectively.

Fig. 6 shows a schematic structural diagram of a processing unit according to an embodiment of the present invention. As shown in fig. 6, the processing unit 12 according to the embodiment of the present invention includes an I2C processor 111, a data selector 112, a digital-to-analog converter 113, a Memory (MTP)114, and a current processing module 115.

Specifically, the memory 114 stores the set current value. Alternatively, the set current value includes a wide viewing angle range and a narrow viewing angle range. The Memory (MTP)114 has at least two addresses ad1, ad2, wherein address 1(ad1) stores wide view current; address 2(ad2) stores the narrow view current. The memory 114 is connected to an ISET pin to receive a current select (ISET) signal and write a wide view current or a narrow view current into the I2C processor 111 according to the current select signal. Alternatively, the high and low levels of the ISET signal select the two addresses ad1, ad2 at which the memory 114 stores current. When the signal of the ISET pin is at a low level (ISET ═ L), address1 current is written, for example, wide view current stored in the memory 114 is written into the I2C processor 111; when the signal of the ISET pin is at a high level (ISET ═ H), an address 2 current is written, for example, a narrow view current stored in the memory 114 is written into the I2C processor 111.

The I2C processor 111 is connected to the memory 114 to receive a set current value, such as a wide view current or a narrow view current. The I2C processor 111 is connected to the SDA pin to receive the data signal and to the SCL pin to receive the clock signal. The I2C processor 111 is connected to the INSEL pin to receive the current setting selection signal and determines the storage mode for backlight current switching based on the current setting selection signal. The storage mode comprises digital-analog converter storage and memory storage, and the drive chip determines the storage mode to be digital-analog converter storage or memory storage according to the current setting selection signal. Alternatively, the high and low levels of the INSEL signal determine the manner in which the current is stored, e.g., whether the stored current is stored in the memory 114 or the digital-to-analog converter 113. When the signal of the INSEL pin is at a high level (INSEL ═ H), selecting the wide and narrow two-version current stored by the digital-to-analog converter 113; when the signal of the INSEL pin is low (INSEL ═ L), the wide and narrow two-plate currents stored at the two addresses of the memory 114 are selected. Alternatively, the I2C processor 111 acts as an analog switch that can select the current output.

The data selector 112 is coupled to the I2C processor 111 for data selection.

The data analog converter 113 is connected to the data selector 112 to receive the selected data and perform analog-to-digital conversion on the selected data.

The current processing module 115 is connected to the data analog converter 113 to process the current.

Fig. 7 shows a circuit schematic diagram of a driving circuit according to an embodiment of the present invention. As shown in fig. 7, the driving circuit according to the embodiment of the present invention includes the driving chip and the backlight source as described above. The driving chip is connected with the backlight light source to drive the backlight. The backlight source includes, for example, a plurality of LED strings 20.

Specifically, the driver chip is connected to a common voltage terminal (VLED) of the LED string 20 through the LX pin and is grounded through the PGND pin.

The driving chip is connected to the LED strings 20 through a plurality of channel pins. As shown in fig. 7, when the LED strings 20 are six, six channel pins CH1-CH2 corresponding to the driving chip are connected to one LED string 20. Each channel pin is connected to the control unit 13, the data analog converter 113 and the memory 114, respectively.

The LED strings 20 are each connected to a common voltage terminal (VLED).

The driver chip switches and uses the currents stored in the data analog converter 113 and the memory 114 according to the level of the INSEL pin, thereby avoiding an abnormal peak (peak) caused by a write current delay.

Fig. 8 shows a waveform diagram of an output current of the driving chip according to an embodiment of the present invention. As shown in fig. 8, the driving chip according to the embodiment of the present invention has an MTP current (e.g. a current output by the memory 114) and a DAC current (e.g. a current output by the data analog converter 113). When the driver chip performs HVA (Hybrid Viewing Angle) switching, the driver chip switches the output current between MTP current with peak current and DAC current (without peak current), for example, according to the level received by the driver chip INSEL pin. As shown in FIG. 8, the MTP and DAC stored current is switched according to INSEL level, and the current (I) output via MTP is used_out) When the peak exists, the current is switched to the current which is output by the DAC and has no peak, so that abnormal peaks caused by the write current delay of a driving chip (a micro control unit in the driving chip) are avoided.

Fig. 9 shows a work flow diagram of a driving chip according to an embodiment of the present invention. As shown in fig. 9, the driving chip according to the embodiment of the present invention includes the following steps:

in step S901, the driver chip is powered on;

and powering on the driving chip. The driver chip is powered, for example, through the VIN pin of the driver chip (IC).

In step S902, reading a setting parameter;

and reading the set parameters. The I2C processor reads the set parameters, for example, in memory and/or in a data to analog converter, based on signals received from the pins.

In step S903, a view switching signal is detected;

a view angle switching (HVA) signal is detected. When it is detected that there is a view angle switch, for example, it is detected that the wide view angle mode is switched to the narrow view angle mode or the narrow view angle mode is switched to the wide view angle mode, step S904 is executed; when the presence of the view angle switching is not detected, for example, the wide view angle mode or the narrow view angle mode continues, step S909 is executed.

In step S904, a low level signal is input to the INSEL pin;

and inputting the low-level signal to an INSEL pin and further inputting the low-level signal to a driving chip.

In step S905, the MTP current is selected;

the MTP current is selected. When the INSEL pin receives a low level signal, the current stored in the output memory is selected.

In step S906, a current selection signal is detected;

a current selection signal is detected. A current selection signal received by the ISET pin is detected. When detecting that the current selection signal is low, step S907 is executed to output a first current (e.g., a wide view current stored in the address ad1 in the memory, e.g., a WVA current) to the driver chip. When the current selection signal is detected to be high, step S908 is executed to output a second current (driving chip), for example, a narrow viewing angle current stored in the address ad2 in the memory, for example, an NVA current.

In step S909, a high level signal is input to the INSEL pin;

and inputting the high-level signal to an INSEL pin and further inputting the high-level signal to a driving chip.

In step S910, a DAC current is selected;

the DAC current is selected. When the INSEL pin receives a high level signal, the current in the output data analog converter is selected.

In step S911, a written data signal is detected;

the written data signal is detected. Detect the data signal received by the SDA pin. When the write signal is detected to be EQ + I_outThen, step S912 is executed to outputA DAC current; when it is detected that the signal for writing is not EQ + I_outThen, step S913 is executed to output the MTP current.

The utility model also provides a display device including drive circuit as above, according to the utility model discloses drive chip, drive circuit and display device, the storage has different kinds of electric current to can switch in a flexible way, use different kinds of electric current, avoided writing the unusual peak that the electric current time delay appears because of drive chip, and then avoided the picture to flash the screen.

According to the utility model discloses drive chip, drive circuit and display device, it is many and nimble to set for the function, can make things convenient for the stable current switching of control, is applicable to the model that requires many to the current switching, and the usability is strong.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

In accordance with the embodiments of the present invention as set forth above, these embodiments are not exhaustive and do not limit the invention to the precise embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and its practical application, to thereby enable others skilled in the art to best utilize the invention and its various embodiments with various modifications as are suited to the particular use contemplated. The present invention is limited only by the claims and their full scope and equivalents.

Claims (10)

1. A driver chip, comprising:

the boosting unit is used for providing power for the backlight light source;

the processing unit is connected with the boosting unit and used for adjusting the storage mode of backlight current switching and the dimming frequency of pulse width modulation to obtain processed information; and

a control unit connected with the processing unit to receive the processed information and control the dimming frequency of the backlight according to the processed information,

the processing unit receives a current setting selection signal and determines a storage mode of backlight current switching according to the current setting selection signal.

2. The driver chip of claim 1, wherein the processing unit comprises:

a memory for storing a set current value;

an I2C processor connected with the memory to receive the set current value;

a data selector connected with the I2C processor for data selection; and

a data analog converter connected with the data selector to receive the selected data and perform analog-to-digital conversion on the selected data,

the I2C processor is connected with an INSEL pin to receive the current setting selection signal and determines the storage mode of backlight current switching according to the current setting selection signal.

3. The driving chip of claim 2, wherein the memory has at least two addresses to store the wide view current and the narrow view current, respectively;

the memory is connected with an ISET pin to receive a current selection signal and write the wide view current or the narrow view current into the I2C processor according to the current selection signal.

4. The driver chip of claim 2, wherein the storage means comprises digital-to-analog converter storage and memory storage;

and the drive chip determines the storage mode to be stored by the digital-to-analog converter or the memory according to the current setting selection signal.

5. The driver chip of claim 2, wherein the processing unit further comprises:

and the current processing module is connected with the data analog converter to process the current.

6. The driver chip of claim 2, wherein the control unit comprises at least one output channel;

the output channel is respectively connected with the data analog converter and the memory.

7. The driver chip according to claim 1, wherein the driver chip further comprises a transistor;

the boosting unit is connected with the grid electrode of the triode;

the drain electrode of the triode is connected to the LX pin of the driving chip;

and the source electrode of the triode is connected to the grounding pin of the driving chip.

8. The driver chip of claim 1, wherein the processing unit is connected to an SDA pin to receive a data signal;

the processing unit is connected with an INSEL pin to receive the current setting selection signal;

the processing unit is connected with the PWM pin to receive the pulse width modulation dimming control signal; and

the processing unit is connected with the ISET pin to receive a current selection signal.

9. A driver circuit, comprising:

the driver chip of any one of claims 1-8; and

a backlight light source for emitting light from a backlight,

the driving chip is connected with the backlight light source to drive backlight.

10. A display device, comprising:

a driver circuit as claimed in claim 9.

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