CN213276633U - Hub circuit and hub - Google Patents

Hub circuit and hub Download PDF

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Publication number
CN213276633U
CN213276633U CN202022361089.8U CN202022361089U CN213276633U CN 213276633 U CN213276633 U CN 213276633U CN 202022361089 U CN202022361089 U CN 202022361089U CN 213276633 U CN213276633 U CN 213276633U
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signal
hub
control chip
usb
circuit
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廖卓文
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Guangdong Gopod Group Holding Co Ltd
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Guangdong Gopod Group Holding Co Ltd
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Abstract

A concentrator circuit and concentrator, the key circuit produces the key signal according to the operation order induced; the coding circuit converts the key signal into a first USB2.0 signal; when the USB conversion circuit receives a plurality of first USB3.0 signals, the first USB2.0 signals and a plurality of first USB3.0 signals are converted into second USB3.0 signals, and because the coding circuit converts the key signals into the first USB2.0 signals, the USB conversion circuit realizes the synthesis of the first USB2.0 signals and the plurality of first USB3.0 signals, the function of receiving the input of a user is realized in the hub circuit.

Description

Hub circuit and hub
Technical Field
The application belongs to the field of computer input equipment, and particularly relates to a hub circuit and a hub.
Background
A conventional hub circuit includes a first Universal Serial Bus (USB) conversion component and a second USB conversion component; the first USB conversion component converts the first USB2.0 signal into a second USB2.0 signal; the second USB conversion component converts the second USB2.0 signal and the plurality of first USB3.0 signals into a second USB3.0 signal when receiving the plurality of first USB3.0 signals.
Since the function of the conventional hub circuit is limited to the hub function, it cannot receive the input of the user.
SUMMERY OF THE UTILITY MODEL
The present application aims to provide a hub circuit and a hub, and aims to solve the problem that the conventional hub circuit cannot receive the input of a user.
An embodiment of the present application provides a hub circuit, including:
the key circuit is configured to generate a key signal according to the sensed operation instruction;
the coding circuit is connected with the key circuit and is configured to convert the key signal into a first USB2.0 signal;
and the USB conversion circuit is connected with the coding circuit and is configured to convert the first USB2.0 signal and the plurality of first USB3.0 signals into a second USB3.0 signal when receiving the plurality of first USB3.0 signals.
In one embodiment, the key circuit comprises a first key, a second key and a third key;
the first end of the first key, the first end of the second key and the first end of the third key are connected to a power ground, and the second end of the first key, the second end of the second key and the second end of the third key form a key signal output end of the key circuit together.
In one embodiment, the encoding circuit comprises a USB control chip, a first capacitor, a second capacitor, a third capacitor, a first resistor and a second resistor;
the power supply end of the USB control chip and the first end of the first capacitor are connected to a first power supply, the first data input and output end of the USB control chip, the second data input and output end of the USB control chip and the third data input and output end of the USB control chip jointly form a key signal input end of the coding circuit, the positive USB signal output end of the USB control chip is connected with the first end of the second resistor, the negative USB signal output end of the USB control chip is connected with the first end of the first resistor, the first end of the second capacitor, the first end of the third capacitor, the second end of the first resistor and the second end of the second resistor jointly form a first USB2.0 signal output end of the coding circuit, and the second end of the first capacitor, the second end of the second capacitor, the second end of the third capacitor and the grounding end of the USB control chip are connected to a power ground in common.
In one embodiment, the method further comprises the following steps:
a High Definition Multimedia Interface (HDMI) conversion circuit configured to convert a display Interface (DP) signal into an HDMI signal when the DP signal is received.
In one embodiment, the method further comprises the following steps:
and the memory card conversion circuit is connected with the second USB conversion component and is configured to convert the memory card signal into the first USB3.0 signal when receiving the memory card signal.
In one embodiment, the USB conversion circuit includes:
the first USB conversion component is connected with the coding circuit and is configured to convert the first USB2.0 signal into a second USB2.0 signal;
the second USB conversion component is configured to convert the second USB2.0 signal and the plurality of first USB3.0 signals into a second USB3.0 signal when receiving the plurality of first USB3.0 signals.
In one embodiment, the second USB conversion component is further configured to convert a third USB3.0 signal to a third USB2.0 signal when the third USB3.0 signal is received;
the first USB conversion component is further configured to convert the third USB2.0 signal to a fourth USB2.0 signal;
the hub circuit further comprises:
and the audio conversion circuit is connected with the first USB conversion component and is configured to convert the fourth USB2.0 signal into an audio signal.
In one embodiment, the first USB conversion component includes a USB2.0 hub chip, a fourth capacitor, a fifth capacitor, and a sixth capacitor;
a third downlink port positive USB signal end of the USB2.0 hub chip and a third downlink port negative USB signal end of the USB2.0 hub chip jointly form a first USB2.0 signal input end of a first USB conversion component, a fourth downlink port positive USB signal end of the USB2.0 hub chip and a fourth downlink port negative USB signal end of the USB2.0 hub chip jointly form a fourth USB2.0 signal output end of the first USB conversion component, an uplink port positive USB signal end of the USB2.0 hub chip and an uplink port negative USB signal end of the USB2.0 hub chip jointly form a second USB2.0 signal output end of the first USB conversion component and a third USB2.0 signal input end of the first USB conversion component, a 5V voltage input end of the USB2.0 hub chip and a first end of the fourth capacitor are jointly connected to a second power supply, a 3.3V voltage input end of the USB2.0 hub chip and a first end of the fifth capacitor are jointly connected to a third power supply, the 1.8V voltage input end of the USB2.0 concentrator chip and the first end of the sixth capacitor are connected to a fourth power supply in common, and the grounding end of the USB2.0 concentrator chip, the second end of the fourth capacitor, the second end of the fifth capacitor and the second end of the sixth capacitor are connected to a power ground in common.
In one embodiment, the second USB conversion component comprises a USB3.0 hub control chip;
an uplink port positive USB3.0 signal sending data end of the USB3.0 hub control chip, an uplink port negative USB3.0 signal sending data end of the USB3.0 hub control chip, an uplink port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, an uplink port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, an uplink port positive USB2.0 signal data end of the USB3.0 hub control chip and an uplink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a second USB3.0 signal output end of the second USB conversion component and a third USB3.0 signal input end of the second USB conversion component;
a fourth downlink port positive USB2.0 signal data end of the USB3.0 hub control chip and a fourth downlink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a second USB2.0 signal input end of the second USB conversion component;
a second downlink port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a second downlink port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a second downlink port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, a second downlink port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, a second downlink port positive USB2.0 signal data end of the USB3.0 hub control chip and a second downlink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a first USB3.0 signal input end of the second USB conversion component;
a third downlink port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a third downlink port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a third downlink port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, a third downlink port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, a third downlink port positive USB2.0 signal data end of the USB3.0 hub control chip, and a third downlink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a second first USB3.0 signal input end of the second USB conversion component;
a first downstream port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a first downstream port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a first downstream port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, a first downstream port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, a fourth downstream port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a fourth downstream port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a fourth downstream port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, and a fourth downstream port negative USB3.0 signal receiving data end of the USB3.0 hub control chip jointly form a third first USB3.0 signal input end of the second USB conversion assembly.
The embodiment of the utility model provides a still provide a concentrator, the concentrator includes first USB interface and foretell concentrator circuit;
a first USB interface configured to interface the second USB3.0 signal.
Compared with the prior art, the embodiment of the utility model beneficial effect who exists is: because the coding circuit converts the key signal into the first USB2.0 signal, and the USB conversion circuit realizes the synthesis of the first USB2.0 signal and a plurality of first USB3.0 signals, the function of receiving the input of a user is realized in the hub circuit.
Drawings
In order to more clearly illustrate the technical utility model in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a hub circuit according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a USB conversion circuit in a hub circuit according to an embodiment of the present disclosure;
fig. 3 is another schematic structural diagram of a hub circuit according to an embodiment of the present application;
fig. 4 is another schematic structural diagram of a hub circuit according to an embodiment of the present application;
fig. 5 is another schematic structural diagram of a hub circuit according to an embodiment of the present application;
fig. 6 is an exemplary circuit schematic diagram of a hub circuit according to an embodiment of the present application.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present application clearer, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like, refer to an orientation or positional relationship illustrated in the drawings for convenience in describing the present application and to simplify description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
Fig. 1 shows a schematic structural diagram of a hub circuit provided in a preferred embodiment of the present application, and for convenience of description, only the portions related to this embodiment are shown, and detailed descriptions are as follows:
the hub circuit comprises a key circuit 11, an encoding circuit 12 and a USB conversion circuit 13.
And the key circuit 11 is configured to generate a key signal according to the sensed operation instruction. The operation instruction may be a manual key pressing.
And the coding circuit 12 is connected with the key circuit 11 and is configured to convert the key signal into a first USB2.0 signal.
The USB conversion circuit 13 is connected to the encoding circuit 12 and configured to convert the first USB2.0 signal and the plurality of first USB3.0 signals into the second USB3.0 signal when receiving the plurality of first USB3.0 signals.
In particular, the hub circuit may further include one or more second USB interfaces. The one or more second USB interfaces are connected to the second USB conversion component 132, and configured to transfer the one or more first USB3.0 signals.
The key circuit 11 may include a plurality of keys, the key signal may include a plurality of sub-key signals, and the plurality of sub-key signals may implement a plurality of functions, such as playing a previous song, playing a next song, pausing/playing, and the like.
As shown in fig. 2, the USB conversion circuit 13 includes a first USB conversion component 131 and a second USB conversion component 132.
The first USB conversion component 131 is connected to the encoding circuit 12 and configured to convert the first USB2.0 signal into a second USB2.0 signal.
The second USB converting component 132, in conjunction with the first USB converting component 131, is configured to convert the second USB2.0 signal and the plurality of first USB3.0 signals into the second USB3.0 signal when receiving the plurality of first USB3.0 signals.
By the USB conversion circuit 13 including the first USB conversion component 131 and the second USB conversion component 132, it is possible to convert a plurality of USB2.0 signals and a plurality of first USB3.0 signals into one second USB3.0 signal, thereby realizing the combination of USB signals and key signals.
In a specific implementation, the second USB converting component 132 is further configured to convert the third USB3.0 signal into a third USB2.0 signal when receiving the third USB3.0 signal; the first USB conversion component 131 is further configured to convert the third USB2.0 signal into a fourth USB2.0 signal; as shown in fig. 3, the hub circuit also includes an audio conversion circuit 14.
The audio conversion circuit 14 is connected to the first USB conversion component 131, and configured to convert the fourth USB2.0 signal into an audio signal.
By way of example and not limitation, the hub circuit further includes an audio interface; the audio interface switches the audio signal to the playing device so that the playing device plays according to the audio signal.
By further including the audio conversion circuit 14 in the hub circuit, the conversion from the USB signal to the audio signal can be realized, and the use function of the hub circuit is enriched.
As shown in fig. 4, the above-described hub circuit further includes an HDMI converter circuit 15.
The HDMI converting circuit 15 is configured to convert the DP signal into an HDMI signal when receiving the DP signal.
In a specific implementation, the HDMI converting circuit 15 is specifically configured to convert the DP signal into an HDMI signal when receiving the DP signal transmitted by the upper computer 10.
The USB conversion circuit 13 is specifically configured to convert the first USB2.0 signal and the plurality of first USB3.0 signals into a second USB3.0 signal and send the second USB3.0 signal to the upper computer 10 when receiving the plurality of first USB3.0 signals.
The conversion from the DP signal to the HDMI signal and the output of the video signal are realized through the HDMI conversion circuit 15, and the use function of the hub circuit is enriched.
As shown in fig. 5, the above-described hub circuit further includes a memory card changeover circuit 16.
The memory card conversion circuit 16 is connected to the second USB conversion component 132 and configured to convert the memory card signal into the first USB3.0 signal when receiving the memory card signal.
The memory card conversion circuit 16 allows the hub circuit to expand an external memory card, thereby implementing read/write operations on the memory card.
Fig. 6 shows an exemplary circuit structure of a hub circuit provided in an embodiment of the present invention, and for convenience of description, only the portions related to the embodiment of the present invention are shown, and detailed descriptions are as follows:
the key circuit 11 includes a first key K1, a second key K2, and a third key K3.
The first end of the first key K1, the first end of the second key K2 and the first end of the third key K3 are connected to the power ground, and the second end of the first key K1, the second end of the second key K2 and the second end of the third key K3 together form a key signal output terminal of the key circuit 11.
The key circuit 11 only comprises a plurality of keys, and the circuit is simple and reliable.
The encoding circuit 12 includes a USB control chip U1, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first resistor R1, and a second resistor R2.
The power supply end VDD of the USB control chip U1 and the first end of the first capacitor C1 are commonly connected to a first power supply VAA, the first data input/output end P1.0 of the USB control chip U1, the second data input/output end P1.1 of the USB control chip U1 and the third data input/output end P1.2 of the USB control chip U1 jointly form a key signal input end of the encoding circuit 12, the positive USB signal output end DP of the USB control chip U1 is connected with the first end of the second resistor R2, the negative USB signal output end DN of the USB control chip U1 is connected with the first end of the first resistor R1, the first end of the second capacitor C2 and the first end of the third capacitor C3, the second end of the first resistor R1 and the second end of the second resistor R2 together form a first USB2.0 signal output terminal of the encoding circuit 12, and the second end of the first capacitor C1, the second end of the second capacitor C2, the second end of the third capacitor C3 and the ground terminal VSS of the USB control chip U1 are commonly connected to the power ground.
The USB control chip realizes the conversion from the key signal to the USB2.0 signal, has an analog-to-digital conversion function and has high identification precision of the key signal.
The first USB conversion module 131 includes a USB2.0 hub chip U2, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6.
A third downstream port positive USB signal terminal DP3 of the USB2.0 hub chip U2 and a third downstream port negative USB signal terminal DM3 of the USB2.0 hub chip U2 jointly form a first USB2.0 signal input terminal of the first USB conversion component 131, a fourth downstream port positive USB signal terminal DP4 of the USB2.0 hub chip U2 and a fourth downstream port negative USB signal terminal DM4 of the USB2.0 hub chip U2 jointly form a fourth USB2.0 signal output terminal of the first USB conversion component 131, an upstream port positive USB signal terminal UDP of the USB2.0 hub chip U2 and an upstream port negative USB signal terminal UDM of the USB2.0 hub chip U2 jointly form a second USB2.0 signal output terminal of the first USB conversion component 131 and a third USB2.0 signal input terminal of the first USB conversion component 131, a VCC voltage input terminal VCC 635V of the USB2.0 hub chip 2 and a fourth USB voltage input terminal VCC 84 of the USB2.0 hub chip U853 are jointly connected to a first USB power supply capacitor b 8945 and a fifth USB power supply capacitor C85c 36, the 1.8V voltage input terminal VDD18 of the USB2.0 hub chip U2 and the first terminal of the sixth capacitor C6 are commonly connected to the fourth power source VDD, and the ground terminal VSS of the USB2.0 hub chip U2, the second terminal of the fourth capacitor C4, the second terminal of the fifth capacitor C5, and the second terminal of the sixth capacitor C6 are commonly connected to the power ground.
The first USB conversion component 131 is implemented by a USB2.0 hub chip U2, which has the advantages of high integration level and simple and reliable peripheral circuits.
The second USB conversion component 132 includes a USB3.0 hub controller chip U3.
An uplink port positive electrode USB3.0 signal sending data end SSTX0 of the USB3.0 hub control chip U3, an uplink port negative electrode USB3.0 signal sending data end SSTX0 of the USB3.0 hub control chip U3, an uplink port positive electrode USB3.0 signal receiving data end SSRX0 of the USB3.0 hub control chip U3, an uplink port negative electrode USB3.0 signal receiving data end SSRX0 of the USB3.0 hub control chip U3, an uplink port positive electrode USB2.0 signal data end HSD0+ of the USB3.0 hub control chip U3 and an uplink port negative electrode USB2.0 signal data end HSD0 of the USB3.0 hub control chip U3 jointly form a second USB3.0 signal output end of the second USB conversion component 132 and a third USB3.0 signal input end of the second USB conversion component 132;
the positive USB2.0 signal data terminal HSD4+ of the fourth downstream port of the USB3.0 hub control chip U3 and the negative USB2.0 signal data terminal HSD 4-of the fourth downstream port of the USB3.0 hub control chip U3 jointly form a second USB2.0 signal input terminal of the second USB switching component 132.
A second downstream port positive USB3.0 signal transmission data end SSTX2+ of the USB3.0 hub control chip U3, a second downstream port negative USB3.0 signal transmission data end SSTX 2-of the USB3.0 hub control chip U3, a second downstream port positive USB3.0 signal reception data end SSRX2+ of the USB3.0 hub control chip U3, a second downstream port negative USB3.0 signal reception data end SSRX 2-of the USB3.0 hub control chip U3, a second downstream port positive USB2.0 signal data end HSD2+ of the USB3.0 hub control chip U3, and a second downstream port negative USB2.0 signal data end HSD 2-of the USB3.0 hub control chip U3 jointly form a first USB3.0 signal input end of the second USB conversion component 132.
A third downstream port positive USB3.0 signal transmission data end SSTX3+ of the USB3.0 hub control chip U3, a third downstream port negative USB3.0 signal transmission data end SSTX 3-of the USB3.0 hub control chip U3, a third downstream port positive USB3.0 signal reception data end SSRX3+ of the USB3.0 hub control chip U3, a third downstream port negative USB3.0 signal reception data end SSRX 3-of the USB3.0 hub control chip U3, a third downstream port positive USB2.0 signal data end HSD3+ of the USB3.0 hub control chip U3, and a third downstream port negative USB2.0 signal data end HSD 3-of the USB3.0 hub control chip U3 together form a second first USB3.0 signal input end of the second USB conversion component 132.
A first downlink port positive electrode USB3.0 signal sending data end SSTX1 'of the USB3.0 hub control chip U3, a first downlink port negative electrode USB3.0 signal sending data end SSTX 1' of the USB3.0 hub control chip U3, a first downlink port positive electrode USB3.0 signal receiving data end SSRX1 'of the USB3.0 hub control chip U3, a first downlink port negative electrode USB3.0 signal receiving data end SSRX 1' of the USB3.0 hub control chip U3, a fourth downlink port positive USB3.0 signal transmitting data terminal SSTX4 'of the USB3.0 hub control chip U3, a fourth downlink port negative USB3.0 signal transmitting data terminal SSTX 4' of the USB3.0 hub control chip U3, a fourth downlink port positive USB3.0 signal receiving data terminal SSRX4 'of the USB3.0 hub control chip U3, and a fourth downlink port negative USB3.0 signal receiving data terminal SSRX 4' of the USB3.0 hub control chip U3 form a third first USB3.0 signal input terminal of the second USB conversion component 132.
The second USB conversion component 132 is implemented by the USB3.0 hub control chip U3, and since the USB3.0 hub control chip U3 has a plurality of downstream ports, it can implement the conversion of a plurality of USB2.0 signals and a plurality of downstream USB3.0 signals into an upstream USB3.0 signal, thereby enhancing the expansion capability of the hub circuit.
The description of fig. 6 is further described below in conjunction with the working principle:
the user presses the first key K1, the second key K2 or the third key K3, the key circuit 11 generates a key signal and sends the key signal to the first data input/output end P1.0 of the USB control chip U1, the second data input/output end P1.1 of the USB control chip U1 and the third data input/output end P1.2 of the USB control chip U1, and the USB control chip U1 converts the key signal into a first USB2.0 signal and sends the key signal from the positive USB signal output end DP of the USB control chip U1 and the negative USB signal output end DN of the USB control chip U1 to the positive USB signal end DP3 of the third downlink port of the USB2.0 hub chip U2 and the negative USB signal end DM3 of the third downlink port of the USB2.0 hub chip U2.
The USB2.0 hub chip U2 converts the first USB2.0 signal into a second USB2.0 signal and sends the second USB2.0 signal from the positive USB signal terminal UDP of the upstream port of the USB2.0 hub chip U2 and the negative USB signal terminal UDM of the upstream port of the USB2.0 hub chip U2 to the positive USB2.0 signal data terminal HSD4+ of the fourth downstream port of the USB3.0 hub control chip U3 and the negative USB2.0 signal data terminal HSD 4-of the fourth downstream port of the USB3.0 hub control chip U3.
A second downlink port positive USB3.0 signal sending data end SSTX2 of the USB3.0 hub control chip U3, a second downlink port negative USB3.0 signal sending data end SSTX2 of the USB3.0 hub control chip U3, a second downlink port positive USB3.0 signal receiving data end SSRX2 of the USB3.0 hub control chip U3, a second downlink port negative USB3.0 signal receiving data end SSRX2 of the USB3.0 hub control chip U3, a second downlink port positive USB2.0 signal data end HSD2+ of the USB3.0 hub control chip U3, and a second downlink port negative USB2.0 signal data end HSD2 of the USB3.0 hub control chip U3 commonly input a first USB3.0 signal.
A third downlink port positive USB3.0 signal sending data end SSTX3 of the USB3.0 hub control chip U3, a third downlink port negative USB3.0 signal sending data end SSTX3 of the USB3.0 hub control chip U3, a third downlink port positive USB3.0 signal receiving data end SSRX3 of the USB3.0 hub control chip U3, a third downlink port negative USB3.0 signal receiving data end SSRX3 of the USB3.0 hub control chip U3, a third downlink port positive USB2.0 signal data end HSD3+ of the USB3.0 hub control chip U3, and a third downlink port negative USB2.0 signal data end HSD3 of the USB3.0 hub control chip U3, which are used for jointly inputting a second first USB3.0 signal.
A first downlink port positive electrode USB3.0 signal transmitting data terminal SSTX1+ of the USB3.0 hub control chip U3, a first downlink port negative electrode USB3.0 signal transmitting data terminal SSTX 1-of the USB3.0 hub control chip U3, a first downlink port positive electrode USB3.0 signal receiving data terminal SSRX1+ of the USB3.0 hub control chip U3, a first downlink port negative electrode USB3.0 signal receiving data terminal SSRX 1-of the USB3.0 hub control chip U3, a fourth downlink port positive electrode USB3.0 signal transmitting data terminal SSTX4+ of the USB3.0 hub control chip U3, a fourth downlink port negative electrode USB3.0 signal transmitting data terminal SSTX 4-of the USB3.0 hub control chip U3, a fourth downlink port positive electrode USB3.0 signal receiving data terminal SSTX 4-of the USB3.0 hub control chip U3, and a fourth downlink port positive electrode USB3.0 signal receiving data terminal SSRX4+ of the USB3.0 hub control chip U3.
The USB3.0 hub control chip U3 converts the second USB2.0 signal and the plurality of first USB3.0 signals into a second USB3.0 signal and outputs the second USB3.0 signal from an uplink port positive USB3.0 signal transmitting data terminal SSTX0+ of the USB3.0 hub control chip U3, an uplink port negative USB3.0 signal transmitting data terminal SSTX0+ of the USB3.0 hub control chip U3, an uplink port positive USB3.0 signal receiving data terminal SSRX0+ of the USB3.0 hub control chip U3, an uplink port negative USB3.0 signal receiving data terminal SSRX0+ of the USB3.0 hub control chip U3, an uplink port positive USB2.0 signal data terminal HSD0+ of the USB3.0 hub control chip U3 and an uplink port negative USB2.0 signal data terminal HSD 0-of the USB3.0 hub control chip U3 to the upper computer.
The embodiment of the utility model provides a still provide a concentrator, the concentrator includes the first USB interface and the above-mentioned concentrator circuit; the first USB interface is configured to transfer the second USB3.0 signal.
The embodiment of the utility model provides a generate key signal according to the operating command who senses through the keying circuit; the coding circuit converts the key signal into a first USB2.0 signal; when the USB conversion circuit receives a plurality of first USB3.0 signals, the first USB2.0 signals and a plurality of first USB3.0 signals are converted into second USB3.0 signals, and because the coding circuit converts the key signals into the first USB2.0 signals, the USB conversion circuit realizes the synthesis of the first USB2.0 signals and the plurality of first USB3.0 signals, the function of receiving the input of a user is realized in the hub circuit.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.

Claims (10)

1. A hub circuit, comprising:
the key circuit is configured to generate a key signal according to the sensed operation instruction;
the coding circuit is connected with the key circuit and is configured to convert the key signal into a first USB2.0 signal;
and the USB conversion circuit is connected with the coding circuit and is configured to convert the first USB2.0 signal and the plurality of first USB3.0 signals into a second USB3.0 signal when receiving the plurality of first USB3.0 signals.
2. The hub circuit of claim 1, wherein the key circuit comprises a first key, a second key, and a third key;
the first end of the first key, the first end of the second key and the first end of the third key are connected to a power ground, and the second end of the first key, the second end of the second key and the second end of the third key form a key signal output end of the key circuit together.
3. The hub circuit of claim 1, wherein the encoding circuit comprises a USB control chip, a first capacitor, a second capacitor, a third capacitor, a first resistor, and a second resistor;
the power supply end of the USB control chip and the first end of the first capacitor are connected to a first power supply, the first data input and output end of the USB control chip, the second data input and output end of the USB control chip and the third data input and output end of the USB control chip jointly form a key signal input end of the coding circuit, the positive USB signal output end of the USB control chip is connected with the first end of the second resistor, the negative USB signal output end of the USB control chip is connected with the first end of the first resistor, the first end of the second capacitor, the first end of the third capacitor, the second end of the first resistor and the second end of the second resistor jointly form a first USB2.0 signal output end of the coding circuit, and the second end of the first capacitor, the second end of the second capacitor, the second end of the third capacitor and the grounding end of the USB control chip are connected to a power ground in common.
4. The hub circuit of claim 1, further comprising:
an HDMI conversion circuit configured to convert a DP signal into an HDMI signal when the DP signal is received.
5. The hub circuit of claim 1, further comprising:
and the memory card conversion circuit is connected with the second USB conversion component and is configured to convert the memory card signal into the first USB3.0 signal when receiving the memory card signal.
6. The hub circuit of claim 1, wherein the USB conversion circuit comprises:
the first USB conversion component is connected with the coding circuit and is configured to convert the first USB2.0 signal into a second USB2.0 signal;
the second USB conversion component is configured to convert the second USB2.0 signal and the plurality of first USB3.0 signals into a second USB3.0 signal when receiving the plurality of first USB3.0 signals.
7. The hub circuit according to claim 6, wherein the second USB conversion component is further configured to convert a third USB3.0 signal to a third USB2.0 signal when the third USB3.0 signal is received;
the first USB conversion component is further configured to convert the third USB2.0 signal to a fourth USB2.0 signal;
the hub circuit further comprises:
and the audio conversion circuit is connected with the first USB conversion component and is configured to convert the fourth USB2.0 signal into an audio signal.
8. The hub circuit according to claim 6, wherein the first USB conversion component comprises a USB2.0 hub chip, a fourth capacitor, a fifth capacitor, and a sixth capacitor;
a third downlink port positive USB signal end of the USB2.0 hub chip and a third downlink port negative USB signal end of the USB2.0 hub chip jointly form a first USB2.0 signal input end of a first USB conversion component, a fourth downlink port positive USB signal end of the USB2.0 hub chip and a fourth downlink port negative USB signal end of the USB2.0 hub chip jointly form a fourth USB2.0 signal output end of the first USB conversion component, an uplink port positive USB signal end of the USB2.0 hub chip and an uplink port negative USB signal end of the USB2.0 hub chip jointly form a second USB2.0 signal output end of the first USB conversion component and a third USB2.0 signal input end of the first USB conversion component, a 5V voltage input end of the USB2.0 hub chip and a first end of the fourth capacitor are jointly connected to a second power supply, a 3.3V voltage input end of the USB2.0 hub chip and a first end of the fifth capacitor are jointly connected to a third power supply, the 1.8V voltage input end of the USB2.0 concentrator chip and the first end of the sixth capacitor are connected to a fourth power supply in common, and the grounding end of the USB2.0 concentrator chip, the second end of the fourth capacitor, the second end of the fifth capacitor and the second end of the sixth capacitor are connected to a power ground in common.
9. The hub circuit according to claim 6, wherein the second USB conversion component comprises a USB3.0 hub control chip;
an uplink port positive USB3.0 signal sending data end of the USB3.0 hub control chip, an uplink port negative USB3.0 signal sending data end of the USB3.0 hub control chip, an uplink port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, an uplink port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, an uplink port positive USB2.0 signal data end of the USB3.0 hub control chip and an uplink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a second USB3.0 signal output end of the second USB conversion component and a third USB3.0 signal input end of the second USB conversion component;
a fourth downlink port positive USB2.0 signal data end of the USB3.0 hub control chip and a fourth downlink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a second USB2.0 signal input end of the second USB conversion component;
a second downlink port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a second downlink port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a second downlink port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, a second downlink port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, a second downlink port positive USB2.0 signal data end of the USB3.0 hub control chip and a second downlink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a first USB3.0 signal input end of the second USB conversion component;
a third downlink port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a third downlink port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a third downlink port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, a third downlink port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, a third downlink port positive USB2.0 signal data end of the USB3.0 hub control chip, and a third downlink port negative USB2.0 signal data end of the USB3.0 hub control chip jointly form a second first USB3.0 signal input end of the second USB conversion component;
a first downstream port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a first downstream port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a first downstream port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, a first downstream port negative USB3.0 signal receiving data end of the USB3.0 hub control chip, a fourth downstream port positive USB3.0 signal transmitting data end of the USB3.0 hub control chip, a fourth downstream port negative USB3.0 signal transmitting data end of the USB3.0 hub control chip, a fourth downstream port positive USB3.0 signal receiving data end of the USB3.0 hub control chip, and a fourth downstream port negative USB3.0 signal receiving data end of the USB3.0 hub control chip jointly form a third first USB3.0 signal input end of the second USB conversion assembly.
10. A hub, the hub comprising:
a hub circuit according to any one of claims 1 to 9; and
a first USB interface configured to interface the second USB3.0 signal.
CN202022361089.8U 2020-10-21 2020-10-21 Hub circuit and hub Active CN213276633U (en)

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CN202022361089.8U CN213276633U (en) 2020-10-21 2020-10-21 Hub circuit and hub

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