CN213125885U - Integrated drive circuit for alternating current power control and stepless speed regulation control circuit - Google Patents

Abstract

The utility model relates to an integrated drive circuit and stepless speed regulation control circuit for alternating current power control, its characterized in that of wherein integrated drive circuit includes first phase inverter, second phase inverter, third phase inverter, fourth phase inverter, fifth phase inverter, sixth phase inverter, first schmitt phase inverter, second schmitt phase inverter, fourth resistance, third resistance, first parasitic diode, second parasitic diode and zener diode. Compared with the prior art, the utility model has the advantages of: the integrated driving circuit has the advantages of small volume, low power consumption, no heat generation, low cost, high efficiency and good safety.

Description

Integrated drive circuit for alternating current power control and stepless speed regulation control circuit

Technical Field

The utility model relates to an integrated drive circuit and stepless speed control circuit for alternating current power control.

Background

The devices currently available on the market for adjusting ac power output can be classified into four types:

the first method is a power regulation method for a self-coupled transformer, in which two or more coils are wound around a closed iron core, as shown in fig. 1, when an ac power supply is applied to one coil (i.e., a primary coil), an alternating current flows through the coil, the alternating current generates an alternating magnetic field in the iron core, an alternating main magnetic flux generates a self-induced electromotive force in the primary coil, and a mutual-induced electromotive force is induced in the other coil (i.e., a secondary coil). The number of turns of the coil in the motor is increased, the connector is taken out to be connected with the mechanical switch, and stepless alternating current power adjustment can be carried out by increasing the number of turns of the coil. The autotransformer has general application in the occasion that does not need primary, secondary to keep apart, has the advantage that consumptive material is few, longe-lived. However, the high voltage and the low voltage of the autotransformer cannot be insulated, the autotransformer is only suitable for being used at low voltage, and the transformation ratio can only be between 1.05 and 1.25 in order to ensure large output capacity.

The second method is a phase control power regulation method, which utilizes the charging and discharging time of a variable resistor to a capacitor, when the charging voltage reaches the breakdown voltage of a diac, the gate of the triac can obtain a trigger angle generated by a trigger signal with the same charging time, and further control the power of a load end, and the circuit schematic diagram is shown in fig. 2. The phase control power regulation method has the advantages of stepless power regulation and low cost of an electronic control board, but the method can only control a resistive load, has the defects of high noise and easy generation of electromagnetic cutting sound when an inductive load such as an alternating current motor runs at a low rotating speed, and causes variation of alternating current power waveform due to the change of average current obtained by changing the phase of an input power supply, so that the product is difficult to pass EMC/EMI safety certification.

The third method is a frequency conversion H-bridge power regulation method, and the main circuit schematic diagram of the method is shown in FIG. 3, and the method mainly comprises rectification (alternating current to direct current), filtering, inversion (direct current to alternating current), a braking unit, a driving unit, a detection unit, a microprocessing unit and the like. The voltage and the frequency of an output power supply are adjusted by switching on and off the internal MOS tube, so that the aims of saving energy and regulating speed are fulfilled. The variable frequency H bridge power regulation method can achieve high-precision stepless power regulation, but the defects are obvious and mainly reflected in that: 1. after the alternating current is converted into pure direct current or pulsating direct current, the alternating current is converted into similar rotating wave or rotating wave output again through the upper and lower arm drive formed by the singlechip control output and an H bridge, so that the defects of easy conversion loss and poor efficiency are caused; 2. Because the traditional H bridge upper and lower arm structure is used for controlling the alternating current power, the circuit structure has the defect of extremely high cost; 3. Because the traditional H bridge upper and lower arm structure is used for controlling the alternating current power, the circuit structure has the defect of large volume; 4. alternating current is converted into pure direct current or pulsating direct current and then converted into similar spin wave or spin wave for output, the first pulse width modulation signal PWM1 and the second pulse width modulation signal PWM2 (Chinese; 5. because of the direct current or pulsating direct current power supply, the output wave type is six-step square wave or quasi-rotational wave, and the load noise is larger.

The fourth method for adjusting power of the alternating current direct power supply Y-bridge is shown in fig. 4 as a main circuit schematic diagram. In the mode, positive and negative half waves of an alternating current power supply are directly used for automatically and alternately supplying power to the alternating current motor through the third rectifier diode D3 and the fourth rectifier diode D4, the alternating current motor and the second field effect transistor Q2 are subjected to switching action synchronous with positive and negative half cycles of alternating current, and then the negative end is subjected to stepless power control through the width control of modulation pulses. The method only utilizes four diodes, three field effect MOS tubes, an alternating current positive half cycle synchronous signal, an alternating current negative half cycle synchronous signal and a modulation pulse speed regulation signal to form a main framework of the circuit, and has the advantages of small volume, no EMI/EMC interference, no heat emission and low cost; the positive half wave and the negative half wave of the alternating current power supply are directly used for automatically and alternately supplying power to the alternating current motor through a third rectifier diode and a fourth rectifier diode, and two parts of a first MOS (metal oxide semiconductor) tube and a second MOS tube in the upper arm of an H bridge, two groups of corresponding high-voltage bootstrap circuits and 2 groups of corresponding MOS tube driving circuits are replaced; the third rectifier diode and the fourth rectifier diode can automatically change phases according to the power supply frequency, and a control program of traditional single chip microcomputer software for motor phase change is eliminated and simplified; the third rectifier diode and the fourth rectifier diode can automatically change phases, and the problem of conversion efficiency is solved because alternating current is directly used for power supply; and meanwhile, a self-discharge loop is carried out by utilizing the back electromotive force generated by the positive and negative half-wave operation of the alternating current motor in the low level time of the speed regulation pulse, so as to protect the first field effect tube and the second field effect tube. However, the positive and negative half cycle synchronous control signals required by the circuit need many components, the processing cost is high, the linear variable resistor cannot be directly used for power adjustment, in addition, a control loop needs to be formed by using separated components, the circuit consumption power is high, and an AC/DC circuit needs to be additionally used for power supply.

SUMMERY OF THE UTILITY MODEL

The utility model aims to solve the first technical problem that provide an integrated drive circuit for alternating current power control to above-mentioned prior art small, low power dissipation, generate heat for a short time, with low costs, efficient.

The utility model discloses the technical problem that further solve provides an use above-mentioned integrated drive circuit's stepless speed control circuit.

The utility model provides a technical scheme that above-mentioned technical problem adopted is: an integrated driving circuit for alternating current power control, comprising a first inverter, a second inverter, a third inverter, a fourth inverter, a fifth inverter, a sixth inverter, a first schmitt inverter, a second schmitt inverter, a fourth resistor, a third resistor, a first parasitic diode, a second parasitic diode, and a zener diode, wherein:

the positive pole of the first parasitic diode is connected with the first end of the fourth resistor, the second end of the fourth resistor is grounded, the positive pole of the first parasitic diode is connected with the input end of the first phase inverter, the output end of the first phase inverter is connected with the input end of the second phase inverter, the positive pole of the first parasitic diode is connected with the first signal input end of the integrated drive circuit, and the output end of the second phase inverter leads out the first signal output end of the integrated drive circuit;

the anode of the second parasitic diode is connected with the first end of the third resistor, the second end of the third resistor is grounded, the anode of the second parasitic diode is connected with the input end of the third inverter, the output end of the third inverter is connected with the input end of the fourth inverter, the anode of the second parasitic diode is connected with the second signal input end of the integrated drive circuit, and the output end of the fourth inverter leads out the second signal output end of the integrated drive circuit;

the output end of the first Schmitt phase inverter is connected with the input end of the second Schmitt phase inverter, the output end of the second Schmitt phase inverter is connected with the input end of the fifth phase inverter, the output end of the fifth phase inverter is connected with the input end of the sixth phase inverter, the output end of the first Schmitt phase inverter is connected with the oscillation signal output end of the integrated drive circuit, the input end of the first Schmitt phase inverter is connected with the oscillation signal input end of the integrated drive circuit, and the output end of the sixth phase inverter leads out a third signal output end of the integrated drive circuit;

the cathode of the first parasitic diode and the cathode of the second parasitic diode are both connected with the cathode of the voltage stabilizing diode, and the anode of the voltage stabilizing diode is grounded; the anode of the voltage stabilizing diode is led out of the power supply end of the integrated drive circuit, and the cathode of the voltage stabilizing diode is led out of the grounding end of the integrated drive circuit.

As the improvement, the utility model provides an integrated drive circuit still includes protection circuit and comparator, and ground connection behind the battery is connected to the syntropy input of comparator, and this integrated drive circuit's CS end is drawn forth to the reverse input of comparator, and the output and the protection circuit of comparator are connected.

Improve again, the utility model provides an integrated drive circuit is an inside integrated chip who contains above-mentioned integrated drive circuit.

And the peripheral connecting circuit of the integrated drive circuit comprises a second capacitor and an adjustable resistor, wherein the first end of the adjustable resistor is connected with the oscillation signal output end of the integrated drive circuit, the second end of the adjustable resistor is connected with the oscillation signal input end of the integrated drive circuit, the first end of the second capacitor is connected with the oscillation signal input end of the integrated drive circuit, and the second end of the second capacitor is grounded.

In another improvement, the peripheral connection circuit of the integrated driving circuit further comprises a first capacitor, and the first capacitor is connected between the power supply end and the grounding end of the integrated driving circuit.

The utility model provides a technical scheme that above-mentioned further technical problem adopted does: a stepless speed regulation control circuit comprises a first rectifier diode, a second rectifier diode, a third rectifier diode, a fourth rectifier diode, a first field effect tube, a second field effect tube, a third field effect tube, a current detection resistor, an alternating current positive half cycle synchronous signal, an alternating current negative half cycle synchronous signal and a modulation pulse speed regulation signal; the negative electrode of the first rectifier diode is electrically connected with the second output end of the alternating current power supply, the negative electrode of the fourth rectifier diode is electrically connected with the first output end of the alternating current power supply, the positive electrodes of the first rectifier diode and the fourth rectifier diode are grounded, the positive electrode of the third rectifier diode is electrically connected with the first output end of the alternating current power supply, the positive electrode of the second rectifier diode is electrically connected with the second output end of the alternating current power supply, the negative electrode of the second rectifier diode is electrically connected with the drain electrode of the first field-effect tube, the negative electrode of the third rectifier diode is electrically connected with the drain electrode of the second field-effect tube, the source electrode of the first field-effect tube and the source electrode of the second field-effect tube are electrically connected with the drain electrode of the third field-effect tube, and the source; the two ends of the load are connected between the drain electrode of the first field effect transistor and the drain electrode of the second field effect transistor, the alternating current negative half cycle synchronous signal is electrically connected with the grid electrode of the first field effect transistor, the alternating current positive half cycle synchronous signal is electrically connected with the grid electrode of the second field effect transistor, and the modulation pulse speed regulation signal is electrically connected with the grid electrode of the third field effect transistor; the method is characterized in that: the integrated driving circuit comprises an integrated driving circuit, a first resistor and a second resistor, wherein the alternating current positive half cycle synchronous signal, the alternating current negative half cycle synchronous signal and the modulation pulse speed regulation signal are provided by the integrated driving circuit; and a first output end of the alternating current power supply is connected with a first signal input end of the integrated drive circuit after being connected with the second resistor, and a second output end of the alternating current power supply is connected with a second signal input end of the integrated drive circuit after being connected with the first resistor.

Compared with the prior art, the utility model has the advantages of: the integrated driving circuit has the advantages of small volume, low power consumption, no heat generation, low cost, high efficiency and good safety; in the improved scheme, the second capacitor and the adjustable resistor are connected through the periphery to play an oscillation role, the continuous pulse width can be adjusted by changing the impedance of the adjustable resistor, and meanwhile, the average current width of the load is changed, so that the adjustment of the power of the alternating current load is achieved.

Drawings

Fig. 1 is a schematic circuit diagram of a power regulation method of a self-coupled transformer in the prior art.

Fig. 2 is a circuit diagram illustrating a prior art method for adjusting power by phase control.

Fig. 3 is a circuit schematic diagram of a prior art method for adjusting power of a variable frequency H-bridge.

Fig. 4 is a circuit schematic diagram of a power adjustment method of an ac direct-supply Y-bridge in the prior art.

Fig. 5 is a circuit diagram of an integrated driving circuit for ac power control according to an embodiment of the present invention.

Fig. 6 is an interface diagram of the integrated driving circuit for ac power control according to the embodiment of the present invention after being manufactured into an integrated chip.

Fig. 7 is a connection diagram of a peripheral circuit after the integrated driving circuit is manufactured into an ic chip according to an embodiment of the present invention.

Fig. 8 is a circuit connection diagram of the integrated driving circuit and the stepless speed regulation control circuit in the embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the following embodiments.

The present embodiment provides an integrated driving circuit for ac power control, which includes a first inverter U1, a second inverter U2, a third inverter U3, a fourth inverter U4, a fifth inverter U5, a sixth inverter U6, a first schmitt inverter U7, a second schmitt inverter U8, a fourth resistor R4, a third resistor R3, a first parasitic diode D6, a second parasitic diode D5, a zener diode ZD1, a protection circuit, and a comparator U9, as shown in fig. 5, wherein:

the anode of the first parasitic diode D6 is connected with the first end of the fourth resistor R4, the second end of the fourth resistor R4 is grounded, the anode of the first parasitic diode D6 is connected with the input end of the first inverter U1, the output end of the first inverter U1 is connected with the input end of the second inverter U2, the anode of the first parasitic diode D6 is connected with the first signal input end ZCL of the integrated drive circuit, and the output end of the second inverter U2 leads OUT the first signal output end OUT1 of the integrated drive circuit;

the anode of the second parasitic diode D5 is connected to the first end of the third resistor R3, the second end of the third resistor R3 is grounded, the anode of the second parasitic diode D5 is connected to the input end of the third inverter U3, the output end of the third inverter U3 is connected to the input end of the fourth inverter U4, the anode of the second parasitic diode D5 is connected to the second signal input ZCN of the integrated drive circuit, and the output end of the fourth inverter U4 leads to the second signal output OUT2 of the integrated drive circuit;

the output end of the first Schmitt inverter U7 is connected with the input end of the second Schmitt inverter U8, the output end of the second Schmitt inverter U8 is connected with the input end of the fifth inverter U5, the output end of the fifth inverter U5 is connected with the input end of the sixth inverter U6, the output end of the first Schmitt inverter U7 is connected with the oscillation signal output end VR1 of the integrated drive circuit, the input end of the first Schmitt inverter U7 is connected with the oscillation signal input end VR2 of the integrated drive circuit, and the output end of the sixth inverter U6 leads OUT a third signal output end OUT3 of the integrated drive circuit;

the cathode of the first parasitic diode D6 and the cathode of the second parasitic diode D5 are both connected with the cathode of the zener diode ZD1, and the anode of the zener diode ZD1 is grounded; the anode of the zener diode ZD1 leads out the power supply terminal VCC of the integrated drive circuit, and the cathode of the zener diode ZD1 leads out the ground terminal GND of the integrated drive circuit.

The same-direction input end of the comparator U9 is connected with the battery and then grounded, the reverse-direction input end of the comparator U9 leads out the CS end of the integrated drive circuit, and the output end of the comparator U9 is connected with the protection circuit. The protection circuit comprises an over-temperature protection circuit and an over-current protection circuit, and the circuit structures of the over-temperature protection circuit and the over-current protection circuit adopt common circuits in the prior art.

In this embodiment, the integrated driving circuit is an integrated chip including the integrated driving circuit therein, an interface diagram of the integrated chip is shown in fig. 6, and two NC interfaces in the diagram are spare interfaces.

The peripheral connection circuit of the integrated driving circuit includes a second capacitor C2, an adjustable resistor VR, and a first capacitor C1, wherein a first end of the adjustable resistor VR is connected to an oscillation signal output end VR1 of the integrated driving circuit, a second end of the adjustable resistor VR is connected to an oscillation signal input end VR2 of the integrated driving circuit, a first end of the second capacitor C2 is connected to an oscillation signal input end VR2 of the integrated driving circuit, a second end of the second capacitor C2 is grounded, and the first capacitor C1 is connected between a power supply end VCC of the integrated driving circuit and a ground end GND, as shown in fig. 7.

The connection mode of the integrated drive circuit and the stepless speed regulation control circuit is shown in fig. 8, wherein the stepless speed regulation control circuit comprises a first rectifier diode D1, a second rectifier diode D2, a third rectifier diode D3, a fourth rectifier diode D4, a first field effect transistor Q1, a second field effect transistor Q2, a third field effect transistor Q3, a current detection resistor RS, a first resistor R1, a second resistor R2, an alternating current positive half cycle synchronous signal, an alternating current negative half cycle synchronous signal and a modulation pulse speed regulation signal; the cathode of the first rectifier diode D1 is electrically connected with the second output end of the alternating current power supply, the cathode of the fourth rectifier diode D4 is electrically connected with the first output end of the alternating current power supply, the anodes of the first rectifier diode D1 and the fourth rectifier diode D4 are both grounded, the anode of the third rectifier diode D3 is electrically connected with the first output end of the alternating current power supply, the anode of the second rectifier diode D2 is electrically connected with the second output end of the alternating current power supply, the cathode of the second rectifier diode D2 is electrically connected with the drain of the first field-effect transistor Q1, the cathode of the third rectifier diode D3 is electrically connected with the drain of the second field-effect transistor Q2, the source of the first field-effect transistor Q1 and the source of the second field-effect transistor Q2 are both electrically connected with the drain of the third field-effect transistor Q3, and the source of the third field-effect transistor Q3 is grounded after being; the two ends of the load are connected between the drain electrode of the first field effect transistor Q1 and the drain electrode of the second field effect transistor Q2, the alternating current negative half cycle synchronous signal is electrically connected with the grid electrode of the first field effect transistor, the alternating current positive half cycle synchronous signal is electrically connected with the grid electrode of the second field effect transistor, and the modulation pulse speed regulation signal is electrically connected with the grid electrode of the third field effect transistor; the alternating-current positive half cycle synchronous signal, the alternating-current negative half cycle synchronous signal and the modulation pulse speed regulation signal are provided by the integrated drive circuit, wherein a first signal output end OUT1 of the integrated drive circuit provides the alternating-current negative half cycle synchronous signal, a second signal output end OUT2 of the integrated drive circuit provides the alternating-current positive half cycle synchronous signal, and a third signal output end OUT3 of the integrated drive circuit provides the modulation pulse speed regulation signal; the first output end of the alternating current power supply is connected with the first signal input end ZCL of the integrated drive circuit after being connected with the second resistor R2, and the second output end of the alternating current power supply is connected with the second signal input end ZCN of the integrated drive circuit after being connected with the first resistor R1. And the CS end of the integrated drive circuit is electrically connected with the source electrode of the third field effect transistor.

In the positive half duty cycle of the ac power supply, the working current is sent from the first output terminal of the ac power supply, passes through the external high impedance voltage-reducing resistor, i.e., the second resistor R2 in this embodiment, and then is divided into a low-voltage ac positive half cycle synchronization signal with the fourth resistor R4 inside the integrated driving circuit, and then is sent to the second inverter U2 after being shaped by the first inverter U1, so as to reduce the signal into the ac positive half cycle synchronization signal, and at the same time, the two inverters are used to drive the switch of the first fet Q1; in addition, in the positive half duty cycle of the ac power supply, the working current is sent from the first output terminal of the ac power supply, and is divided into a low-voltage positive half cycle synchronous voltage by the external second resistor R2 and the fourth resistor R4 inside the chip of the integrated driving circuit, and at the same time, the current also flows through the first parasitic diode D6, the zener diode ZD1, the first capacitor C1 outside the chip for filtering to the ground, and then flows back to the ac power supply terminal by the ground through the first rectifying one-pole diode D1, so that the purpose that an ac positive half cycle synchronous signal and the dc power supply inside the chip can be taken out by a current loop at the same time is achieved. The principle of the negative half-cycle of the ac power supply is the same as that of the positive half-cycle. Therefore, the integrated driving circuit can achieve self-power-taking after voltage division and rectification through the fourth resistor R4, the third resistor R3, the first parasitic diode D6 and the second parasitic diode D5, an external AC/DC power-taking circuit is not needed, and the purpose of reducing cost can be achieved. An RC oscillating circuit is formed by a second capacitor C2 and an adjustable resistor VR outside the integrated drive circuit, a PWM pulse width speed regulation control signal is formed after the PWM pulse width speed regulation control signal passes through a first Schmitt phase inverter U7 and a second Schmitt phase inverter U8, and then the PWM pulse width speed regulation control signal passes through a fifth phase inverter U5 and a sixth phase inverter U6 and is connected to the grid electrode of a third field effect transistor of the stepless speed regulation control circuit, so that the alternating current load power can be regulated. The purpose of adjusting the alternating current power by using an external linear variable resistor is achieved, a single chip microcomputer does not need to be externally connected, the single chip microcomputer and an alternating current/direct current (AC/DC) circuit powered by the single chip microcomputer are reduced, and the purposes of reducing the size and reducing the cost are achieved. The internal comparator of the integrated drive circuit and the external current detection resistor RS detect the current of the alternating current load, and can protect the over current and short circuit of the alternating current load, so that the aim of safety protection is fulfilled. The temperature detection and the detection of the comparator in the integrated driving circuit are utilized to protect the first field effect transistor Q1, the second field effect transistor Q2 and the third field effect transistor Q3 outside the chip from over-high temperature, so that the purpose of safety protection is achieved. The detection of the internal comparator of the chip to the external input voltage can perform overvoltage and undervoltage protection on an external alternating current input power supply, and the purpose of safety protection is achieved.

Claims (6)

1. An integrated drive circuit for ac power control, comprising a first inverter (U1), a second inverter (U2), a third inverter (U3), a fourth inverter (U4), a fifth inverter (U5), a sixth inverter (U6), a first schmitt inverter (U7), a second schmitt inverter (U8), a fourth resistor (R4), a third resistor (R3), a first parasitic diode (D6), a second parasitic diode (D5), and a zener diode (ZD1), wherein:

the positive electrode of the first parasitic diode (D6) is connected with the first end of the fourth resistor (R4), the second end of the fourth resistor (R4) is grounded, the positive electrode of the first parasitic diode (D6) is connected with the input end of the first inverter (U1), the output end of the first inverter (U1) is connected with the input end of the second inverter (U2), the positive electrode of the first parasitic diode (D6) is connected with the first signal input end (ZCL) of the integrated drive circuit, and the output end of the second inverter (U2) leads OUT the first signal output end (OUT1) of the integrated drive circuit;

the anode of the second parasitic diode (D5) is connected with the first end of the third resistor (R3), the second end of the third resistor (R3) is grounded, the anode of the second parasitic diode (D5) is connected with the input end of the third inverter (U3), the output end of the third inverter (U3) is connected with the input end of the fourth inverter (U4), the anode of the second parasitic diode (D5) is connected with the second signal input end (ZCN) of the integrated drive circuit, and the output end of the fourth inverter (U4) leads OUT the second signal output end (OUT2) of the integrated drive circuit;

the output end of the first Schmitt inverter (U7) is connected with the input end of the second Schmitt inverter (U8), the output end of the second Schmitt inverter (U8) is connected with the input end of the fifth inverter (U5), the output end of the fifth inverter (U5) is connected with the input end of the sixth inverter (U6), the output end of the first Schmitt inverter (U7) is connected with the oscillation signal output end (VR1) of the integrated drive circuit, the input end of the first Schmitt inverter (U7) is connected with the oscillation signal input end (VR2) of the integrated drive circuit, and the output end of the sixth inverter (U6) leads OUT a third signal output end (OUT3) of the integrated drive circuit;

the cathode of the first parasitic diode (D6) and the cathode of the second parasitic diode (D5) are both connected with the cathode of the zener diode (ZD1), and the anode of the zener diode (ZD1) is grounded; the anode of the voltage stabilizing diode (ZD1) is led out of the power supply end (VCC) of the integrated drive circuit, and the cathode of the voltage stabilizing diode (ZD1) is led out of the ground end (GND) of the integrated drive circuit.

2. The integrated drive circuit of claim 1, wherein: the protection circuit and the comparator (U9) are further included, the equidirectional input end of the comparator (U9) is connected with the battery and then grounded, the CS end of the integrated drive circuit is led out from the reverse input end of the comparator (U9), and the output end of the comparator (U9) is connected with the protection circuit.

3. The integrated drive circuit of claim 1, wherein: the integrated driving circuit is an integrated chip internally comprising the integrated driving circuit.

4. The integrated drive circuit of claim 1, wherein: the peripheral circuit is further included, the peripheral connection circuit comprises a second capacitor (C2) and an adjustable resistor (VR), wherein a first end of the adjustable resistor (VR) is connected with an oscillation signal output end (VR1) of the integrated drive circuit, a second end of the adjustable resistor (VR) is connected with an oscillation signal input end (VR2) of the integrated drive circuit, a first end of the second capacitor (C2) is connected with an oscillation signal input end (VR2) of the integrated drive circuit, and a second end of the second capacitor (C2) is grounded.

5. The integrated drive circuit of claim 1, wherein: the peripheral connection circuit of the integrated drive circuit comprises a first capacitor (C1), and the first capacitor (C1) is connected between a power supply terminal (VCC) and a ground terminal (GND) of the integrated drive circuit.

6. A stepless speed regulation control circuit applying the integrated drive circuit as claimed in claim 1, comprising a first rectifier diode (D1), a second rectifier diode (D2), a third rectifier diode (D3), a fourth rectifier diode (D4), a first field effect transistor (Q1), a second field effect transistor (Q2), a third field effect transistor (Q3), a current detection Resistor (RS), an alternating current positive half cycle synchronous signal, an alternating current negative half cycle synchronous signal and a modulation pulse speed regulation signal; wherein the cathode of the first rectifier diode (D1) is electrically connected with the second output end of the alternating current power supply, the cathode of the fourth rectifier diode (D4) is electrically connected with the first output end of the alternating current power supply, the anodes of the first rectifier diode (D1) and the fourth rectifier diode (D4) are both grounded, the anode of the third rectifier diode (D3) is electrically connected with the first output end of the alternating current power supply, the anode of the second rectifier diode (D2) is electrically connected with the second output end of the alternating current power supply, the cathode of the second rectifier diode (D2) is electrically connected with the drain of the first field-effect transistor (Q1), the cathode of the third rectifier diode (D3) is electrically connected with the drain of the second field-effect transistor (Q2), the source of the first field-effect transistor (Q1) and the source of the second field-effect transistor (Q2) are both electrically connected with the drain of the third field-effect transistor (Q3), and the source of the third field-effect transistor (Q3) is grounded after being connected with the; the two ends of the load are connected between the drain electrode of the first field effect transistor (Q1) and the drain electrode of the second field effect transistor (Q2), the alternating current negative half cycle synchronous signal is electrically connected with the grid electrode of the first field effect transistor, the alternating current positive half cycle synchronous signal is electrically connected with the grid electrode of the second field effect transistor, and the modulation pulse speed regulation signal is electrically connected with the grid electrode of the third field effect transistor; the method is characterized in that: further comprising an integrated drive circuit according to claim 1, and a first resistor (R1) and a second resistor (R2), the ac positive half cycle sync signal, the ac negative half cycle sync signal and the pwm pulse rate signal being provided by the integrated drive circuit, wherein the first signal output (OUT1) of the integrated drive circuit provides the ac negative half cycle sync signal, the second signal output (OUT2) of the integrated drive circuit provides the ac positive half cycle sync signal, and the third signal output (OUT3) of the integrated drive circuit provides the pwm pulse rate signal; and a first output end of the alternating current power supply is connected with the first signal input end (ZCL) of the integrated drive circuit after being connected with the second resistor (R2), and a second output end of the alternating current power supply is connected with the second signal input end (ZCN) of the integrated drive circuit after being connected with the first resistor (R1).

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