CN212991094U - Packaging structure of power module - Google Patents

Packaging structure of power module Download PDF

Info

Publication number
CN212991094U
CN212991094U CN202021707905.XU CN202021707905U CN212991094U CN 212991094 U CN212991094 U CN 212991094U CN 202021707905 U CN202021707905 U CN 202021707905U CN 212991094 U CN212991094 U CN 212991094U
Authority
CN
China
Prior art keywords
base island
package structure
base
dcb substrate
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202021707905.XU
Other languages
Chinese (zh)
Inventor
陈颜
吴美飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Silan Microelectronics Co Ltd
Original Assignee
Hangzhou Silan Microelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hangzhou Silan Microelectronics Co Ltd filed Critical Hangzhou Silan Microelectronics Co Ltd
Priority to CN202021707905.XU priority Critical patent/CN212991094U/en
Application granted granted Critical
Publication of CN212991094U publication Critical patent/CN212991094U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601Structure
    • H01L2224/0603Bonding areas having different sizes, e.g. different heights or widths
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48095Kinked
    • H01L2224/48096Kinked the kinked part being in proximity to the bonding area on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H01L2224/48139Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901Structure
    • H01L2224/4903Connectors having different sizes, e.g. different diameters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements

Abstract

The utility model relates to a packaging structure of power module, include: a direct copper bonding DCB substrate having a first side and including a plurality of base islands; a plurality of power devices respectively disposed on the plurality of base islands; and a plurality of pins adjacent to the first side; wherein at least a portion of the plurality of leads are soldered to the direct copper bond DCB substrate.

Description

Packaging structure of power module
Technical Field
The utility model relates to an integrated semiconductor technology field especially relates to a power module's packaging structure.
Background
The conventional single-row Direct-insertion sip (system in package) package structure of the power module does not have a Direct Copper Bonding (DCB) substrate, and needs to be cooled by a plastic package body. Therefore, the heat dissipation capability of the package structure is poor, and the power level of the product is limited.
While some single in-line SIP package structures also have a direct copper bonded DCB substrate, such structures require an additional Printed Circuit Board (PCB) to implement. By way of example, such a package structure generally includes a frame, a PCB, and a direct copper bond DCB substrate. The frame lead is welded with the PCB, the drive control chip is arranged on the PCB, the power chip is arranged on the direct copper bonding DCB substrate, and the power chip is interconnected with the PCB through a bonding wire. However, this package structure has a PCB inside, so the packaging process is complicated, the cost is high, and delamination is easily generated.
On the other hand, when the number of leads of the lead frame is large and the size of the leads is small, coplanarity of the leads is poor, and a problem of partial lead cold joint exists when all the leads are simultaneously welded with the direct copper bonding DCB substrate. In addition, the direct copper bonding DCB substrate is small in size and does not have enough space for all leads of the lead frame to be soldered to the direct copper bonding DCB substrate.
In view of this, the prior art is subject to further improvement.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the technical problem that a packaging structure of power module is provided, the power module who adopts this packaging structure has higher power level, and the volume is less and have good heat-sinking capability.
The utility model discloses a solve above-mentioned technical problem and the technical scheme who adopts provides a power module's packaging structure, include: a direct copper bonded DCB substrate having a first side and comprising a plurality of base islands; a plurality of power devices respectively disposed on the plurality of base islands; and a plurality of pins proximate to the first side; wherein at least a portion of the plurality of leads are soldered to the direct copper bonding DCB substrate.
In an embodiment of the present invention, at least a portion of the plurality of leads are electrically connected to the DCB substrate through bonding wires, and at least a portion of the plurality of leads are electrically connected to the DCB substrate through soldering.
In an embodiment of the present invention, the package structure is a single in-line package.
In an embodiment of the present invention, the direct copper-bonded DCB substrate further has a second side adjacent to the first side, and a third side and a fourth side opposite to the first side and the second side, respectively.
In an embodiment of the present invention, the direct copper bonding DCB substrate includes a copper layer, the copper layer including a first base island, a second base island, and a third base island; the second base island partially surrounds the first base island, the third base island partially surrounds the second base island, the first base island, the second base island and the third base island respectively comprise a chip carrying table and a first leading-out end, the chip carrying table and the first leading-out end form a continuous conductive structure through copper-clad routing, the first leading-out end of the first base island, the first leading-out end of the second base island and the first leading-out end of the third base island are sequentially arranged at a first end of the first side edge, the chip carrying tables of the first base island, the second base island and the third base island are located at a second end, opposite to the first end, of the first side edge, the chip carrying table of the first base island is close to the fourth side edge, the chip carrying table of the second base island is close to the third side edge and the fourth side edge, and the chip carrying table of the third base island is close to the third side edge.
In an embodiment of the present invention, the copper layer further includes a fourth base island, the fourth base island is close to the second side and the third side and partially surrounds the third base island, and the fourth base island includes a slide holder and a first leading-out terminal.
In an embodiment of the present invention, the copper layer further includes a fifth base island, the fifth base island is close to the first side, and the first base island partially surrounds the fifth base island.
In an embodiment of the present invention, the first leading-out terminals of the first base island, the second base island, the third base island and the fourth base island are respectively welded to the corresponding pins.
In an embodiment of the present invention, the plurality of power devices include: three low-side power devices disposed on the first, second, and third base islands, respectively; and three high-side power devices disposed on the fourth base island.
In an embodiment of the present invention, the package structure further includes a driving controller disposed on the fifth base island.
In an embodiment of the present invention, the driving controller is electrically connected to the corresponding pins through bonding wires and/or copper-clad wires, and is electrically connected to the three high-side power devices and the three low-side power devices through bonding wires and/or copper-clad wires.
In an embodiment of the present invention, the copper layer further includes three second type terminals near the fourth side, and the three second type terminals are electrically connected to the three low-side power devices, respectively.
In an embodiment of the present invention, the second type terminals are respectively welded to the corresponding pins.
In an embodiment of the present invention, the three high-side power devices and the three low-side power devices respectively include a power tube and a fast recovery diode; and the fast recovery diode is electrically connected with the corresponding power tube through a routing wire.
The utility model discloses an in an embodiment, a plurality of pins include high pressure pin and low pressure pin, high pressure pin is close to the first end of first side, the low pressure pin is close to first side with the second end that first end is relative.
In an embodiment of the present invention, the package structure further includes a thermistor disposed on the plurality of pins, the thermistor is connected to at least two of the plurality of pins, and is adapted to detect the temperature of the power module.
In an embodiment of the present invention, the space between the first side and the lead pin electrically connected to the direct copper bonding DCB substrate is greater than 0.5 mm.
In an embodiment of the present invention, the package structure further includes a package body covering the direct copper bonding DCB substrate, and the plurality of pins extend out of the package body.
The utility model discloses owing to adopt above technical scheme, make it compare with prior art, have following apparent advantage:
the utility model discloses a power module's packaging structure is through setting up three low side power device respectively on first base island, second base island and third base island, sets up three high side power device on fourth base island to with drive controller setting on fifth base island, make this power module have higher power level, the volume is less and have good heat-sinking capability.
On the other hand, the utility model discloses a power module's packaging structure is through locating the both ends that are close to first side on the direct copper bonding DCB substrate respectively with high-pressure pin and the low pressure pin in a plurality of pins to electric leakage, short circuit scheduling problem that produce easily when can effectively solving high-pressure pin and low pressure pin staggered arrangement.
Moreover, the first leading-out end and the second leading-out end which are positioned at two sides of the direct copper bonding DCB substrate are respectively welded with the corresponding pins, so that the packaging structure after the direct copper bonding DCB substrate is connected with the pins still has good structural stability and flatness.
Meanwhile, the coplanarity of the plurality of leads is poor due to the size of the package and when the number of the leads is large. Therefore, at least part of the plurality of pins are electrically connected with the direct copper bonding DCB substrate in a routing mode, the cold joint risk possibly brought when the plurality of pins are simultaneously connected with the direct copper bonding DCB substrate in a welding mode can be effectively avoided, and good contact between the direct copper bonding DCB substrate and the plurality of pins is ensured.
Furthermore, the utility model discloses an encapsulation structure need not PCB, realizes simply, and has reduced the cost of manufacture.
Drawings
In order to make the aforementioned objects, features and advantages of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings, wherein:
fig. 1 is a top view of a direct copper bonding DCB substrate of an encapsulation structure of a power module according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a package structure of a power module according to an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than those specifically described herein, and thus the present invention is not limited by the specific embodiments disclosed below.
As used in this application and the appended claims, the terms "a," "an," "the," and/or "the" are not intended to be inclusive in the singular, but rather are intended to be inclusive in the plural unless the context clearly dictates otherwise. In general, the terms "comprises" and "comprising" merely indicate that steps and elements are included which are explicitly identified, that the steps and elements do not form an exclusive list, and that a method or apparatus may include other steps or elements.
In describing the embodiments of the present invention in detail, the cross-sectional view showing the structure of the device is not enlarged partially according to the general scale for the convenience of illustration, and the schematic diagram is only an example, which should not limit the protection scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary words "below" and "beneath" can encompass both an orientation of up and down. The device may have other orientations (rotated 90 degrees or at other orientations) and the spatial relationship descriptors used herein should be interpreted accordingly. Further, it will also be understood that when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It will be understood that when an element is referred to as being "on," "connected to," "coupled to" or "contacting" another element, it can be directly on, connected or coupled to, or contacting the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly on," "directly connected to," "directly coupled to" or "directly contacting" another element, there are no intervening elements present. Similarly, when a first component is said to be "in electrical contact with" or "electrically coupled to" a second component, there is an electrical path between the first component and the second component that allows current to flow. The electrical path may include capacitors, coupled inductors, and/or other components that allow current to flow even without direct contact between the conductive components.
The utility model discloses a following embodiment provides a packaging structure of power module, and the power module who adopts this packaging structure has higher power level, and the volume is less and have good heat-sinking capability.
Fig. 1 is a top view of a direct copper bonding DCB substrate of an encapsulation structure of a power module according to an embodiment of the present invention. Fig. 2 is a schematic diagram of a package structure of a power module according to an embodiment of the present invention.
The package structure of the power module will be described with reference to fig. 1 and 2. It is to be understood that the following description is merely exemplary, and that various changes may be made by those skilled in the art without departing from the spirit of the invention.
For the sake of brevity, the specific structure of the direct copper bonded DCB substrate 100 in the package structure 10 of the power module shown in fig. 2 is not labeled again.
Referring to fig. 1 and 2, a package structure 10 of a power module includes a direct copper bonded DCB substrate 100, the direct copper bonded DCB substrate 100 having a first side 101 and including a plurality of base islands. The package structure 10 of the power module further includes a plurality of power devices respectively disposed on the plurality of base islands and a plurality of pins 300 near the first side 101. Wherein at least a portion of the plurality of leads 300 are soldered to the direct copper bonded DCB substrate 100.
In an embodiment of the present invention, at least a portion of the plurality of leads 300 is electrically connected to the DCB substrate 100 by wire bonding, and at least a portion of the plurality of leads 300 is electrically connected to the DCB substrate 100 by soldering.
Wire Bonding, also known as pressure Bonding, binding, Bonding or Wire Bonding, refers to the use of metal wires (e.g., gold wires, aluminum wires, etc.) and the use of heat and pressure or ultrasonic energy to complete the connection of the interconnection lines inside the solid-state circuits in microelectronic devices, such as the connection between power devices (chips) and lead frames.
In an embodiment of the present invention, the package structure 10 is a single in-line package.
In an embodiment of the present invention, the direct copper bonding DCB substrate 100 further has a second side 102 adjacent to the first side 101, and a third side 103 and a fourth side 104 opposite to the first side 101 and the second side 102, respectively.
In an embodiment of the present invention, the direct copper bonding DCB substrate 100 includes a copper layer (shaded in the figure) including a first base island 111, a second base island 112, and a third base island 113; the second base island 112 partially surrounds the first base island 111, the third base island 113 partially surrounds the second base island 112, and the first base island 111, the second base island 112 and the third base island 113 respectively include a chip holder (i.e., a chip holder 111a, a chip holder 112a and a chip holder 113a) and a first type terminal (i.e., a first type terminal 111b, a first type terminal 112b and a first type terminal 113 b).
In some examples, the stage and the first type of terminals form a continuous conductive structure with copper-clad traces. For example, the stage 111a and the first type leading-out terminal 111b, the stage 112a and the first type leading-out terminal 112b, and the stage 113a and the first type leading-out terminal 113b form a continuous conductive structure through copper-clad wiring, respectively.
The first terminals (i.e., the first terminal 111b, the first terminal 112b, and the first terminal 113b) of the first base island 111, the second base island 112, and the third base island 113 are sequentially disposed at the first end 101a of the first side 101. The stage (i.e., stage 111a, stage 112a, and stage 113a) of the first base island 111, the second base island 112, and the third base island 113 is located at a second end 101b of the first side 101 opposite the first end 101 a.
In some embodiments, the stage 111a of the first base island 111 is adjacent to the fourth side 104, the stage 112a of the second base island 112 is adjacent to the third side 103 and the fourth side 104, and the stage 113a of the third base island 113 is adjacent to the third side 103.
Direct copper bonding DCB substrate in an embodiment of the present invention, the copper layer further includes a fourth base island 114, the fourth base island 114 is adjacent to the second side 102 and the third side 103 and partially surrounds the third base island 113, and the fourth base island 114 includes a stage 114a and a first type terminal 114 b.
In an embodiment of the present invention, the copper layer further includes a fifth base island 115, the fifth base island 115 is close to the first side 101, and the first base island 111 partially surrounds the fifth base island 115.
It should be noted that "close" may mean that the distance to one side is smaller than the distance to the other side opposite thereto. For example, the fifth base island 115 is close to the first side 101, which means that the distance of the fifth base island 115 relative to the first side 101 is smaller than the distance of the third side 103 opposite to the first side 101, and so on.
In an embodiment of the present invention, the first type terminals (i.e., the first type terminal 111b, the first type terminal 112b, the first type terminal 113b, and the first type terminal 114b) of the first base island 111, the second base island 112, the third base island 113, and the fourth base island 114 are respectively soldered to the corresponding pins.
For example, referring to fig. 2, four first-type terminals of the direct copper-bonding DCB substrate 100 may be soldered to four of the plurality of leads 300, respectively, by solder.
In an embodiment of the present invention, the plurality of power devices include: three low-side power devices (i.e., low-side power device 210, low-side power device 220, and low-side power device 230) disposed on first base island 111, second base island 112, and third base island 113, respectively; three high-side power devices (i.e., high-side power device 240, high-side power device 250, and high-side power device 260) disposed on the fourth base island 114.
In an embodiment of the present invention, the package structure 10 may further include a driving controller 270 disposed on the fifth base island 115.
Illustratively, the driving controller 270 may include a driving control chip, such as a high voltage gate driving chip. The high-side power device and the low-side power device may be a high-side power chip and a low-side power chip, respectively, such as an Insulated Gate Bipolar Transistor (IGBT) chip, but the present invention is not limited thereto.
In an embodiment of the present invention, the driving controller 270 is electrically connected to the corresponding pins through bonding wires and/or copper-clad wires, and is electrically connected to the three high-side power devices (i.e. the high-side power device 240, the high-side power device 250, and the high-side power device 260) and the three low-side power devices (i.e. the low-side power device 210, the low-side power device 220, and the low-side power device 230) through bonding wires and/or copper-clad wires.
In an embodiment of the present invention, the copper layer further includes three second type terminals (i.e. a second type terminal 121, a second type terminal 122 and a second type terminal 123) near the fourth side 104, and the three second type terminals are electrically connected to the three low side power devices respectively.
For example, the second type of outlet 121 is electrically connected to the low side power device 210, the second type of outlet 122 is electrically connected to the low side power device 220, and the second type of outlet 123 is electrically connected to the low side power device 230.
In an embodiment of the present invention, the second type terminals (i.e. the second type terminals 121, the second type terminals 122, and the second type terminals 123) are respectively welded to the corresponding pins.
For example, referring to fig. 2, three second-type terminals of the direct copper-bonding DCB substrate 100 may be soldered to three leads 300 of the plurality of leads, respectively, by solder.
By respectively welding the first type of terminals and the second type of terminals on the two sides of the DCB substrate 100 with corresponding leads, the package structure 10 after the DCB substrate 100 is connected with the leads 300 can still have good structural stability and flatness.
In an embodiment of the present invention, the three high-side power devices (i.e., the high-side power device 240, the high-side power device 250, and the high-side power device 260) and the three low-side power devices (i.e., the low-side power device 210, the low-side power device 220, and the low-side power device 230) include a power transistor and a fast recovery diode, respectively. The fast recovery diode is electrically connected with the corresponding power tube through a routing wire.
In an embodiment of the present invention, the plurality of pins 300 includes a high voltage pin 310 and a low voltage pin 320, the high voltage pin 310 is close to the first end 101a of the first side 101, and the low voltage pin 320 is close to the second end 101b of the first side 101 opposite to the first end 101 a.
For example, for the package structure 10 of the power module shown in fig. 2, the pin located on the right side of the dotted line in the plurality of pins 300 may be the high voltage pin 310, and the pin located on the left side of the dotted line in the plurality of pins 300 may be the low voltage pin.
It is understood that the specific number and arrangement of the high voltage pins and the low voltage pins in the plurality of pins 300 can be adjusted by those skilled in the art according to actual needs, and the present invention is not limited thereto.
The utility model discloses a power module's packaging structure 10 is through locating the both ends that are close to first side 101 on direct copper bonding DCB substrate 100 respectively with high-pressure pin 310 and low pressure pin 320 among a plurality of pins 300 to produced electric leakage, short circuit scheduling problem easily when can effectively solving high-pressure pin 310 and low pressure pin 320 staggered arrangement.
In an embodiment of the present invention, the package structure 10 further includes a thermistor 400 disposed on the plurality of pins 300, and the thermistor 400 is connected to at least two of the plurality of pins 300 and is adapted to detect the temperature of the power module.
Illustratively, referring to fig. 2, the thermistor 400 is connected to two pins of the plurality of pins 300, a COM pin (ground) and a VTH pin (output for temperature detection), respectively. Wherein, thermistor 400 realizes through welding mode and COM foot to be connected electrically, and thermistor 400 realizes through the routing mode and VTH foot to be connected electrically, nevertheless the utility model discloses it is not with this as the limit.
In an embodiment of the present invention, in the copper layer of the direct copper bonding DCB substrate 100 shown in fig. 1 and fig. 2, the copper-clad wiring portion excluding the four first-type terminals and the three second-type terminals can be electrically connected to the corresponding pins of the plurality of pins 300 by wire bonding.
In an embodiment of the present invention, the distance between the pin electrically connected to the direct copper bonding DCB substrate 100 through the wire bonding and the first side 101 is greater than 0.5 mm.
For example, for the package structure 10 of the power module shown in fig. 2, the distance between the COM pin and the VTH pin connected to the fifth island 115 by wire bonding and the first side 101 of the direct copper bonding DCB substrate 100 is greater than 0.5 mm.
In some examples, some of the plurality of pins 300 may also be directly connected to the driving controller 270 disposed on the fifth base island 115 by wire bonding, which is not limited by the present invention.
It should be understood that the coplanarity of the plurality of leads 300 is poor, limited by the size of the package 10 and when the number of leads is large. Therefore, at least part of the plurality of leads 300 are electrically connected with the direct copper bonding DCB substrate 100 in a wire bonding manner, so that the cold joint risk possibly caused when the plurality of leads 300 are simultaneously connected with the direct copper bonding DCB substrate 100 in a welding manner can be effectively avoided, and good contact between the direct copper bonding DCB substrate 100 and the plurality of leads 300 is ensured.
In an embodiment of the present invention, the package structure 10 further includes a package body 500 covering the DCB substrate 100, and the plurality of leads 300 extend out of the package body 500.
The packaging structure of the power module of the present invention has been described above with reference to the direct copper bonding DCB substrate 100 shown in fig. 1 and the packaging structure 10 of the power module shown in fig. 2. It should be understood that, persons skilled in the art can make corresponding adjustments to the specific form and arrangement of each component in the packaging structure of the power module according to actual needs, and the present invention is not limited thereto.
The utility model discloses an above embodiment provides a power module's packaging structure, and the power module who adopts this packaging structure has higher power level, and the volume is less and have good heat-sinking capability.
It is to be understood that even though some presently contemplated embodiments have been discussed in the foregoing disclosure by way of various examples, it is to be understood that such detail is solely for that purpose and that the appended claims are not limited to the disclosed embodiments, but, on the contrary, are intended to cover all modifications and equivalent arrangements that are within the spirit and scope of the embodiments of the disclosure.
Having thus described the basic concept, it will be apparent to those skilled in the art that the foregoing disclosure is by way of example only, and is not intended to limit the present application. Various modifications, improvements and adaptations to the present application may occur to those skilled in the art, although not explicitly described herein. Such modifications, improvements and adaptations are proposed in the present application and thus fall within the spirit and scope of the exemplary embodiments of the present application.
Also, this application uses specific language to describe embodiments of the application. Reference throughout this specification to "one embodiment," "an embodiment," and/or "some embodiments" means that a particular feature, structure, or characteristic described in connection with at least one embodiment of the present application is included in at least one embodiment of the present application. Therefore, it is emphasized and should be appreciated that two or more references to "an embodiment" or "one embodiment" or "an alternative embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, some features, structures, or characteristics of one or more embodiments of the present application may be combined as appropriate.
Additionally, the order in which elements and sequences of the processes described herein are processed, the use of alphanumeric characters, or the use of other designations, is not intended to limit the order of the processes and methods described herein, unless explicitly claimed. While various presently contemplated embodiments have been discussed in the foregoing disclosure by way of example, it should be understood that such detail is solely for that purpose and that the appended claims are not limited to the disclosed embodiments, but, on the contrary, are intended to cover all modifications and equivalent arrangements that are within the spirit and scope of the embodiments herein disclosed. For example, although the system components described above may be implemented by hardware devices, they may also be implemented by software-only solutions, such as installing the described system on an existing server or mobile device.
Similarly, it should be noted that in the preceding description of embodiments of the application, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure aiding in the understanding of one or more of the embodiments. This method of disclosure, however, is not intended to require more features than are expressly recited in the claims. Indeed, the embodiments may be characterized as having less than all of the features of a single embodiment disclosed above.
Numerals describing the number of components, attributes, etc. are used in some embodiments, it being understood that such numerals used in the description of the embodiments are modified in some instances by the use of the modifier "about", "approximately" or "substantially". Unless otherwise indicated, "about", "approximately" or "substantially" indicates that the number allows a variation of ± 20%.
Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximations that may vary depending upon the desired properties of the individual embodiments. In some embodiments, the numerical parameter should take into account the specified significant digits and employ a general digit preserving approach. Notwithstanding that the numerical ranges and parameters setting forth the broad scope of the range are approximations, in the specific examples, such numerical values are set forth as precisely as possible within the scope of the application.
Although the present invention has been described with reference to the present specific embodiments, it will be understood by those skilled in the art that the above embodiments are merely illustrative of the present invention, and various equivalent changes and substitutions may be made without departing from the spirit of the present invention, and therefore, changes and modifications to the above embodiments within the spirit of the present invention will fall within the scope of the claims of the present application.

Claims (18)

1. A package structure of a power module, comprising:
a direct copper bonded DCB substrate having a first side and comprising a plurality of base islands;
a plurality of power devices respectively disposed on the plurality of base islands; and
a plurality of pins proximate to the first side;
wherein at least a portion of the plurality of leads are soldered to the direct copper bonding DCB substrate.
2. The package structure according to claim 1, wherein at least a portion of the leads are electrically connected to the DCB substrate by wire bonding, and at least a portion of the leads are electrically connected to the DCB substrate by soldering.
3. The package structure of claim 1, wherein the package structure is a single inline package.
4. The package structure of claim 1, wherein the direct copper bonded DCB substrate further has a second side adjacent to the first side, and third and fourth sides opposite the first and second sides, respectively.
5. The package structure of claim 4, wherein the direct copper bonded DCB substrate comprises a copper layer comprising a first base island, a second base island, and a third base island;
the second base island partially surrounds the first base island, the third base island partially surrounds the second base island, the first base island, the second base island and the third base island respectively comprise a chip carrying table and a first leading-out end, the chip carrying table and the first leading-out end form a continuous conductive structure through copper-clad routing, the first leading-out end of the first base island, the first leading-out end of the second base island and the first leading-out end of the third base island are sequentially arranged at a first end of the first side edge, the chip carrying tables of the first base island, the second base island and the third base island are located at a second end, opposite to the first end, of the first side edge, the chip carrying table of the first base island is close to the fourth side edge, the chip carrying table of the second base island is close to the third side edge and the fourth side edge, and the chip carrying table of the third base island is close to the third side edge.
6. The package structure of claim 5, wherein the copper layer further comprises a fourth base island proximate to and partially surrounding the second and third sides, the fourth base island comprising a stage and a first type of terminal.
7. The package structure of claim 6, wherein the copper layer further comprises a fifth base island proximate the first side, the first base island partially surrounding the fifth base island.
8. The package structure according to claim 6, wherein the first type terminals of the first, second, third and fourth base islands are respectively soldered to corresponding leads.
9. The package structure of claim 7, wherein the plurality of power devices comprises:
three low-side power devices disposed on the first, second, and third base islands, respectively; and
three high-side power devices disposed on the fourth base island.
10. The package structure of claim 9, further comprising a drive controller disposed on the fifth base island.
11. The package structure according to claim 10, wherein the driver controller is electrically connected to the corresponding pins by wire bonding and/or copper-clad traces, and is electrically connected to the three high-side power devices and the three low-side power devices by wire bonding and/or copper-clad traces.
12. The package structure of claim 9, wherein the copper layer further comprises three second type terminals near a fourth side, the three second type terminals being electrically connected to the three low side power devices, respectively.
13. The package structure of claim 12, wherein the second type of terminals are soldered to the corresponding leads, respectively.
14. The package structure of claim 9, wherein the three high-side power devices and the three low-side power devices comprise power transistors and fast recovery diodes, respectively; and the fast recovery diode is electrically connected with the corresponding power tube through a routing wire.
15. The package structure of claim 1, wherein the plurality of pins comprise a high voltage pin and a low voltage pin, the high voltage pin being proximate to a first end of the first side, the low voltage pin being proximate to a second end of the first side opposite the first end.
16. The package structure of claim 1, further comprising a thermistor disposed on the plurality of pins, the thermistor being connected to at least two of the plurality of pins and adapted to detect a temperature of the power module.
17. The package structure of claim 2, wherein a spacing between the leads electrically connected to the direct copper bonding DCB substrate by wire bonding and the first side is greater than 0.5 mm.
18. The package structure according to claim 1, further comprising a package body encapsulating the direct copper bonded DCB substrate, wherein the leads extend out of the package body.
CN202021707905.XU 2020-08-14 2020-08-14 Packaging structure of power module Active CN212991094U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202021707905.XU CN212991094U (en) 2020-08-14 2020-08-14 Packaging structure of power module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202021707905.XU CN212991094U (en) 2020-08-14 2020-08-14 Packaging structure of power module

Publications (1)

Publication Number Publication Date
CN212991094U true CN212991094U (en) 2021-04-16

Family

ID=75433519

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202021707905.XU Active CN212991094U (en) 2020-08-14 2020-08-14 Packaging structure of power module

Country Status (1)

Country Link
CN (1) CN212991094U (en)

Similar Documents

Publication Publication Date Title
US10854575B2 (en) Three-dimensional (3D) package structure having an epoxy molding compound layer between a discrete inductor and an encapsulating connecting structure
US9589869B2 (en) Packaging solutions for devices and systems comprising lateral GaN power transistors
US9082868B2 (en) Semiconductor component and method of manufacture
US8159828B2 (en) Low profile flip chip power module and method of making
US8471381B2 (en) Complete power management system implemented in a single surface mount package
US8796831B2 (en) Complex semiconductor packages and methods of fabricating the same
TWI401778B (en) Semiconductor chip package
US20090194857A1 (en) Thin Compact Semiconductor Die Packages Suitable for Smart-Power Modules, Methods of Making the Same, and Systems Using the Same
US8004070B1 (en) Wire-free chip module and method
US20070164428A1 (en) High power module with open frame package
EP3310140B1 (en) Mounting assembly with a heatsink
US5113314A (en) High-speed, high-density chip mounting
US20070257377A1 (en) Package structure
US10600727B2 (en) Molded intelligent power module for motors
TW200941685A (en) Semiconductor chip package
US20120168919A1 (en) Semiconductor package and method of fabricating the same
CN111987053A (en) Packaging structure
US9655265B2 (en) Electronic module
CN212991094U (en) Packaging structure of power module
US8687370B2 (en) Housing for a chip arrangement and a method for forming a housing
CN212991090U (en) Direct copper bonding DCB substrate
EP4016618A1 (en) Power device packaging
US7952204B2 (en) Semiconductor die packages with multiple integrated substrates, systems using the same, and methods using the same
WO2021083032A1 (en) Packaging structure and manufacturing method therefor
CN100552946C (en) Electron package structure

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant