CN212969582U - Interference suppression circuit for electrical monitoring system - Google Patents
Interference suppression circuit for electrical monitoring system Download PDFInfo
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- CN212969582U CN212969582U CN202021882328.8U CN202021882328U CN212969582U CN 212969582 U CN212969582 U CN 212969582U CN 202021882328 U CN202021882328 U CN 202021882328U CN 212969582 U CN212969582 U CN 212969582U
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Abstract
The utility model discloses an interference suppression circuit for electrical monitoring system, including trap circuit and the low pass filter circuit who connects gradually, low pass filter circuit includes the one-level filtering sub-circuit, second grade filtering sub-circuit and the tertiary filtering sub-circuit that connect in order, trap circuit includes resistance R35, chip U33, resistance R36 and resistance R37, resistance R35's an end connects instrumentation amplifier's output and is used for gathering the signal, and another termination chip U33's of resistance R35 first pin, chip U33's fifth pin connects power supply +5AVCC, and a termination chip U33's third pin of resistance R37, the other end of resistance R37 and the other end of chip U33 all ground connection; the utility model has the advantages that: the detection interference in the electrical method monitoring process is reduced, so that the detection result is more accurate.
Description
Technical Field
The utility model relates to a mine physical exploration technical field, more specifically relate to an interference suppression circuit for electrical monitoring system.
Background
The electrical method instrument is widely used for searching underground water, solving the problems of drinking water for people and animals and water for industrial and agricultural use, geological exploration of hydrology, engineering and environment, exploration of fracture zones and collapse columns, landslide, coal mine goafs and other industries, and exploration of metal and nonmetal mineral resources, energy exploration, urban geophysical prospecting, railways and bridge engineering.
At present, the physical detection technology for the mine geological abnormal body mainly adopts a centralized or distributed electric detection instrument to carry out one-time detection work. The centralized electrical method detector has the advantages that all the electrode switching modules are designed in the detector, the size of the detector is large, the number of the electrode switching modules is certain, so that the detection distance is short at one time, and when a long working face is required to be detected, the operation is finished in a mode of moving the station for many times. The distributed electrical method detecting instrument is mainly different from the centralized electrical method detecting instrument in that the distributed electrical method detecting instrument separates an electrode switching module from the interior of the detecting instrument, and the function of electrode switching is designed at the electrode connection position in an electrical method large line. No matter which kind of detection mode, the electrical method controller all need return the signal that detects to other electrical method detectors or electrical method monitoring substation in the detection process, but there is signal interference because of the reason of transport many times and complicated operating mode in the electrical method controller itself, leads to the detection result inaccurate when interfering signal returns other equipment.
SUMMERY OF THE UTILITY MODEL
The utility model discloses the technical problem that will solve lies in the detection signal that returns in the electric method monitoring system detection process of prior art and has the interference, leads to the inaccurate problem of testing result.
The utility model discloses a following technical means realizes solving above-mentioned technical problem: the utility model provides an interference suppression circuit for electrical law monitoring system, is including the trap circuit and the low pass filter circuit that connect gradually, and the low pass filter circuit is including the one-level filtering sub-circuit, second grade filtering sub-circuit and the tertiary filtering sub-circuit that connect in order, the trap circuit includes resistance R35, chip U33, resistance R36 and resistance R37, a termination of resistance R35 is used for gathering signal, and the other termination of resistance R35 is the first pin of chip U33, and the fifth pin of chip U33 is connected power supply +5AVCC, and the second pin of chip U33 is connected power supply-5 AVCC, and a termination of resistance R36 is the sixth pin of chip U33, and the other termination of resistance R36 is the seventh pin of chip U33, and a termination of resistance R37 is the third pin of chip U33, and the other end of resistance R37 and the other end of chip U33 are all grounded.
The utility model discloses because the acquisition signal contains interference signal, behind the notch circuit, 50HZ interference signal in the acquisition signal of can the filtering, wherein can reach-80 dB to interference signal's suppression, the acquisition signal gets into low pass filter circuit behind the notch circuit, low pass filter circuit contains tertiary sub-circuit, one-level filtering, low pass filter circuit mainly is filtering high frequency interference signal (as 100Hz, 150Hz, this kind of high frequency signal of 200 Hz), the acquisition signal obtains more pure detection signal by the port output after the low pass filter circuit filters, reduce the detection interference, make the detection result comparatively accurate.
Further, the primary filter sub-circuit comprises a resistor R191, a resistor R192, an amplifier U34A, a capacitor C213, a capacitor C220, a capacitor C215, a capacitor C218, a capacitor C222 and a capacitor C223, one end of the resistor R191 is connected to the seventh pin of the chip U33, the other end of the resistor R191 is connected to one end of the resistor R192 and one end of the capacitor C213, the other end of the resistor R192 is connected to one end of the capacitor C220 and the same-phase end of the amplifier U34A, the other end of the capacitor C220 is grounded, the other end of the capacitor C213 is connected to the output end of the amplifier U34A and the inverting end of the amplifier U34A, the positive electrode of the capacitor C215 and one end of the capacitor C218 are both connected to the positive power supply terminal of the amplifier U34A, the negative electrode of the capacitor C223 and one end of the capacitor C222 are both connected to the negative power supply terminal of the amplifier U34A, and the negative electrodes of the capacitor C215, the negative electrode, the other end of the capacitor C218;
furthermore, the secondary filter sub-circuit comprises a resistor R193, a resistor R194, an amplifier U34B, a capacitor C212 and a capacitor C219, wherein one end of the resistor R193 is connected with the output end of the amplifier U34A, the other end of the resistor R193 is connected with one end of the resistor R194 and one end of the capacitor C212 respectively, the other end of the resistor R194 is connected with one end of the capacitor C219 and the in-phase end of the amplifier U34B, the other end of the capacitor C219 is grounded, the other end of the capacitor C212 is connected with the output end of the amplifier U34B and the anti-phase end of the amplifier U34B, the positive power supply terminal of the amplifier U34B is connected with the power supply +5VAVCC, and the negative power supply terminal of the amplifier U34B is connected with the;
still further, the three-stage filter sub-circuit comprises a resistor R195, a resistor R196, an amplifier U40, a capacitor C211 and a capacitor C221, one end of the resistor R195 is connected with the output end of the amplifier U34B, the other end of the resistor R195 is connected with one end of the resistor R196 and one end of the capacitor C211, the other end of the resistor R196 is connected with one end of the capacitor C221 and the in-phase end of the amplifier U40, the other end of the capacitor C221 is grounded, the other end of the capacitor C211 is connected with the output end of the amplifier U40 and the inverting end of the amplifier U40, the positive power supply terminal of the amplifier U40 is connected with the power supply +5VAVCC, the negative power supply terminal of the amplifier U40 is connected with the power supply-5 VAVCC, and the output terminal of the amplifier.
Further, the model of the chip U33 is F42N 50.
Further, the amplifier U40, the amplifier U34A, and the amplifier U34B are all OPA2188aid r.
The utility model has the advantages that: the utility model discloses, because the acquisition signal contains interference signal, behind the notch circuit, 50HZ interference signal in the acquisition signal of can the filtering, wherein can reach-80 dB to interference signal's suppression, the acquisition signal gets into low pass filter circuit behind the notch circuit, low pass filter circuit contains tertiary sub-circuit, one-level filtering, low pass filter circuit mainly is filtering high frequency interference signal (as 100Hz, 150Hz, this kind of high frequency signal of 200 Hz), the acquisition signal obtains comparatively pure detection signal by the port output after the low pass filter circuit filters, reduce the detection interference, make the detection result comparatively accurate.
Drawings
Fig. 1 is a block diagram of an interference suppression circuit for an electrical monitoring system according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a trap circuit in an interference suppression circuit for an electrical monitoring system according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a low-pass filter circuit in an interference suppression circuit for an electrical monitoring system according to an embodiment of the present invention.
Detailed Description
To make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the embodiments of the present invention are combined to clearly and completely describe the technical solution in the embodiments of the present invention, and obviously, the described embodiments are some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
As shown in fig. 1, an interference suppression circuit for an electrical method monitoring system includes a trap circuit 1 and a low-pass filter circuit 2 connected in sequence, where the low-pass filter circuit 2 includes a first-stage filter sub-circuit 201, a second-stage filter sub-circuit 202, and a third-stage filter sub-circuit 203 connected in sequence.
Referring to fig. 1 and fig. 2, the trap circuit 1 includes a resistor R35, a chip U33, a resistor R36, and a resistor R37, and the model of the chip U33 is F42N 50. One end of the resistor R35 is connected with the output end of the instrumentation amplifier for signal acquisition, the other end of the resistor R35 is connected with the first pin of the chip U33, the fifth pin of the chip U33 is connected with the +5AVCC power supply, the second pin of the chip U33 is connected with the-5 AVCC power supply, one end of the resistor R36 is connected with the sixth pin of the chip U33, the other end of the resistor R36 is connected with the seventh pin of the chip U33, one end of the resistor R37 is connected with the third pin of the chip U33, and the other end of the resistor R37 and the other end of the chip U33 are both grounded.
Referring to fig. 1 and fig. 3, the first-stage filter sub-circuit 201 includes a resistor R191, a resistor R192, an amplifier U34A, a capacitor C213 and a capacitor C220, one end of a resistor R191 is connected with a seventh pin of the chip U33, the other end of the resistor R191 is connected with one end of a resistor R192 and one end of a capacitor C213 respectively, the other end of the resistor R192 is connected with one end of a capacitor C220 and the in-phase end of the amplifier U34A, the other end of the capacitor C220 is grounded, the other end of the capacitor C213 is connected with the output end of the amplifier U34A and the inverting end of the amplifier U34A, the anode of the capacitor C215 and one end of the capacitor C218 are both connected with the positive power supply end of the amplifier U34A, the cathode of the capacitor C223 and one end of the capacitor C222 are both connected with the negative power supply end of the amplifier U34A, and the cathode of the capacitor C215, the other end of the capacitor C218, the other end of the capacitor C222 and the anode of the capacitor C223 are all grounded;
with reference to fig. 3, the second-stage filter sub-circuit 202 includes a resistor R193, a resistor R194, an amplifier U34B, a capacitor C212, and a capacitor C219, wherein one end of the resistor R193 is connected to the output terminal of the amplifier U34A, the other end of the resistor R193 is connected to one end of the resistor R194 and one end of the capacitor C212, the other end of the resistor R194 is connected to one end of the capacitor C219 and the non-inverting terminal of the amplifier U34B, the other end of the capacitor C219 is grounded, the other end of the capacitor C212 is connected to the output terminal of the amplifier U34B and the inverting terminal of the amplifier U34B, the positive power supply terminal of the amplifier U34B is connected to the power supply +5VAVCC, and the negative power supply terminal of the amplifier U34B is;
with continued reference to fig. 3, the three-stage filter sub-circuit 203 includes a resistor R195, a resistor R196, an amplifier U40, a capacitor C211, and a capacitor C221, and the amplifier U40, the amplifier U34A, and the amplifier U34B are all OPA2188aid R. One end of a resistor R195 is connected with the output end of the amplifier U34B, the other end of the resistor R195 is respectively connected with one end of a resistor R196 and one end of a capacitor C211, the other end of the resistor R196 is connected with one end of a capacitor C221 and the same-phase end of the amplifier U40, the other end of the capacitor C221 is grounded, the other end of the capacitor C211 is connected with the output end of the amplifier U40 and the reverse-phase end of the amplifier U40, the positive power supply end of the amplifier U40 is connected with a power supply +5VAVCC, the negative power supply end of the amplifier U40 is connected with a power supply-5 VAVCC, and the output end of the amplifier U40.
The principle of the utility model is that: the collected signals are input from the OUTA end, and because the collected signals contain 50Hz interference signals, the 50Hz interference signals in the collected signals can be filtered after passing through the 50Hz trap circuit 1, wherein the suppression on the 50Hz interference signals can reach-80 dB. The collected signals enter a 20Hz low-pass filter circuit 2 after passing through a 50Hz trap circuit 1, the circuit mainly has the function of filtering high-frequency interference signals (such as 100Hz, 150Hz and 200Hz high-frequency signals) with the frequency higher than 20Hz, and the collected signals are output by a port OUTC after being filtered by the 20Hz low-pass filter circuit 2.
Through the technical scheme, the utility model provides a pair of an interference suppression circuit for electrical method monitoring system, because the acquisition signal contains interference signal, behind notch circuit 1, interference signal in the acquisition signal of meeting filtering, acquisition signal enters low pass filter circuit 2 behind notch circuit 1, low pass filter circuit 2 contains tertiary sub circuit, one-level filtering, filtering high frequency interference signal, acquisition signal obtains more pure detection signal by port output after 2 filters of low pass filter circuit, reduce and detect the interference, make the detection result comparatively accurate.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (6)
1. The utility model provides an interference suppression circuit for electrical law monitoring system, its characterized in that, including trap circuit and the low pass filter circuit who connects gradually, low pass filter circuit is including the one-level filtering sub-circuit, second grade filtering sub-circuit and the tertiary filtering sub-circuit that connect in order, trap circuit includes resistance R35, chip U33, resistance R36 and resistance R37, a termination instrument amplifier's of resistance R35 output is used for gathering the signal, and the other termination chip U33's of resistance R35 first pin, chip U33's fifth pin is connected with power supply +5AVCC, and chip U33's second pin is connected with power-5 AVCC, and a termination chip U33's sixth pin of resistance R36, the other termination chip U33's of resistance R36 seventh pin, and a termination chip U33's third pin of resistance R37, and the other end of resistance R37 and the other end of chip U33 all ground connection.
2. The interference suppression circuit for electrical law monitoring system according to claim 1 wherein said primary filter sub-circuit comprises a resistor R191, a resistor R192, an amplifier U34A, a capacitor C213, a capacitor C220, a capacitor C215, a capacitor C218, a capacitor C222 and a capacitor C223, one end of the resistor R191 is connected to the seventh pin of the chip U33, the other end of the resistor R191 is connected to one end of the resistor R192 and one end of the capacitor C213, the other end of the resistor R192 is connected to one end of the capacitor C220 and the non-inverting terminal of the amplifier U34A, the other end of the capacitor C220 is grounded, the other end of the capacitor C213 is connected to the output terminal of the amplifier U34A and the inverting terminal of the amplifier U34A, the positive terminal of the capacitor C215 and one terminal of the capacitor C218 are both connected to the positive power supply terminal of the amplifier U34A, the negative terminal of the capacitor C223 and one terminal of the capacitor C222 are both connected to the negative power supply terminal of the amplifier U34A, and the negative terminal of the capacitor C215, The other terminal of the capacitor C218, the other terminal of the capacitor C222, and the positive electrode of the capacitor C223 are all grounded.
3. The interference suppression circuit for the electrical method monitoring system as claimed in claim 2, wherein the secondary filter sub-circuit comprises a resistor R193, a resistor R194, an amplifier U34B, a capacitor C212 and a capacitor C219, one end of the resistor R193 is connected to the output terminal of the amplifier U34A, the other end of the resistor R193 is connected to one end of the resistor R194 and one end of the capacitor C212, the other end of the resistor R194 is connected to one end of the capacitor C219 and the non-inverting terminal of the amplifier U34B, the other end of the capacitor C219 is grounded, the other end of the capacitor C212 is connected to the output terminal of the amplifier U34B and the inverting terminal of the amplifier U34B, the power supply of the amplifier U34B is connected to the power supply +5VAVCC, and the power supply negative terminal of the positive terminal of the amplifier U34B is connected to the power supply-5 VAVCC.
4. The interference suppression circuit for the electrical method monitoring system according to claim 3, wherein the three-stage filter sub-circuit comprises a resistor R195, a resistor R196, an amplifier U40, a capacitor C211 and a capacitor C221, one end of the resistor R195 is connected to the output end of the amplifier U34B, the other end of the resistor R195 is connected to one end of the resistor R196 and one end of the capacitor C211, the other end of the resistor R196 is connected to one end of the capacitor C221 and the non-inverting end of the amplifier U40, the other end of the capacitor C221 is grounded, the other end of the capacitor C211 is connected to the output end of the amplifier U40 and the inverting end of the amplifier U40, the positive power supply terminal of the amplifier U40 is connected to the power supply +5VAVCC, the negative power supply terminal of the amplifier U40 is connected to the power supply-5 VAVCC, and the output terminal of the amplifier U40 is connected.
5. The interference suppression circuit for electrical law monitoring system according to claim 1 wherein said chip U33 is model F42N 50.
6. The jamming suppression circuit for an electrical law monitoring system according to claim 4 wherein the amplifier U40, the amplifier U34A and the amplifier U34B are all OPA2188AIDR type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021882328.8U CN212969582U (en) | 2020-08-31 | 2020-08-31 | Interference suppression circuit for electrical monitoring system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021882328.8U CN212969582U (en) | 2020-08-31 | 2020-08-31 | Interference suppression circuit for electrical monitoring system |
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| Publication Number | Publication Date |
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| CN212969582U true CN212969582U (en) | 2021-04-13 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202021882328.8U Active CN212969582U (en) | 2020-08-31 | 2020-08-31 | Interference suppression circuit for electrical monitoring system |
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| CN (1) | CN212969582U (en) |
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- 2020-08-31 CN CN202021882328.8U patent/CN212969582U/en active Active
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