CN212909462U

CN212909462U - Hysteresis circuit with feedback

Info

Publication number: CN212909462U
Application number: CN202021860218.1U
Authority: CN
Inventors: 饶宇; 李�浩; 李铭
Original assignee: Chengdu Yingsa Sensing Technology Research Co ltd
Current assignee: Chengdu Yingsa Sensing Technology Research Co ltd
Priority date: 2020-08-31
Filing date: 2020-08-31
Publication date: 2021-04-06
Anticipated expiration: 2030-08-31

Abstract

The utility model discloses a hysteresis circuit is fed back in area, including comparison circuit, feedback circuit and bleeder circuit, comparison circuit includes comparator U, feedback circuit connects between comparator U's normal phase input and output, bleeder circuit connects comparator U's normal phase input, feedback circuit includes MOS pipe Q, resistance R3, resistance R4 and resistance R5, comparator U's normal phase input is connected to resistance R3's one end, bleeder circuit and resistance R4's one end is connected to resistance R5's the other end, MOS pipe Q's drain electrode is connected to resistance R4's the other end, MOS pipe Q's source ground connection, MOS pipe Q's grid connecting resistance R5's one end, comparator U's output is connected to resistance R5's the other end. The utility model discloses be applied to the judgement of the high low level of non-equipotential to and the disappearance on the level is trembled, prevents to tremble and disturbs, can reach hysteresis effect, effectively eliminates the shake that ripple on the electric current brought.

Description

Hysteresis circuit with feedback

Technical Field

The utility model relates to an electronic circuit technical field, concretely relates to hysteresis circuit is fed back in area.

Background

In the circuit in the prior art, when high and low levels are output, the electrical signal often judges the high level or the low level based on the same reference voltage, the condition of level jitter interference in the circuit is not considered, the judgment on the high and low levels of the electrical signal is not accurate enough, and the requirement of an actual product cannot be met. Such as H3 product requirements: when the input signal rises and is more than 10V, the high level is judged, otherwise, the low level is judged; when the input signal falls and is less than 3.3V, the low level is determined, otherwise, the high level is determined.

The high and low levels are determined by taking a simple numerical value as a boundary, and once the input power supply has ripples or interference and the like, the level can be jittered, so that a series of influences such as unstable subsequent circuit effects are caused.

SUMMERY OF THE UTILITY MODEL

The utility model aims to solve the technical problem that when the level jitter disturbed, the height level was judged inaccurately, and aim at provides a hysteresis circuit is fed back in the area, solved the judgement of the high low level of non-equipotential, and the level disappears and trembles, prevents the problem of shake interference.

The utility model discloses a following technical scheme realizes:

the utility model provides a hysteresis circuit with feedback, includes comparator circuit, feedback circuit and bleeder circuit, the comparator circuit includes comparator U, the feedback circuit connect in between the normal phase input and the output of comparator U, the bleeder circuit connects the normal phase input of comparator U, the feedback circuit includes MOS pipe Q, resistance R3, resistance R4 and resistance R5, and the one end of resistance R3 is connected the normal phase input of comparator U, and the other end of resistance R5 is connected the one end of bleeder circuit and resistance R4, and the other end of resistance R4 is connected the drain electrode of MOS pipe Q, MOS pipe Q's source ground, MOS pipe Q's grid connecting resistance R5's one end, resistance R5's the other end is connected the output of comparator U.

In the prior art, a simple voltage value is used as a boundary to determine high and low levels, and once ripples or interference and other conditions exist on the voltage value of an input power supply, the level can be jittered, so that subsequent circuit effects are unstable and other influences are caused. The utility model discloses increase feedback circuit and bleeder circuit on comparison circuit's basis, through taking feedback lag, eliminate the shake on the level, the high-low level is exported to rethread MOS pipe Q's break-make, effectively eliminates the problem that the level shake disturbed.

Further, the comparison circuit comprises a pull-up resistor R6, one end of the pull-up resistor R6 is connected with the output end of the comparator U and the other end of the resistor R5, and the other end of the pull-up resistor R1 is connected with a 3.3V VCC power supply.

Further, the voltage dividing circuit comprises a resistor R2, one end of the resistor R2 is connected with the other end of the resistor R3 and one end of the resistor R4, and the other end of the resistor R2 is connected with a 10V reference voltage.

Further, the MOS transistor Q is an NPN type MOS transistor.

Furthermore, the comparison circuit further comprises a resistor R1, one end of the resistor R1 is connected with the inverting input end of the comparator U, and the other end of the resistor R1 is connected with an input voltage.

Further, the comparator U further includes a power supply terminal and a ground terminal.

Compared with the prior art, the utility model, following advantage and beneficial effect have:

the utility model discloses be applied to the judgement of the high low level of non-equipotential to and the disappearance on the level is trembled, prevents to tremble and disturbs, can reach hysteresis effect, effectively eliminates the shake that ripple on the electric current brought.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:

FIG. 1 is a schematic circuit diagram of the present invention;

FIG. 2 is a flow chart of high and low level determination;

FIG. 3 is a diagram of input signal versus output signal;

fig. 4 is a schematic diagram of an output signal.

Detailed Description

To make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the following examples and drawings, and the exemplary embodiments and descriptions thereof of the present invention are only used for explaining the present invention, and are not intended as limitations of the present invention.

Example 1

This embodiment 1 is a hysteresis circuit with feedback, as shown in fig. 1, which includes a comparison circuit, a feedback circuit and a voltage divider circuit, the comparison circuit includes a comparator U, the feedback circuit is connected between a positive phase input terminal and an output terminal of the comparator U, the voltage divider circuit is connected to the positive phase input terminal of the comparator U, the feedback circuit includes a MOS transistor Q, a resistor R3, a resistor R4 and a resistor R5, one end of a resistor R3 is connected to the positive phase input terminal of the comparator U, the other end of a resistor R5 is connected to one end of the voltage divider circuit and the resistor R4, the other end of a resistor R4 is connected to the drain of the MOS transistor Q, the source of the MOS transistor Q is grounded, the gate of the MOS transistor Q is connected to one end of the resistor R5, and the other end. The comparison circuit comprises a pull-up resistor R6, one end of a pull-up resistor R6 is connected with the output end of the comparator U and the other end of the resistor R5, and the other end of the pull-up resistor R1 is connected with a 3.3V VCC power supply. The voltage division circuit comprises a resistor R2, one end of a resistor R2 is connected with the other end of the resistor R3 and one end of a resistor R4, and the other end of the resistor R2 is connected with a 10V reference voltage. The MOS transistor Q is an NPN type MOS transistor. The comparison circuit further comprises a resistor R1, one end of the resistor R1 is connected with the inverting input end of the comparator U, and the other end of the resistor R1 is connected with an input voltage. The comparator U further includes a power terminal and a ground terminal.

In this embodiment 1, when the input voltage at the inverting input terminal of the comparator U is greater than 10V, the output terminal of the comparator U becomes high impedance, that is, outputs high level, and this high level passes through the current limiting resistor R5, turns on the MOS transistor Q, so that the reference voltage can pass through the MOS transistor Q to GND, and the reference voltage 10V continues to be divided into 3.3V through the R4, so that only when the input voltage is less than 3.3V, the output terminal of the comparator U enters low impedance, that is, outputs low level, and the MOS transistor Q is turned off, as shown in fig. 2.

When the input signal rises and is more than 10V, the high level is judged, otherwise, the low level is judged; when the input signal falls and is less than 3.3V, the low level is determined, otherwise, the high level is determined.

The input signal and the output signal of the circuit of embodiment 1 correspond to each other, and as shown in fig. 3, the square wave is the output signal: the upper edge is high and the lower edge is low. Sine wave is the input signal: the output rises (solid vertical line) when it is greater than 10V and falls (dashed vertical line) when it is less than 3.3V, and the output signal is as shown in fig. 4.

The above-mentioned embodiments, further detailed description of the objects, technical solutions and advantages of the present invention, it should be understood that the above description is only the embodiments of the present invention, and is not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. The utility model provides a hysteresis circuit with feedback, its characterized in that, includes comparator circuit, feedback circuit and bleeder circuit, the comparator circuit includes comparator U, the feedback circuit connect in between comparator U's normal phase input and output, bleeder circuit connects comparator U's normal phase input, the feedback circuit includes MOS pipe Q, resistance R3, resistance R4 and resistance R5, and resistance R3's one end is connected comparator U's normal phase input, resistance R5's the other end is connected bleeder circuit and resistance R4's one end, and resistance R4's the other end is connected MOS pipe Q's drain electrode, MOS pipe Q's source ground connection, MOS pipe Q's gate connection resistance R5's one end, resistance R5's the other end is connected comparator U's output.

2. The hysteretic circuit with feedback of claim 1, wherein said comparator circuit comprises a pull-up resistor R6, one end of said pull-up resistor R6 is connected to the output of said comparator U and the other end of resistor R5, and the other end of said pull-up resistor R1 is connected to a 3.3V VCC power supply.

3. The hysteresis circuit with feedback of claim 1, wherein the voltage divider circuit comprises a resistor R2, one end of the resistor R2 is connected to the other end of the resistor R3 and one end of the resistor R4, and the other end of the resistor R2 is connected to a 10V reference voltage.

4. The hysteresis circuit with feedback of claim 1, wherein the MOS transistor Q is an NPN type MOS transistor.

5. The hysteresis circuit with feedback of claim 1, further comprising a resistor R1, wherein one end of the resistor R1 is connected to the inverting input terminal of the comparator U, and the other end of the resistor R1 is connected to the input voltage.

6. The hysteresis circuit with feedback of claim 1, wherein the comparator U further comprises a power terminal and a ground terminal.