CN212850538U

CN212850538U - Device for realizing RS485 multi-host communication and RS485 communication system

Info

Publication number: CN212850538U
Application number: CN202022374577.2U
Authority: CN
Inventors: 彭茜娜; 寻骈臻; 唐辉
Original assignee: Changsha Xizhen Electronic Technology Co ltd
Current assignee: Changsha Xizhen Electronic Technology Co ltd
Priority date: 2020-10-22
Filing date: 2020-10-22
Publication date: 2021-03-30
Anticipated expiration: 2030-10-22

Abstract

The utility model discloses a device for realizing RS485 multi-host communication and an RS485 communication system, which comprises an MCU, an MAX485 module, a first monostable trigger and a second monostable trigger; when the TXD generates a falling edge signal, the first monostable trigger outputs a high level and maintains t1 seconds, the MAX485 module is enabled to transmit, and data are transmitted; when other terminals of the RS485 bus send data, the second monostable trigger enters monostable output low level and maintains t2 seconds, the UART module automatically suspends data sending until the last bit of data on the bus stops for t2 seconds, the monostable state is recovered, the high level is output, and at the moment, if the data are to be sent, the UART module automatically starts sending. The utility model provides a need not extra software and handle the low-cost high-reliability hardware scheme of monitoring and dodging, can conveniently realize RS-485 many host computer communication system.

Description

Device for realizing RS485 multi-host communication and RS485 communication system

Technical Field

The utility model relates to an information network communication technology field, in particular to realize device and RS485 communication system of the communication of many host computers of RS 485.

Background

In a conventional RS-485 bus, there is always a unique master node, and the other nodes are all slave nodes. The communication is always initiated by the main node, and the slave node obtains the control right of the bus after receiving the command and then sends information to the bus. After the transmission is finished, the bus control right is returned to the main node. The slave node can only send data when being inquired by the master node, so that emergency data such as alarm and the like cannot be transmitted; the slave nodes can not communicate with each other, and only can be transferred through the master node, so that the speed is influenced.

Aiming at the problem that RS-485 can not realize multi-host communication, the method has some improved schemes, and the principle is mainly based on CSMA/CD detection, and the multi-host communication is realized by monitoring bus data and then carrying out collision avoidance according to address or random time delay.

The biggest problem of the existing scheme for realizing RS-485 multi-host communication is that a large amount of additional software work is required, monitoring and delay avoidance are realized, the realization process is complex, and the cost is high.

SUMMERY OF THE UTILITY MODEL

The utility model provides a realize device and RS485 communication system of the communication of many host computers of RS485 to solve the scheme of current realization RS-485 many host computers communication and need carry out a large amount of extra software work, realize monitoring and time delay and dodge, realize that the process is complicated, the higher technical problem of cost.

In order to solve the technical problem, the utility model provides a following technical scheme:

on one hand, the utility model provides a realize device of RS485 multi-host computer communication for have the UART interface terminal that supports the hardware flow control, the terminal includes MCU and MAX485 module, MCU is connected with MAX485 module electricity, the device includes first monostable trigger and second monostable trigger;

wherein the input terminal of the first monostable flip-flopThe output end of the first monostable trigger is electrically connected with the DE and the output end of the MAX485 module

The pins are respectively electrically connected; the input end of the second monostable trigger is electrically connected with the R pin of the MAX485 module, and the output end of the second monostable trigger is electrically connected with the CTS pin of the MCU.

The first monostable trigger is realized by a 74HC123 chip and is externally connected with a first delay circuit.

Wherein the first monostable flip-flop

A pin is electrically connected with the TXD of the MCU, and the pin Q of the first monostable trigger is connected with the DE and the MAX485 module

The pins are electrically connected respectively.

The first delay circuit comprises a first delay resistor Rt1 and a first delay capacitor Ct 1.

The second monostable trigger is realized by a 74HC123 chip and is externally connected with a second delay circuit.

Wherein the second monostable flip-flop

A pin is electrically connected with the R pin of the MAX485 module, and a pin of the second monostable trigger

And the CTS pin of the MCU is electrically connected.

The second delay circuit comprises a first delay resistor Rt2 and a first delay capacitor Ct 2.

On the other hand, the utility model also provides an RS485 communication system, and the RS485 communication system comprises a plurality of terminals; wherein, each terminal comprises the device for realizing RS485 multi-host communication.

The utility model provides a beneficial effect that technical scheme brought includes at least:

the utility model discloses a pure hardware circuit realizes, also need not to manage RS485 interface IC's DE sending end, only needs to launch the CTS hardware flow control function of UART module. Except for one-time starting of the CTS hardware flow control function during initialization, no additional software is needed for realizing data monitoring and bus collision avoidance. The communication equipment in the system can pack and send the data packet into the UART sending register at any time like operating a common serial port, and the UART hardware automatically determines whether to send the data out immediately according to the CTS signal processing without the intervention judgment of user software. The system software design is greatly simplified, and the reliability and the stability of the system are improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

Fig. 1 is a circuit diagram of an apparatus for implementing RS485 multi-host communication according to an embodiment of the present invention;

fig. 2 is a flowchart of the apparatus for implementing RS485 multi-host communication according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

Referring to fig. 1 and fig. 2, the present embodiment provides an apparatus for implementing RS485 multi-host communication, and the apparatus of the present embodiment needs to use a hardware flow control CTS signal of a serial port in addition to RX and TX signals of a UART serial port. Therefore, the device is only suitable for UART interface terminals supporting hardware flow control, and most MCU microcontrollers and other devices in the current market have UART peripherals supporting hardware flow control function. Meanwhile, the MCU is not required to directly control the DE transmission of the RS485 interface IC.

The terminal comprises an MCU and an MAX485 module, wherein a TXD (transmit signal) end of the MCU is electrically connected with a D pin of the MAX485 module, and an RXD end of a receive signal end of the MCU is electrically connected with an R pin of the MAX485 module, so that the terminal is not different from a conventional use mode. The MAX485 interface protection circuit and the rest of the connection are also the same as the conventional use method, so the description of this embodiment is not repeated.

In addition to a conventional MCU and an RS485 interface IC (such as MAX485), the device of this embodiment further includes a first monostable flip-flop and a second monostable flip-flop;

wherein the input end of the first monostable trigger is electrically connected with the transmitting signal end TXD of the MCU, and the output end of the first monostable trigger is connected with the DE and the MAX485 module

The pins are respectively electrically connected; the input end of the second monostable trigger is electrically connected with the R pin of the MAX485 module, and the output end of the second monostable trigger is electrically connected with the CTS pin of the MCU;

the first monostable trigger is used for automatically generating an RS485 bus receiving and transmitting control signal; when the MCU sends data, because the start bit of the serial port data is 0, when the MCU starts to send the data, the TXD immediately generates a falling edge signal, the signal triggers the first monostable trigger to enter a monostable state, outputs a high level and maintains a first preset time t1, so that MAX485 transmission is enabled, and the data are sent out; wherein t1 should be longer than the time length of one byte of data sent by the serial port.

When other terminals of the RS485 bus send data, the second monostable trigger enters a monostable state, a low level is output, a second preset time period t2 is maintained, the CTS immediately changes to the low level, the MCU receives the CTS which is low, and the UART module can automatically pause data sending and give way out of the bus under the condition that the CTS hardware flow control is started. And after the last bit of data on the bus stops t2, recovering the monostable state and outputting a high level, wherein if data to be sent exist at the moment, the UART module automatically starts sending without software intervention control.

Therefore, as long as all the terminals t2 in the same system are greater than t1 through reasonable values, the transmitted data can be guaranteed to completely reach other terminals in the system, and the reception of other data terminals is not affected.

Specifically, the first monostable flip-flop in this embodiment is implemented by a 74HC123 chip U2A, and is externally connected with a first delay circuit. Of these, U2A

The pin is electrically connected with the TXD of the MCU, and the DE and the MAX485 module of the pin Q

The pins are electrically connected respectively. The first delay circuit comprises a first delay resistor Rt1 and a first delay capacitor Ct 1; the level holding time t1 is 0.55xRt2xCt2 seconds after triggering according to the IC data.

Accordingly, the second monostable flip-flop is also implemented by the 74HC123 chip U2B, and is externally connected with a second delay circuit. Of these, U2B

The pin is electrically connected with the R pin of the MAX485 module

And the CTS pin of the MCU is electrically connected. The second delay circuit comprises a first delay resistor Rt2 and a first delay capacitor Ct 2; the level holding time t2 is 0.55xRt2xCt2 seconds after triggering according to the IC data.

According to the method and the device, after falling edge jumping of data on the bus is detected, a monostable trigger is used for maintaining bus busy indication of t time, all terminals on the bus cannot send the data in the period, the t actual time of each terminal is different by utilizing the tiny numerical difference of each terminal resistance-capacitance device, the terminal with the minimum t occupies the bus and sends the data after the last terminal occupying the bus finishes sending.

Moreover, it should be mentioned that, in the present embodiment, the transmitting signal terminal TXD is directly connected to the interface chip DI, and when the TXD outputs 0, the interface chip outputs 0; when the TXD outputs 1, the interface chip is still in a transmitting state due to the U2A circuit, and directly outputs 1, instead of maintaining 1 by pulling up and down the bus resistor. The advantage of this is that the interface chip has strong ability to output 1, and can reach the standard RS485 output load.

Of course, it is understood that, without changing the function of monostable triggering of 74HC123 monostable circuit, the connection mode of the circuit pins may be replaced, such as inputting RX/TX signals from the B terminal, etc., or other integrated circuits (such as NE555) with similar functions may be used to implement the monostable triggering function. The circuit capable of realizing monostable triggering with the same function can be formed by programmable logic devices such as an FPGA (field programmable gate array) and a CPLD (complex programmable logic device), a special SOC (system on chip), a basic gate circuit and two triodes, and replaces a 74HC123 circuit in the scheme example.

On the other hand, the embodiment also provides an RS485 communication system, and the RS485 communication system includes a plurality of terminals; wherein, each terminal comprises the device for realizing RS485 multi-host communication.

It should be noted that, when a plurality of terminals in the same system are configured identically, Rt2 and Ct2 with the same value may be used, and due to the small difference in the values between the actual resistor and capacitor individuals, the t2 time delays of different terminals are slightly different, so that a better collision avoidance effect can be objectively achieved.

When terminals in the same system all adopt the circuit device of the embodiment, software only needs to open the flow control function of the serial port CTS hardware during initialization. Follow-up software just only need be like the ordinary serial ports of operation, have data transmission, directly send into send the buffering can, software need not be occupied or idle to the bus and carry out any judgement processing, also need not manage RS 485's DE pin, the hardware flow control function of serial ports will automatic processing: directly sending out bus idle data; TX is automatically blocked when the bus is occupied, and data is automatically sent out after the bus is free. When a terminal sends data on the bus, the signal is automatically transmitted to RX pins of all other terminals, and the terminals normally receive the data and process the data according to the flow.

In summary, in the scheme of this embodiment, whether data is being sent out from the bus, that is, whether the bus is busy is monitored by a hardware manner, and when the bus is busy and the bus becomes idle for a preset time, the data is prevented from being sent out from the MCU on a hardware level. The hardware layer can automatically stop sending avoidance when the bus is busy without any software processing, and the data is automatically sent out when the bus is idle without software intervention.

Moreover, it is noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.

It should also be noted that the above describes only preferred embodiments of the invention and that, although preferred embodiments of the invention have been described, it will be apparent to those skilled in the art that, once the basic inventive concepts of the present invention have been obtained, numerous modifications and refinements can be made without departing from the principles of the invention and these should also be considered as within the scope of the invention. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the invention.

Claims

1. A device for realizing RS485 multi-host communication is used for a UART interface terminal supporting hardware flow control, the terminal comprises an MCU and an MAX485 module, the MCU is electrically connected with the MAX485 module, and the device is characterized by comprising a first monostable trigger and a second monostable trigger;

2. The apparatus according to claim 1, wherein the first monostable flip-flop is implemented by a 74HC123 chip and is externally connected with a first delay circuit.

3. The apparatus of claim 2, wherein the first monostable flip-flop has a first voltage level

The pins are electrically connected respectively.

4. The apparatus of claim 3, wherein the first delay circuit comprises a first delay resistor Rt1 and a first delay capacitor Ct 1.

5. The apparatus according to claim 1, wherein the second monostable flip-flop is implemented by a 74HC123 chip and is externally connected with a second delay circuit.

6. The apparatus of claim 5, wherein the second monostable flip-flop has a flip-flop with a flip-

And the CTS pin of the MCU is electrically connected.

7. The apparatus of claim 6, wherein the second delay circuit comprises a first delay resistor Rt2 and a first delay capacitor Ct 2.

8. An RS485 communication system, said RS485 communication system comprising a plurality of terminals, characterized in that each terminal in said RS485 communication system comprises an apparatus according to any of claims 1-7.