CN212850262U - Utilize in high-efficient PFC circuit of high-power communication power supply - Google Patents
Utilize in high-efficient PFC circuit of high-power communication power supply Download PDFInfo
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- CN212850262U CN212850262U CN202020555922.XU CN202020555922U CN212850262U CN 212850262 U CN212850262 U CN 212850262U CN 202020555922 U CN202020555922 U CN 202020555922U CN 212850262 U CN212850262 U CN 212850262U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
The utility model discloses an utilize in high-efficient PFC circuit of high-power communication power supply, PFC control chip's second pin is respectively through sixth resistance and fifth electric capacity connection second resistance, PFC control chip's third pin is through first ohmic connection rectifier bridge, PFC control chip's fourth pin is connected the fifth resistance respectively, seventh resistance and fourth electric capacity, PFC control chip's fifth pin passes through third electric capacity ground connection, eleventh resistance is connected respectively to PFC control chip's sixth pin, twelfth resistance and sixth electric capacity, PFC control chip's seventh pin is through first electric capacity ground connection, PFC control chip's eighth pin loops through tenth resistance and thirteenth resistance and connects the grid of MOS pipe. The utility model discloses beneficial effect: the utility model discloses a high-efficient PFC technique is the correction technique when switching power supply establishes, can effectively reduce the electric current harmonic during the use, promotes power conversion efficiency, designs suitable inductance value, thereby makes PFC switch tube work reduce the peak current of switch tube in continuous mode.
Description
Technical Field
The utility model belongs to the technical field of the electronic information technique and specifically relates to an utilize in high-power communication power supply's high-efficient PFC circuit.
Background
Communication power supplies are mostly ac inputs, and the efficiency of transmitting energy by ac is called power factor (power factor). The power factor is expressed as the apparent power of the load divided by the average power. The apparent power is calculated by sampling the voltage and current separately in real time and multiplying the resulting values. For a sine wave, if the phases of the waveforms of the voltage and current are the same, the power factor is 1. A power factor of 1 indicates that the efficiency of the transmission power is the best. When the phase relation of the voltage and the current is changed, the power factor is reduced, and if the phase difference of the voltage and the current is continuously increased to 90 degrees, the power factor is 0. In this condition, the average power divided by the load power is 0 (meaning that the load is not consuming power), but current still flows on the power line, resulting in a useless consumption of electrical energy into heat energy due to the presence of resistance on the power line.
Therefore, it is necessary to provide a high-efficiency PFC circuit for a high-power communication power supply.
SUMMERY OF THE UTILITY MODEL
The utility model aims at overcoming the not enough among the prior art, provide one kind and utilized in high-power communication power supply's high-efficient PFC circuit.
In order to solve the technical problem, the utility model discloses a realize through following technical scheme:
a high-efficiency PFC circuit used for a high-power communication power supply comprises a PFC control chip and a PFC inductor, wherein a first pin of the PFC control chip is grounded, a second pin of the PFC control chip is connected with a second resistor through a sixth resistor and a fifth capacitor respectively, the second resistor is connected with a rectifier bridge, a third pin of the PFC control chip is connected with the rectifier bridge through a first resistor, a fourth pin of the PFC control chip is connected with one ends of a fifth resistor, a seventh resistor and a fourth capacitor respectively, the fifth resistor is connected with the rectifier bridge through the fourth resistor and the third resistor in sequence, the other ends of the seventh resistor and the fourth capacitor are connected with the second resistor, a fifth pin of the PFC control chip is grounded through the third capacitor and grounded through a twelfth resistor and a seventh capacitor in sequence, the sixth pin of the PFC control chip is connected with one ends of an eleventh resistor, a twelfth resistor and a sixth capacitor respectively, the other end of the eleventh resistor is connected with a direct current power supply sequentially through a ninth resistor and an eighth resistor, the other ends of the twelfth resistor and the sixth capacitor are grounded, a seventh pin of the PFC control chip is grounded through the first capacitor, and an eighth pin of the PFC control chip is connected with a grid electrode of the MOS tube sequentially through a tenth resistor and a thirteenth resistor.
Preferably, the rectifier bridge is connected with a second capacitor.
Preferably, the gate of the MOS transistor is connected to the tenth resistor through a third diode, and the gates of the MOS transistors are grounded through a fourteenth resistor and the inverter diode, respectively.
Preferably, the drain of the MOS transistor is connected to a PFC inductor and one end of a second diode, respectively, and a first diode is connected between the other end of the PFC inductor and the other end of the second diode.
Preferably, an eighth capacitor is connected between the other end of the second diode and the source of the MOS transistor, and the source of the MOS transistor is grounded.
Preferably, the PFC control chip adopts an NCP1654 control chip.
Preferably, the third diode is a common cathode schottky diode.
The utility model discloses beneficial effect: the utility model discloses be provided with PFC control chip, PFC inductance, high-efficient PFC technique is the correction technique when switching power supply establishes, can effectively reduce the electric current harmonic during the application, promotes power conversion efficiency PFC control chip and adopts NCP1654 control chip, designs suitable inductance value, thereby makes PFC switch tube work reduce the peak current of switch tube in the continuous mode.
The conception, the specific structure and the technical effects of the present invention will be further described with reference to the accompanying drawings, so as to fully understand the objects, the features and the effects of the present invention.
Drawings
Fig. 1 is a schematic diagram of a high-efficiency PFC circuit for a high-power communication power supply according to the present invention.
Detailed Description
The embodiments of the invention will be described in detail below with reference to the drawings, but the invention can be implemented in many different ways as defined and covered by the claims.
As shown in fig. 1, a high efficiency PFC circuit for a high power communication power supply includes a PFC control chip U1 and a PFC inductor L1, a first pin of the PFC control chip U1 is grounded, a second pin of the PFC control chip U1 is respectively connected to a second resistor R2 through a sixth resistor R6 and a fifth capacitor C5, the second resistor R2 is connected to a rectifier bridge Q1, a third pin of the PFC control chip U1 is connected to a rectifier bridge Q1 through a first resistor R1, a fourth pin of the PFC control chip U1 is respectively connected to one ends of a fifth resistor R5, a seventh resistor R7 and a fourth capacitor C4, the fifth resistor R5 is connected to the rectifier bridge Q3 through a fourth resistor R4 and a third resistor R3 in sequence, the other ends of the seventh resistor R3 and the fourth capacitor C3 are connected to a third resistor R3 and a twelfth capacitor C3 through a seventh resistor R3 and a twelfth capacitor C3 in sequence, a sixth pin of the PFC control chip U1 is connected to one end of an eleventh resistor R11, one end of a twelfth resistor R12 and one end of a sixth capacitor C6, the other end of the eleventh resistor R11 is connected to a dc power supply through a ninth resistor R9 and an eighth resistor R8 in sequence, the other ends of the twelfth resistor R12 and the sixth capacitor C6 are grounded, a seventh pin of the PFC control chip U1 is grounded through a first capacitor C1, and an eighth pin of the PFC control chip U1 is connected to the gate of the MOS transistor Q2 through a tenth resistor R10 and a thirteenth resistor R13 in sequence.
Further, a second capacitor C2 is connected to the rectifier bridge Q1.
Further, the gate of the MOS transistor Q2 is connected to a tenth resistor R10 through a third diode D3, and the gate of the MOS transistor Q2 is grounded through a fourteenth resistor R14 and the inverter diode ZD, respectively.
Further, the drain of the MOS transistor Q2 is connected to one end of a PFC inductor L1 and one end of a second diode D2, respectively, and a first diode D1 is connected between the other end of the PFC inductor L1 and the other end of the second diode D2.
Furthermore, an eighth capacitor C8 is connected between the other end of the second diode D2 and the source of the MOS transistor Q2, and the source of the MOS transistor Q2 is grounded.
Further, the PFC control chip U1 employs an NCP1654 control chip.
Further, the third diode D3 is a common cathode schottky diode.
The utility model discloses beneficial effect: the utility model discloses be provided with PFC control chip, PFC inductance, high-efficient PFC technique is the correction technique when switching power supply establishes, can effectively reduce the electric current harmonic during the application, promotes power conversion efficiency PFC control chip and adopts NCP1654 control chip, designs suitable inductance value, thereby makes PFC switch tube work reduce the peak current of switch tube in the continuous mode.
When the phase relation of the voltage and the current is changed when the communication power supply directly adopts a rectification filtering mode, the power factor is reduced, and if the phase difference of the voltage and the current is continuously increased to 90 degrees, the power factor is 0. In this condition, the average power divided by the load power is 0 (meaning that the load is not consuming power), but current still flows on the power line, resulting in a useless consumption of electrical energy into heat energy due to the presence of resistance on the power line.
The foregoing has described in detail preferred embodiments of the present invention. It should be understood that numerous modifications and variations can be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions that can be obtained by a person skilled in the art through logic analysis, reasoning or limited experiments based on the prior art according to the concepts of the present invention should be within the scope of protection defined by the claims.
Claims (7)
1. A high-efficiency PFC circuit used for a high-power communication power supply is characterized in that: the PFC control circuit comprises a PFC control chip (U1) and a PFC inductor (L1), a first pin of the PFC control chip (U1) is grounded, a second pin of the PFC control chip (U1) is connected with a second resistor (R2) through a sixth resistor (R6) and a fifth capacitor (C5) respectively, the second resistor (R2) is connected with a rectifier bridge (Q1), a third pin of the PFC control chip (U1) is connected with the rectifier bridge (Q1) through a first resistor (R1), a fourth pin of the PFC control chip (U1) is connected with one end of a fifth resistor (R5), a seventh resistor (R7) and a fourth capacitor (C4) respectively, the fifth resistor (R5) is connected with the rectifier bridge (Q1) through a fourth resistor (R4) and a third resistor (R3) in sequence, the seventh resistor (R7) and the other end of the fourth capacitor (C4) are connected with the rectifier bridge (Q1) through the fifth resistor (R4) and the twelfth resistor (4) and the fifth capacitor (R4) in sequence, and the twelfth pin of the PFC control chip (4) are connected with the fifth resistor (4) through the fifth resistor (4) and the fifth (C7) The power factor correction circuit is characterized in that the power factor correction circuit is grounded, a sixth pin of the PFC control chip (U1) is connected with one end of an eleventh resistor (R11), one end of a twelfth resistor (R12) and one end of a sixth capacitor (C6) respectively, the other end of the eleventh resistor (R11) is connected with a direct current power supply sequentially through a ninth resistor (R9) and an eighth resistor (R8), the other ends of the twelfth resistor (R12) and the sixth capacitor (C6) are grounded, a seventh pin of the PFC control chip (U1) is grounded through a first capacitor (C1), and an eighth pin of the PFC control chip (U1) is connected with the grid of an MOS tube (Q2) sequentially through a tenth resistor (R10) and a thirteenth resistor (R13).
2. A high efficiency PFC circuit for use with a high power communication power supply as claimed in claim 1, wherein: the rectifier bridge (Q1) is connected with a second capacitor (C2).
3. A high efficiency PFC circuit for use with a high power communication power supply as claimed in claim 1, wherein: the grid electrode of the MOS tube (Q2) is connected with a tenth resistor (R10) through a third diode (D3), and the grid electrode of the MOS tube (Q2) is grounded through a fourteenth resistor (R14) and the inverter diode (ZD) respectively.
4. A high efficiency PFC circuit for use with a high power communication power supply as claimed in claim 1, wherein: the drain electrode of the MOS tube (Q2) is respectively connected with one end of a PFC inductor (L1) and one end of a second diode (D2), and a first diode (D1) is connected between the other end of the PFC inductor (L1) and the other end of the second diode (D2).
5. A high efficiency PFC circuit for use with high power communication power supplies as claimed in claim 4, wherein: an eighth capacitor (C8) is connected between the other end of the second diode (D2) and the source electrode of the MOS tube (Q2), and the source electrode of the MOS tube (Q2) is grounded.
6. A high efficiency PFC circuit for use with a high power communication power supply as claimed in claim 1, wherein: the PFC control chip (U1) adopts an NCP1654 control chip.
7. A high efficiency PFC circuit for use with high power communication power supplies as claimed in claim 3, wherein: the third diode (D3) is a common cathode schottky diode.
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Cited By (1)
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CN113267658A (en) * | 2021-07-19 | 2021-08-17 | 广东电网有限责任公司惠州供电局 | Alternating current channeling fault simulation verification circuit, device and method |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN113267658A (en) * | 2021-07-19 | 2021-08-17 | 广东电网有限责任公司惠州供电局 | Alternating current channeling fault simulation verification circuit, device and method |
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