CN212724002U - Signal transmission device - Google Patents
Signal transmission device Download PDFInfo
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- CN212724002U CN212724002U CN202022218360.2U CN202022218360U CN212724002U CN 212724002 U CN212724002 U CN 212724002U CN 202022218360 U CN202022218360 U CN 202022218360U CN 212724002 U CN212724002 U CN 212724002U
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Abstract
The application provides a signal transmission device, which comprises at least one plug-in module, a first serial transmission interface and a first programmable logic device, wherein the first programmable logic device is used for converting a plurality of received first parallel signals into first serial signals or converting a plurality of received second serial signals into a plurality of second parallel signals; the host comprises a second programmable logic device and at least one second serial transmission interface, wherein the second programmable logic device is used for converting the received multiple second parallel signals into second serial signals or converting the received first serial signals into multiple first parallel signals, the second serial transmission interfaces are arranged on the host, the second programmable logic device is electrically connected with each second serial transmission interface, and the first serial transmission interface of each plug-in module is plugged into one second serial transmission interface to be connected with the host.
Description
Technical Field
The application relates to the technical field of signal transmission, in particular to a signal transmission device.
Background
Some electronic products can adopt the form of external pluggable module to realize additional functions due to the limited internal structure space of the host.
At present, when the module that has multiple different functions, the module of multiple different functions can form multichannel parallel signal and then transmit for the host computer, but need increase the more connector of quantity Pin (Pin number) and then guarantee parallel transmission's effect between the module of multiple difference and the host computer this moment, and the mode makes the volume and the Pin number of connector too big like this, and then makes the miniaturization of product more difficult.
SUMMERY OF THE UTILITY MODEL
An object of the embodiment of the present application is to provide a signal transmission device, so as to solve the problem that the size and Pin number of a connector are too large due to the fact that the number of pins (Pin number) of the connector needs to be increased when various different modules communicate with a host computer, and further the miniaturization of a product is difficult.
In a first aspect, an embodiment of the present invention provides a signal transmission apparatus, including: at least one plug-in module, which includes a first serial transmission interface and a first programmable logic device for converting a plurality of received first parallel signals into first serial signals or converting a plurality of received second serial signals into a plurality of second parallel signals, wherein the first programmable logic device is electrically connected to the first serial transmission interface to send the first serial signals to the first serial transmission interface or receive the second serial signals transmitted by the first serial transmission interface; the host comprises a second programmable logic device and at least one second serial transmission interface, wherein the second programmable logic device is arranged in the host and used for converting a plurality of received second parallel signals into the second serial signals or converting the received first serial signals into the plurality of first parallel signals, the second serial transmission interface is arranged on the host, the second programmable logic device is electrically connected with each second serial transmission interface, and the first serial transmission interface of each inserting module is inserted into one second serial transmission interface to be connected with the host, so that the second programmable logic device receives the transmitted first serial signals or sends the second serial signals to the first programmable logic device.
In the signal transmission device, a first programmable logic device is designed to convert a plurality of parallel signals into serial signals, the serial signals are transmitted through a first serial transmission interface and a second serial transmission interface, and then the received serial signals are converted into original plurality of parallel signals through a second programmable logic device; or, the second programmable logic device converts the received multi-channel parallel signal into a serial signal to be transmitted through the second serial transmission interface and the first serial transmission interface, and further converts the received serial signal into the original multi-channel parallel signal through the first programmable logic device, and the host and the plug-in module group are converted into a serial signal to be transmitted on the basis of the original parallel signal received by the host and the plug-in module group through the design, so that the Pin number of the connector can be reduced or the serial transmission interface can be directly adopted for direct connection to cancel the use of the connector, thereby solving the problem that the volume and the Pin number of the connector are too large due to the fact that the connector with more pins (Pin numbers) needs to be added when various different modules are communicated with the host at present, further making the product more difficult to be miniaturized and convenient, and the conversion of the serial signal and the multi-channel parallel signal is realized by the programmable logic device, the flexibility is high.
In an optional implementation manner of this embodiment, the signal transmission apparatus further includes a connector, and the first serial transmission interface is connected to the second serial transmission interface through the connector.
In an alternative embodiment of this embodiment, the connector is a type-C connector.
In both embodiments of the above design, the first serial transmission interface and the second serial transmission interface are connected by a type-C connector to improve the reliability of serial signal transmission.
In an optional implementation manner of this embodiment, the first serial transmission interface and the second serial transmission interface are different in shape.
In an optional implementation manner of this embodiment, the first programmable logic device includes a first controller, a first low-speed clock, a first high-speed clock, and a first memory, and the first controller is electrically connected to the first serial transmission interface and electrically connected to the first memory through the first low-speed clock and the first high-speed clock, respectively.
In an optional implementation manner of this embodiment, each of the plug-in modules further includes a plurality of first parallel signal interfaces, and the first controller is electrically connected to an external device through the plurality of first parallel signal interfaces to receive the plurality of first parallel signals sent by the external device or transmit the plurality of second parallel signals to the external device.
In an optional implementation manner of this embodiment, the insertion module further includes a first indicator light, and the first indicator light is electrically connected to the first controller to give a light-emitting indication under the control of the first controller.
In an optional implementation manner of this embodiment, the second programmable logic device includes a second controller, a second low-speed clock, a second high-speed clock, and a second memory, and the second controller is electrically connected to the second serial transmission interface and electrically connected to the second memory through the second low-speed clock and the second high-speed clock, respectively.
In an optional implementation manner of this embodiment, the second programmable logic device further includes a plurality of second parallel signal interfaces, the host further includes a central processing unit, and the second controller is connected to the central processing unit through the plurality of second parallel signal interfaces to receive the plurality of second parallel signals sent by the central processing unit or send the plurality of first parallel signals to the central processing unit.
In an optional implementation manner of this embodiment, the first serial transmission interface and the second serial transmission interface have the same shape.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a first structural diagram of a signal transmission device according to an embodiment of the present disclosure;
fig. 2 is a second structural diagram of a signal transmission device according to an embodiment of the present application;
fig. 3 is a third structural diagram of a signal transmission device according to an embodiment of the present application.
Icon: 10-an insertion module; 101-a first serial transmission interface; 102-a first programmable logic device; 1021-a first controller; 1022 — a first low speed clock; 1023-a first high speed clock; 1024 — a first memory; 103-a first parallel signal interface; 20-a host; 201-a second serial transmission interface; 202-a second programmable logic; 2021-a second controller; 2022-second low speed clock; 2023-a second high speed clock; 2024-a second memory; 2025-a second parallel signal interface; 30-connector.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.
As shown in fig. 1, the embodiment of the present application provides a signal transmission device, which includes at least one plug-in module 10 and a host 20, wherein each plug-in module 10 can complete a communication connection with the host 20 by a plug-in manner, and further communicate with the host 20. Specifically, each plug-in module 10 includes a first serial transmission interface 101 and a first programmable logic device 102, the host 20 includes a second programmable logic device 202 and at least one second serial transmission interface 201, each plug-in module 10 can be connected to a second serial transmission interface 201 on the host through its own first serial transmission interface 101 to implement connection with the host 20 for communication, where it should be noted that the number of the second serial transmission interfaces 201 on the host may correspond to the number of the plug-in modules 10, or may be set to be a fixed number.
In the signal transmission device designed above, when the insertion module 10 communicates with the host 20, the insertion module 10 may receive multiple first parallel signals sent by a plurality of external devices, and then convert the received multiple first parallel signals into first serial signals by using the first programmable logic device 102 inside the insertion module, and further transmit the converted first serial signals to the second programmable logic device 202 inside the host through the first serial transmission interface 101 and the second serial transmission interface 201 connected to each other, and the second programmable logic device 202 converts the received first serial signals into the original multiple first parallel signals, and further processes the original multiple first parallel signals.
When the internal device of the host 20 generates multiple second parallel signals, for example, when the central processing unit CPU in the host 20 generates multiple second parallel signals, the multiple second parallel signals are transmitted to the second programmable logic device 202, the second programmable logic device 202 converts the received multiple second parallel signals into second serial signals, and further transmits the converted second serial signals to the first programmable logic device 102 inserted in the module 10 through the second serial transmission interface 201 and the first serial transmission interface 101, and the first programmable logic device 102 converts the received second serial signals into the original multiple second parallel signals, and further transmits the converted multiple second parallel signals to the external device, so as to achieve control or communication of the host to the external device.
In the signal transmission device, a first programmable logic device is designed to convert a plurality of parallel signals into serial signals, the serial signals are transmitted through a first serial transmission interface and a second serial transmission interface, and then the received serial signals are converted into original plurality of parallel signals through a second programmable logic device; or, the second programmable logic device converts the received multi-channel parallel signal into a serial signal to be transmitted through the second serial transmission interface and the first serial transmission interface, and further converts the received serial signal into the original multi-channel parallel signal through the first programmable logic device, and the host and the plug-in module group are converted into a serial signal to be transmitted on the basis of the original parallel signal received by the host and the plug-in module group through the design, so that the Pin number of the connector can be reduced or the serial transmission interface can be directly adopted for direct connection to cancel the use of the connector, thereby solving the problem that the volume and the Pin number of the connector are too large due to the fact that the connector with more pins (Pin numbers) needs to be added when various different modules are communicated with the host at present, further making the product more difficult to be miniaturized and convenient, and the conversion of the serial signal and the multi-channel parallel signal is realized by the programmable logic device, the flexibility is high.
In an alternative embodiment of this embodiment, as shown in fig. 2, the signal transmission apparatus may further include a connector 30, the connector 30 connects the first serial transmission interface 101 and the second serial transmission interface 201, and the connector 30 is configured to receive and transmit the aforementioned first serial signal or the aforementioned second serial signal. Specifically, the connector 30 can be a type-C connector, and when the connector 30 is provided, the connector only needs to be connected with the first serial transmission interface 101 and the second serial transmission interface 201, so that the pin number of the connector is greatly reduced, the size of the connector is reduced, the connector is easy to implement for consumer products, and the type-C connector is adopted to transmit serial signals, so that the reliability of signal transmission is ensured. In addition, it should be noted here that, when the connector 30 is provided, the shapes of the first serial transmission interface 101 and the second serial transmission interface 201 may be different, but the shapes of the first serial transmission interface 101 and the second serial transmission interface 201 need to be adapted to the shape of the interface on the connector 30; when there is no connector 30, the first serial transmission interface 101 and the second serial transmission interface 201 are the same in shape, that is, the first serial transmission interface 101 can be inserted into the second serial transmission interface 201.
In an alternative implementation manner of this embodiment, as shown in fig. 3, the first programmable logic device 102 includes a first controller 1021, a first low-speed clock 1022, a first high-speed clock 1023, and a first memory 1024, where the first controller 1021 is electrically connected to the first serial transmission interface 101 and the first controller 1021 is electrically connected to the first memory 1024 through the first low-speed clock 1022 and the first high-speed clock 1023, respectively, and the inserting module 10 further includes a plurality of first parallel signal interfaces 103, and the plurality of first parallel signal interfaces 103 are electrically connected to the first controller 1021; the second programmable logic device 202 includes a second controller 2021, a second low-speed clock 2022, a second high-speed clock 2023, and a second memory 2024, the second controller 2021 is electrically connected to the second serial transmission interface 201, the second controller 2021 is electrically connected to the second memory 2024 through the second low-speed clock 2022 and the second high-speed clock 2023, in addition, the second programmable logic device 202 further includes a plurality of second parallel signal interfaces 2025, the plurality of second parallel signal interfaces 2025 are electrically connected to the second controller 2021, the second programmable logic device 202 is connected to a central processing unit in the host through the plurality of second parallel signal interfaces 2025, wherein the first memory 1024 and the second memory 2024 can be registers.
Based on the above design, a plurality of external devices may be connected to the plug-in module 10 through a plurality of first parallel signal interfaces 103 to send the above-mentioned multiple first parallel signals to the plug-in module 10, a first controller 1021 in a first programmable logic device 102 in the plug-in module 10 writes multiple first parallel signals into a first memory 1024 through a first low-speed clock 1022, then the first controller 1021 reads the parallel signals stored in the first memory 1024 through a first high-speed clock 1023, and organizes the parallel signals into a first serial signal in a form required by a high-speed interface according to a frame format, and then transmits the first serial signal to the first serial transmission interface 101, then the first serial transmission interface 101 transmits the first serial signal to the connector 30, and transmits the first serial signal to the second serial transmission interface 201 through the connector 30, and the second controller 2021 receives the transmitted first serial signal through the second serial transmission interface 201, the data frame format is analyzed, and then written into the buffer of the second memory 2024 by the second high-speed clock 2023, and then read out by the second low-speed clock 2022, so that the previous multi-path first parallel signal data is completely recovered, and further can be transmitted to a central processing unit or the like in the host 20 for processing.
In the same way, the central processing unit may be electrically connected to the second programmable logic unit 202 through a plurality of second parallel signal interfaces 2025 to send a plurality of second parallel signals to the second programmable logic unit, the second controller 2021 in the second programmable logic unit 202 may write the plurality of received second parallel signals into the buffer of the second memory 2024 through the second low-speed clock 2022, then read the signals through the second high-speed clock 2023, and organize the signals into the second serial signals according to the frame format required by the high-speed interface, and then transmit the second serial signals to the second serial transmission interface 201, then the second serial transmission interface 201 transmits the second serial signals to the connector 30, and transmits the second serial signals to the first serial transmission interface 101 through the connector 30, and the first controller 1021 receives the transmitted second serial signals through the first serial transmission interface 101 to parse the data frame format, then, the data is written into the cache of the first memory 1024 by the first high-speed clock 1023, and then read by the first low-speed clock 1022, so that the previous multiple paths of second parallel signal data are completely recovered, and further, the control or communication of the central processing unit to multiple external devices is realized.
In the description of the present application, it should be noted that the terms "inside", "outside", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings or orientations or positional relationships that the products of the application usually place when using, and are only used for convenience in describing the present application and simplifying the description, but do not indicate or imply that the devices or elements that are referred to must have a specific orientation, be constructed in a specific orientation, and operate, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," and the like are used merely to distinguish one description from another, and are not to be construed as indicating or implying relative importance.
It should also be noted that, unless expressly stated or limited otherwise, the terms "disposed" and "connected" are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A signal transmission apparatus, comprising:
at least one plug-in module, which includes a first serial transmission interface and a first programmable logic device for converting a plurality of received first parallel signals into first serial signals or converting a plurality of received second serial signals into a plurality of second parallel signals, wherein the first programmable logic device is electrically connected to the first serial transmission interface to send the first serial signals to the first serial transmission interface or receive the second serial signals transmitted by the first serial transmission interface;
the host comprises a second programmable logic device and at least one second serial transmission interface, wherein the second programmable logic device is arranged in the host and used for converting a plurality of received second parallel signals into the second serial signals or converting the received first serial signals into the plurality of first parallel signals, the second serial transmission interface is arranged on the host, the second programmable logic device is electrically connected with each second serial transmission interface, and the first serial transmission interface of each inserting module is inserted into one second serial transmission interface to be connected with the host, so that the second programmable logic device receives the transmitted first serial signals or sends the second serial signals to the first programmable logic device.
2. The signal transmission apparatus according to claim 1, further comprising a connector through which the first serial transmission interface is connected with the second serial transmission interface.
3. The signal transmission device of claim 2, wherein the connector is a type-C connector.
4. The signal transmission apparatus according to claim 2, wherein the first serial transmission interface and the second serial transmission interface are different in shape.
5. The signal transmission apparatus according to claim 1, wherein the first programmable logic device comprises a first controller, a first low-speed clock, a first high-speed clock, and a first memory, and the first controller is electrically connected to the first serial transmission interface and electrically connected to the first memory through the first low-speed clock and the first high-speed clock, respectively.
6. The signal transmission apparatus according to claim 5, wherein each of the plug-in modules further includes a plurality of first parallel signal interfaces, and the first controller is electrically connected to an external device through the plurality of first parallel signal interfaces to receive the plurality of first parallel signals from the external device or transmit the plurality of second parallel signals to the external device.
7. The signal transmission device according to claim 6, wherein the insertion module further comprises a first indicator light electrically connected to the first controller for providing an illumination indication under the control of the first controller.
8. The signal transmission apparatus according to claim 1, wherein the second programmable logic device comprises a second controller, a second low-speed clock, a second high-speed clock, and a second memory, and the second controller is electrically connected to the second serial transmission interface and electrically connected to the second memory through the second low-speed clock and the second high-speed clock, respectively.
9. The signal transmission apparatus according to claim 8, wherein the second programmable logic device further comprises a plurality of second parallel signal interfaces, the host further comprises a central processing unit, and the second controller is connected to the central processing unit through the plurality of second parallel signal interfaces to receive the plurality of second parallel signals from the central processing unit or send the plurality of first parallel signals to the central processing unit.
10. The signal transmission apparatus according to claim 1, wherein the first serial transmission interface and the second serial transmission interface are identical in shape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022218360.2U CN212724002U (en) | 2020-09-30 | 2020-09-30 | Signal transmission device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022218360.2U CN212724002U (en) | 2020-09-30 | 2020-09-30 | Signal transmission device |
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| Publication Number | Publication Date |
|---|---|
| CN212724002U true CN212724002U (en) | 2021-03-16 |
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| CN202022218360.2U Active CN212724002U (en) | 2020-09-30 | 2020-09-30 | Signal transmission device |
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| CN (1) | CN212724002U (en) |
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- 2020-09-30 CN CN202022218360.2U patent/CN212724002U/en active Active
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